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[/] [openrisc/] [tags/] [gnu-src/] [newlib-1.18.0/] [newlib-1.18.0-or32-1.0rc1/] [newlib/] [libm/] [machine/] [spu/] [headers/] [floorf.h] - Blame information for rev 345

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1 207 jeremybenn
/*
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  (C) Copyright 2001,2006,
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  International Business Machines Corporation,
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  Sony Computer Entertainment, Incorporated,
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  Toshiba Corporation,
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  All rights reserved.
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  Redistribution and use in source and binary forms, with or without
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  modification, are permitted provided that the following conditions are met:
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    * Redistributions of source code must retain the above copyright notice,
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  this list of conditions and the following disclaimer.
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    * Redistributions in binary form must reproduce the above copyright
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  notice, this list of conditions and the following disclaimer in the
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  documentation and/or other materials provided with the distribution.
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    * Neither the names of the copyright holders nor the names of their
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  contributors may be used to endorse or promote products derived from this
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  software without specific prior written permission.
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  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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  IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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  TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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  PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
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  OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _FLOORF_H_
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#define _FLOORF_H_      1
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#include <spu_intrinsics.h>
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#include "headers/vec_literal.h"
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/*
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 * FUNCTION
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 *      float _floorf(float value)
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 *
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 * DESCRIPTION
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 *      The _floorf routine round the input value "value" downwards to the
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 *      nearest integer returning the result as a float. Two forms of the
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 *      floor function are provided - full range and limited (integer)
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 *      range.
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 *
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 *      The full range form (default) provides floor computation on
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 *      all IEEE floating point values. The floor of NANs remain NANs.
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 *      The floor of denorms results in zero.
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 *
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 *      The limited range form (selected by defining FLOOR_INTEGER_RANGE)
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 *      compute ths floor of all floating-point values in the 32-bit
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 *      signed integer range. Values outside this range get clamped.
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 */
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static __inline float _floorf(float value)
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{
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#ifdef FLOOR_INTEGER_RANGE
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  /* 32-BIT INTEGER DYNAMIC RANGE
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   */
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  union {
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    float f;
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    signed int i;
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    unsigned int ui;
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  } bias;
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  bias.f = value;
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  /* If positive, bias the input value to truncate towards
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   * positive infinity, instead of zero.
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   */
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  bias.ui = (unsigned int)(bias.i >> 31) & 0x3F7FFFFF;
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  value -= bias.f;
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  /* Remove fraction bits by casting to an integer and back
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   * to a floating-point value.
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   */
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  return ((float)((int)value));
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#else /* !FLOOR_INTEGER_RANGE */
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  /* FULL FLOATING-POINT RANGE
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   */
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  vec_int4 exp, shift;
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  vec_uint4 mask, frac_mask, addend, insert, pos;
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  vec_float4 in, out;
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  in = spu_promote(value, 0);
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  /* This function generates the following component
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   * based upon the inputs.
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   *
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   *   mask = bits of the input that need to be replaced.
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   *   insert = value of the bits that need to be replaced
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   *   addend = value to be added to perform function.
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   *
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   * These are applied as follows:.
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   *
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   *   out = ((in & mask) | insert) + addend
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   */
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  pos = spu_cmpgt((vec_int4)in, -1);
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  exp = spu_and(spu_rlmask((vec_int4)in, -23), 0xFF);
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  shift = spu_sub(127, exp);
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  frac_mask = spu_and(spu_rlmask(VEC_SPLAT_U32(0x7FFFFF), shift),
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                      spu_cmpgt((vec_int4)shift, -31));
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  mask = spu_orc(frac_mask, spu_cmpgt(exp, 126));
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  addend = spu_andc(spu_andc(spu_add(mask, 1), pos),
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                    spu_cmpeq(spu_and((vec_uint4)in, mask), 0));
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  insert = spu_andc(spu_andc(VEC_SPLAT_U32(0xBF800000), pos),
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                    spu_cmpgt((vec_uint4)spu_add(exp, -1), 126));
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  out = (vec_float4)spu_add(spu_sel((vec_uint4)in, insert, mask), addend);
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  return (spu_extract(out, 0));
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#endif /* FLOOR_INTEGER_RANGE */
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}
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#endif /* _FLOORF_H_ */

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