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jeremybenn |
Or1ksim Test Suite
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==================
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This directory includes some test case programs that should be used to verify
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correct operation of the or1ksim, OR32 GCC and OR32 GNU Binutils.
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Pre-requisites
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==============
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The GNU toolchain for OpenRISC 1000 is required. Instructions how to build
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these GNU tools can be found on www.opencores.org
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Or1ksim must be built and installed (see ../README)
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Configuration and Running
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=========================
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The installation uses standard GNU autoconf/automake files. Generic
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instructions on this are in the INSTALL file.
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Or1ksim Test Suite should be capable of being built in a separate directory -
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but for now that is broken.
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All programs are built and checked from the test directory by:
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$ ./configure --target=or32-uclinux --host=or32
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$ make all
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$ make check
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!!! For all test cases, or1ksim should be built with ONLY_VIRTUAL_MACHINE !!!
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!!! undefined in cpu/or1k/except.h. This is the default behavior !!!
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All tests should exit with:
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MTSPR(0x1234, deaddead);
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syscall exit(0)
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If the test fails, it should print as much output as possible about the
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failure. Overall the test script checks for the above two lines, and can be
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fooled by intervening log output.
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The Tests
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=========
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A total of 20 tests including:
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dhry: Dhrystone 2.1: a benchmark modified to use simulator's timing
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facility.
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basic: a test for all instructions and all GPRs.
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test1: a test for "all" instructions and their combinations.
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pic: a test for PIC and TICK timer. All three modes of TICK timer are
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tested and interrupt is enabled and disabled in PIC.
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excpt: a test of l.sys instruction. Checks all the delay slot issues ind
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other things.
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cfg: a test of SPRs (SPR_VR, SPR_CPUCFGR, SPR_DMMUCFGR, SPR_IMMUCFGR,
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SPR_DCCFGR, SPR_ICCFGR, SPR_DCFGR, SPR_PCCFGR).
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dma: a test of DMA in normal (software) mode.
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compress: UNIX compressed modified not to use libc calls.
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mul: Test l.mul, l.mac and l.macrc instructions.
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Upated by Jeremy Bennett (jeremy@jeremybennett.com)
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9 June 2008
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