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[/] [openrisc/] [trunk/] [bootloaders/] [orpmon/] [cmds/] [eth.c] - Blame information for rev 744

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#include "common.h"
#include "uart.h"
#include "eth.h"
#include "support.h"
#include "spr-defs.h"
#include "net.h"
 
#if 1
extern int tx_pointer_index;
unsigned long dest_mac_addr[6];
 
void show_tx_bd(int start, int max)
{
        int i;
 
        for (i = start; i <= max; i++) {
                /* Read Tx BD */
                printf("LEN:%04lx", REG32(ETH_BD_BASE + (i << 3)) >> 16);
                printf(" RD:%04lx",
                       (REG32(ETH_BD_BASE + (i << 3)) >> 15) & 0x1);
                printf(" IRQ:%04lx",
                       (REG32(ETH_BD_BASE + (i << 3)) >> 14) & 0x1);
                printf(" WR:%04lx",
                       (REG32(ETH_BD_BASE + (i << 3)) >> 13) & 0x1);
                printf(" PAD:%04lx",
                       (REG32(ETH_BD_BASE + (i << 3)) >> 12) & 0x1);
                printf(" CRC:%04lx",
                       (REG32(ETH_BD_BASE + (i << 3)) >> 11) & 0x1);
                printf(" UR:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 8) & 0x1);
                printf(" RTRY:%04lx",
                       (REG32(ETH_BD_BASE + (i << 3)) >> 4) & 0xf);
                printf(" RL:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 3) & 0x1);
                printf(" LC:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 2) & 0x1);
                printf(" DF:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 1) & 0x1);
                printf(" CS:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 0) & 0x1);
                printf("\nTx Buffer Pointer: %08lx\n",
                       REG32(ETH_BD_BASE + (i << 3) + 4));
        }
}
 
void show_rx_bd(int start, int max)
{
        int i;
        unsigned long rx_bd_base, rx_bd_num;
 
        rx_bd_num = REG32(ETH_REG_BASE + ETH_RXBD_NUM);
        rx_bd_base = ETH_BD_BASE + (rx_bd_num << 2);
 
        for (i = start; i <= max; i++) {
                /* Read Rx BD */
                printf("LEN:%04lx", REG32(rx_bd_base + (i << 3)) >> 16);
                printf(" E:%04lx", (REG32(rx_bd_base + (i << 3)) >> 15) & 0x1);
                printf(" IRQ:%04lx",
                       (REG32(rx_bd_base + (i << 3)) >> 14) & 0x1);
                printf(" WR:%04lx", (REG32(rx_bd_base + (i << 3)) >> 13) & 0x1);
                printf(" M:%04lx", (REG32(rx_bd_base + (i << 3)) >> 7) & 0x1);
                printf(" OR:%04lx", (REG32(rx_bd_base + (i << 3)) >> 6) & 0x1);
                printf(" IS:%04lx", (REG32(rx_bd_base + (i << 3)) >> 5) & 0x1);
                printf(" DN:%04lx", (REG32(rx_bd_base + (i << 3)) >> 4) & 0x1);
                printf(" TL:%04lx", (REG32(rx_bd_base + (i << 3)) >> 3) & 0x1);
                printf(" SF:%04lx", (REG32(rx_bd_base + (i << 3)) >> 2) & 0x1);
                printf(" CRC:%04lx", (REG32(rx_bd_base + (i << 3)) >> 1) & 0x1);
                printf(" LC:%04lx", (REG32(rx_bd_base + (i << 3)) >> 0) & 0x1);
                printf("\nRx Buffer Pointer: %08lx\n",
                       REG32(rx_bd_base + (i << 3) + 4));
        }
}
 
void show_buffer(unsigned long start_addr, unsigned long len)
{
        show_mem(start_addr, start_addr + len - 1);
}
 
void show_rx_buffs(int max, int show_all)
{
 
        int i;
        unsigned long rx_bd_base, rx_bd_num;
 
        rx_bd_num = REG32(ETH_REG_BASE + ETH_RXBD_NUM);
        rx_bd_base = ETH_BD_BASE + (rx_bd_num << 2);
 
        for (i = 0; i <= max; i++) {
                if (!(REG32(rx_bd_base + (i << 3)) & ETH_RX_BD_EMPTY)
                    || show_all) {
                        printf("Rx BD No. %04x located at %08lx\n", i,
                               rx_bd_base + (i << 3));
                        show_rx_bd(i, i);
                        show_buffer(REG32(rx_bd_base + (i << 3) + 4),
                                    REG32(rx_bd_base + (i << 3)) >> 16);
                        printf("\n");
                }
                if (REG32(rx_bd_base + (i << 3)) & ETH_RX_BD_WRAP)
                        return;
        }
}
 
void show_tx_buffs(int max)
{
        int i;
 
        for (i = 0; i <= max; i++) {
                if (1) {
                        printf("Tx BD No. %04x located at %08x\n", i,
                               ETH_BD_BASE + (i << 3));
                        show_tx_bd(i, i);
                        show_buffer(REG32(ETH_BD_BASE + (i << 3) + 4),
                                    REG32(ETH_BD_BASE + (i << 3)) >> 16);
                        printf("\n");
                }
                if (REG32(ETH_BD_BASE + (i << 3)) & ETH_TX_BD_WRAP)
                        return;
        }
}
 
void show_phy_reg(unsigned long start_addr, unsigned long stop_addr)
{
 
        unsigned long addr;
 
        if (start_addr == stop_addr) {
                printf("\nSet MII RGAD ADDRESS to %08lx", start_addr);
                printf("\nMII Command = Read Status\n");
        }
 
        for (addr = start_addr; addr <= stop_addr; addr++) {
                REG32(ETH_REG_BASE + ETH_MIIADDRESS) = addr << 8;
                REG32(ETH_REG_BASE + ETH_MIICOMMAND) = ETH_MIICOMMAND_RSTAT;
 
                printf("PHY %04lx",
                       REG32(ETH_REG_BASE + ETH_MIIADDRESS) & 0x1f);
                printf(", addr %04lx",
                       REG32(ETH_REG_BASE + ETH_MIIADDRESS) >> 8);
                printf(": %08lx\n", REG32(ETH_REG_BASE + ETH_MIIRX_DATA));
        }
}
 
void set_phy_reg(unsigned long addr, unsigned long val)
{
        printf("\nSet MII RGAD ADDRESS to %08lx", addr);
 
        REG32(ETH_REG_BASE + ETH_MIIADDRESS) = addr << 8;
 
        printf("\nMII Command = Write Control Data\n");
        REG32(ETH_REG_BASE + ETH_MIICOMMAND) = ETH_MIICOMMAND_WCTRLDATA;
 
        REG32(ETH_REG_BASE + ETH_MIITX_DATA) = val;
 
        show_phy_reg(addr, addr);
}
 
void send_packet(unsigned long len, unsigned long start_data,
                 int num_of_packets)
{
        unsigned long i, TxBD;
 
        while (num_of_packets--) {
                unsigned long *data = (unsigned long *)eth_get_tx_buf();
 
                /* Set dest & src address */
                *data++ = dest_mac_addr[0] << 24 |
                    dest_mac_addr[1] << 16 |
                    dest_mac_addr[2] << 8 | dest_mac_addr[3] << 0;
 
                *data++ = dest_mac_addr[4] << 24 |
                    dest_mac_addr[5] << 16 |
                    ETH_MACADDR0 << 8 | ETH_MACADDR1 << 0;
 
                *data++ = ETH_MACADDR2 << 24 |
                    ETH_MACADDR3 << 16 | ETH_MACADDR4 << 8 | ETH_MACADDR5 << 0;
 
                /* Write data to buffer */
                for (i = 12; i < len; i += 4)
                        *data++ =
                            (i + start_data - 12) << 24 | (i + start_data + 1 -
                                                           12) << 16 | (i +
                                                                        start_data
                                                                        + 2 -
                                                                        12) << 8
                            | (i + start_data + 3 - 12);
 
                eth_send(data, len);
                printf(".");
        }
}
 
int eth_init_cmd(int argc, char *argv[])
{
        if (argc)
                return -1;
        eth_init(0);
        return 0;
}
 
int show_txbd_cmd(int argc, char *argv[])
{
        int i;
        int start, max;
 
        if (argc == 1)
                show_tx_bd(strtoul(argv[0], NULL, 0),
                           strtoul(argv[0], NULL, 0));
        else if (argc == 2)
                show_tx_bd(strtoul(argv[0], NULL, 0),
                           strtoul(argv[1], NULL, 0));
        else
                show_tx_bd(0, 63);
        return 0;
}
 
int show_rxbd_cmd(int argc, char *argv[])
{
        if (argc == 1)
                show_rx_bd(strtoul(argv[0], NULL, 0),
                           strtoul(argv[0], NULL, 0));
        else if (argc == 2)
                show_rx_bd(strtoul(argv[0], NULL, 0),
                           strtoul(argv[1], NULL, 0));
        else
                show_rx_bd(0, 63);
        return 0;
}
 
int send_packet_cmd(int argc, char *argv[])
{
        if (argc == 1)
                send_packet(strtoul(argv[0], NULL, 0), 31, 1);
        else if (argc == 2)
                send_packet(strtoul(argv[0], NULL, 0),
                            strtoul(argv[1], NULL, 0), 1);
        else if (argc == 3)
                send_packet(strtoul(argv[0], NULL, 0),
                            strtoul(argv[1], NULL, 0), strtoul(argv[2], NULL,
                                                               0));
        else
                return -1;
        return 0;
}
 
int set_dest_addr_cmd(int argc, char *argv[])
{
        if (argc == 3) {
                dest_mac_addr[0] = (strtoul(argv[0], NULL, 0) >> 8) & 0xff;
                dest_mac_addr[1] = (strtoul(argv[0], NULL, 0) >> 0) & 0xff;
                dest_mac_addr[2] = (strtoul(argv[1], NULL, 0) >> 8) & 0xff;
                dest_mac_addr[3] = (strtoul(argv[1], NULL, 0) >> 0) & 0xff;
                dest_mac_addr[4] = (strtoul(argv[2], NULL, 0) >> 8) & 0xff;
                dest_mac_addr[5] = (strtoul(argv[2], NULL, 0) >> 0) & 0xff;
        } else
                return -1;
        return 0;
}
 
int init_txbd_pool_cmd(int argc, char *argv[])
{
#if 0
        if (argc == 1)
                init_tx_bd_pool(strtoul(argv[0], NULL, 0));
        else
                return -1;
#endif
        return 0;
}
 
int init_rxbd_pool_cmd(int argc, char *argv[])
{
        //if (argc == 1) init_rx_bd_pool(strtoul (argv[0], NULL, 0));
        //else return -1;
        init_rx_bd_pool();
 
        return 0;
}
 
int show_phy_reg_cmd(int argc, char *argv[])
{
        if (argc == 1)
                show_phy_reg(strtoul(argv[0], NULL, 0),
                             strtoul(argv[0], NULL, 0));
        else if (argc == 2)
                show_phy_reg(strtoul(argv[0], NULL, 0),
                             strtoul(argv[1], NULL, 0));
        else
                show_phy_reg(0, 30);
        return 0;
}
 
int set_phy_reg_cmd(int argc, char *argv[])
{
        if (argc == 2)
                set_phy_reg(strtoul(argv[0], NULL, 0),
                            strtoul(argv[1], NULL, 0));
        else
                return -1;
        return 0;
}
 
int show_mac_regs_cmd(int argc, char *argv[])
{
        if (argc)
                return -1;
        printf("\n %08x", ETH_REG_BASE + ETH_MODER);
        printf(" MODER: %08lx", REG32(ETH_REG_BASE + ETH_MODER));
 
        printf("\n %08x", ETH_REG_BASE + ETH_INT);
        printf(" INT: %08lx", REG32(ETH_REG_BASE + ETH_INT));
 
        printf("\n %08x", ETH_REG_BASE + ETH_INT_MASK);
        printf(" INT_MASK: %08lx", REG32(ETH_REG_BASE + ETH_INT_MASK));
 
        printf("\n %08x", ETH_REG_BASE + ETH_IPGT);
        printf(" IPGT: %08lx", REG32(ETH_REG_BASE + ETH_IPGT));
 
        printf("\n %08x", ETH_REG_BASE + ETH_IPGR1);
        printf(" IPGR1: %08lx", REG32(ETH_REG_BASE + ETH_IPGR1));
 
        printf("\n %08x", ETH_REG_BASE + ETH_IPGR2);
        printf(" IPGR2: %08lx", REG32(ETH_REG_BASE + ETH_IPGR2));
 
        printf("\n %08x", ETH_REG_BASE + ETH_PACKETLEN);
        printf(" PACKETLEN: %08lx", REG32(ETH_REG_BASE + ETH_PACKETLEN));
 
        printf("\n %08x", ETH_REG_BASE + ETH_COLLCONF);
        printf(" COLLCONF: %08lx", REG32(ETH_REG_BASE + ETH_COLLCONF));
 
        printf("\n %08x", ETH_REG_BASE + ETH_RXBD_NUM);
        printf(" RX_BD_NUM: %08lx", REG32(ETH_REG_BASE + ETH_RXBD_NUM));
 
        printf("\n %08x", ETH_REG_BASE + ETH_CTRLMODER);
        printf(" CTRLMODER: %08lx", REG32(ETH_REG_BASE + ETH_CTRLMODER));
 
        printf("\n %08x", ETH_REG_BASE + ETH_MIIMODER);
        printf(" MIIMODER: %08lx", REG32(ETH_REG_BASE + ETH_MIIMODER));
 
        printf("\n %08x", ETH_REG_BASE + ETH_MIICOMMAND);
        printf(" MIICOMMAND: %08lx", REG32(ETH_REG_BASE + ETH_MIICOMMAND));
 
        printf("\n %08x", ETH_REG_BASE + ETH_MIIADDRESS);
        printf(" MIIADDRESS: %08lx", REG32(ETH_REG_BASE + ETH_MIIADDRESS));
 
        printf("\n %08x", ETH_REG_BASE + ETH_MIITX_DATA);
        printf(" MIITX_DATA: %08lx", REG32(ETH_REG_BASE + ETH_MIITX_DATA));
 
        printf("\n %08x", ETH_REG_BASE + ETH_MIIRX_DATA);
        printf(" MIIRX_DATA: %08lx", REG32(ETH_REG_BASE + ETH_MIIRX_DATA));
 
        printf("\n %08x", ETH_REG_BASE + ETH_MIISTATUS);
        printf(" MIISTATUS: %08lx", REG32(ETH_REG_BASE + ETH_MIISTATUS));
 
        printf("\n %08x", ETH_REG_BASE + ETH_MAC_ADDR0);
        printf(" MAC_ADDR0: %08lx", REG32(ETH_REG_BASE + ETH_MAC_ADDR0));
 
        printf("\n %08x", ETH_REG_BASE + ETH_MAC_ADDR1);
        printf(" MAC_ADDR1: %08lx", REG32(ETH_REG_BASE + ETH_MAC_ADDR1));
 
        printf("\n %08x", ETH_REG_BASE + ETH_HASH_ADDR0);
        printf(" ETH_HASH_ADDR0: %08lx", REG32(ETH_REG_BASE + ETH_HASH_ADDR0));
 
        printf("\n %08x", ETH_REG_BASE + ETH_HASH_ADDR1);
        printf(" ETH_HASH_ADDR1: %08lx", REG32(ETH_REG_BASE + ETH_HASH_ADDR1));
 
        printf("\n");
        return 0;
}
 
int eth_int_enable_cmd(int argc, char *argv[])
{
        if (argc)
                return -1;
        eth_int_enable();
        return 0;
}
 
int show_rx_buffs_cmd(int argc, char *argv[])
{
        if (argc == 0)
                show_rx_buffs(63, 0);
        else if (argc == 1)
                show_rx_buffs(63, 1);
        else
                return -1;
        return 0;
}
 
int show_tx_buffs_cmd(int argc, char *argv[])
{
        if (argc == 0)
                show_tx_buffs(63);
        else
                return -1;
        return 0;
}
#endif
 
int eth_conf_cmd(int argc, char *argv[])
{
        switch (argc) {
        case 0:
                printf("IP: %s", inet_ntoa(global.ip));
                printf("\nmask: %s", inet_ntoa(global.mask));
                printf("\nGW: %s", inet_ntoa(global.gw_ip));
                return 0;
        case 3:
                global.gw_ip = inet_aton(argv[2]);
        case 2:
                global.mask = inet_aton(argv[1]);
        case 1:
                global.ip = inet_aton(argv[0]);
                break;
        }
        printf("Restarting network with new parameters...");
        NetStartAgain();
 
        return 0;
}
 
void toggle_eth_traffic_monitor_cmd(void)
{
        eth_toggle_traffic_mon();
}
 
void module_eth_init(void)
{
#if 1
        register_command("eth_init", "", "init ethernet", eth_init_cmd);
        register_command("show_txbd", "[<start BD>] [<max>]",
                         "show Tx buffer desc", show_txbd_cmd);
        register_command("show_rxbd", "[<start BD>] [<max>]",
                         "show Rx buffer desc", show_rxbd_cmd);
        register_command("send_packet",
                         "<length> [<start data>] [<num_of_packets>]",
                         "create & send packet(s)", send_packet_cmd);
        register_command("set_dest_addr", "<addrhi> <addrmid> <addrlo>",
                         "set destination address (for send_packet)",
                         set_dest_addr_cmd);
        register_command("init_txbd_pool", "<max>",
                         "initialize Tx buffer descriptors",
                         init_txbd_pool_cmd);
        register_command("init_rxbd_pool", "<max>",
                         "initialize Rx buffer descriptors",
                         init_rxbd_pool_cmd);
        register_command("show_phy_reg", "[<start_addr>] [<end addr>]",
                         "show PHY registers", show_phy_reg_cmd);
        register_command("set_phy_reg", "<addr> <value>", "set PHY register",
                         set_phy_reg_cmd);
        register_command("show_mac_regs", "", "show all MAC registers",
                         show_mac_regs_cmd);
        register_command("eth_int_enable", "", "enable ethernet interrupt",
                         eth_int_enable_cmd);
        register_command("show_rx_buffs", "[<show_all>]",
                         "show receive buffers (optional arg will also show empty buffers)",
                         show_rx_buffs_cmd);
        register_command("show_tx_buffs", "", "show transmit buffers",
                         show_rx_buffs_cmd);
        register_command("eth_toggle_mon", "", "Toggle traffic monitor",
                         toggle_eth_traffic_monitor_cmd);
#endif
        /* Initialize controller */
        register_command("eth_conf", "[<ip> [<mask> [<gw>]]]",
                         "Get/set ethernet configuration", eth_conf_cmd);
#if 0
        eth_init();
        printf("Ethernet not initialized (run eth_init command)\n");
        init_rx_bd_pool(0);
        init_tx_bd_pool(3);
#endif
}

Line No.	Rev	Author	Line
1	2	marcus.erl	`#include "common.h"`
2			`#include "uart.h"`
3			`#include "eth.h"`
4			`#include "support.h"`
5	246	julius	`#include "spr-defs.h"`
6	2	marcus.erl	`#include "net.h"`
7
8	140	julius	`#if 1`
9	2	marcus.erl	`extern int tx_pointer_index;`
10			`unsigned long dest_mac_addr[6];`
11
12			`void show_tx_bd(int start, int max)`
13			`{`
14	406	julius	`int i;`
15
16			`for (i = start; i <= max; i++) {`
17			`/* Read Tx BD */`
18			`printf("LEN:%04lx", REG32(ETH_BD_BASE + (i << 3)) >> 16);`
19			`printf(" RD:%04lx",`
20			`(REG32(ETH_BD_BASE + (i << 3)) >> 15) & 0x1);`
21			`printf(" IRQ:%04lx",`
22			`(REG32(ETH_BD_BASE + (i << 3)) >> 14) & 0x1);`
23			`printf(" WR:%04lx",`
24			`(REG32(ETH_BD_BASE + (i << 3)) >> 13) & 0x1);`
25			`printf(" PAD:%04lx",`
26			`(REG32(ETH_BD_BASE + (i << 3)) >> 12) & 0x1);`
27			`printf(" CRC:%04lx",`
28			`(REG32(ETH_BD_BASE + (i << 3)) >> 11) & 0x1);`
29			`printf(" UR:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 8) & 0x1);`
30			`printf(" RTRY:%04lx",`
31			`(REG32(ETH_BD_BASE + (i << 3)) >> 4) & 0xf);`
32			`printf(" RL:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 3) & 0x1);`
33			`printf(" LC:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 2) & 0x1);`
34			`printf(" DF:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 1) & 0x1);`
35			`printf(" CS:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 0) & 0x1);`
36			`printf("\nTx Buffer Pointer: %08lx\n",`
37			`REG32(ETH_BD_BASE + (i << 3) + 4));`
38			`}`
39	2	marcus.erl	`}`
40
41	406	julius	`void show_rx_bd(int start, int max)`
42	2	marcus.erl	`{`
43	406	julius	`int i;`
44			`unsigned long rx_bd_base, rx_bd_num;`
45	2	marcus.erl
46	406	julius	`rx_bd_num = REG32(ETH_REG_BASE + ETH_RXBD_NUM);`
47			`rx_bd_base = ETH_BD_BASE + (rx_bd_num << 2);`
48	2	marcus.erl
49	406	julius	`for (i = start; i <= max; i++) {`
50			`/* Read Rx BD */`
51			`printf("LEN:%04lx", REG32(rx_bd_base + (i << 3)) >> 16);`
52			`printf(" E:%04lx", (REG32(rx_bd_base + (i << 3)) >> 15) & 0x1);`
53			`printf(" IRQ:%04lx",`
54			`(REG32(rx_bd_base + (i << 3)) >> 14) & 0x1);`
55			`printf(" WR:%04lx", (REG32(rx_bd_base + (i << 3)) >> 13) & 0x1);`
56			`printf(" M:%04lx", (REG32(rx_bd_base + (i << 3)) >> 7) & 0x1);`
57			`printf(" OR:%04lx", (REG32(rx_bd_base + (i << 3)) >> 6) & 0x1);`
58			`printf(" IS:%04lx", (REG32(rx_bd_base + (i << 3)) >> 5) & 0x1);`
59			`printf(" DN:%04lx", (REG32(rx_bd_base + (i << 3)) >> 4) & 0x1);`
60			`printf(" TL:%04lx", (REG32(rx_bd_base + (i << 3)) >> 3) & 0x1);`
61			`printf(" SF:%04lx", (REG32(rx_bd_base + (i << 3)) >> 2) & 0x1);`
62			`printf(" CRC:%04lx", (REG32(rx_bd_base + (i << 3)) >> 1) & 0x1);`
63			`printf(" LC:%04lx", (REG32(rx_bd_base + (i << 3)) >> 0) & 0x1);`
64			`printf("\nRx Buffer Pointer: %08lx\n",`
65			`REG32(rx_bd_base + (i << 3) + 4));`
66			`}`
67	2	marcus.erl	`}`
68
69			`void show_buffer(unsigned long start_addr, unsigned long len)`
70			`{`
71	406	julius	`show_mem(start_addr, start_addr + len - 1);`
72	2	marcus.erl	`}`
73
74			`void show_rx_buffs(int max, int show_all)`
75			`{`
76
77	406	julius	`int i;`
78			`unsigned long rx_bd_base, rx_bd_num;`
79	2	marcus.erl
80	406	julius	`rx_bd_num = REG32(ETH_REG_BASE + ETH_RXBD_NUM);`
81			`rx_bd_base = ETH_BD_BASE + (rx_bd_num << 2);`
82	2	marcus.erl
83	406	julius	`for (i = 0; i <= max; i++) {`
84			`if (!(REG32(rx_bd_base + (i << 3)) & ETH_RX_BD_EMPTY)`
85			`\|\| show_all) {`
86			`printf("Rx BD No. %04x located at %08lx\n", i,`
87			`rx_bd_base + (i << 3));`
88			`show_rx_bd(i, i);`
89			`show_buffer(REG32(rx_bd_base + (i << 3) + 4),`
90			`REG32(rx_bd_base + (i << 3)) >> 16);`
91			`printf("\n");`
92			`}`
93			`if (REG32(rx_bd_base + (i << 3)) & ETH_RX_BD_WRAP)`
94			`return;`
95			`}`
96	2	marcus.erl	`}`
97
98			`void show_tx_buffs(int max)`
99			`{`
100	406	julius	`int i;`
101	2	marcus.erl
102	406	julius	`for (i = 0; i <= max; i++) {`
103			`if (1) {`
104			`printf("Tx BD No. %04x located at %08x\n", i,`
105			`ETH_BD_BASE + (i << 3));`
106			`show_tx_bd(i, i);`
107			`show_buffer(REG32(ETH_BD_BASE + (i << 3) + 4),`
108			`REG32(ETH_BD_BASE + (i << 3)) >> 16);`
109			`printf("\n");`
110			`}`
111			`if (REG32(ETH_BD_BASE + (i << 3)) & ETH_TX_BD_WRAP)`
112			`return;`
113			`}`
114	2	marcus.erl	`}`
115
116	406	julius	`void show_phy_reg(unsigned long start_addr, unsigned long stop_addr)`
117	2	marcus.erl	`{`
118
119	406	julius	`unsigned long addr;`
120	2	marcus.erl
121	406	julius	`if (start_addr == stop_addr) {`
122			`printf("\nSet MII RGAD ADDRESS to %08lx", start_addr);`
123			`printf("\nMII Command = Read Status\n");`
124			`}`
125	2	marcus.erl
126	406	julius	`for (addr = start_addr; addr <= stop_addr; addr++) {`
127			`REG32(ETH_REG_BASE + ETH_MIIADDRESS) = addr << 8;`
128			`REG32(ETH_REG_BASE + ETH_MIICOMMAND) = ETH_MIICOMMAND_RSTAT;`
129	2	marcus.erl
130	406	julius	`printf("PHY %04lx",`
131			`REG32(ETH_REG_BASE + ETH_MIIADDRESS) & 0x1f);`
132			`printf(", addr %04lx",`
133			`REG32(ETH_REG_BASE + ETH_MIIADDRESS) >> 8);`
134			`printf(": %08lx\n", REG32(ETH_REG_BASE + ETH_MIIRX_DATA));`
135			`}`
136	2	marcus.erl	`}`
137
138	406	julius	`void set_phy_reg(unsigned long addr, unsigned long val)`
139	2	marcus.erl	`{`
140	406	julius	`printf("\nSet MII RGAD ADDRESS to %08lx", addr);`
141	2	marcus.erl
142	406	julius	`REG32(ETH_REG_BASE + ETH_MIIADDRESS) = addr << 8;`
143	2	marcus.erl
144	406	julius	`printf("\nMII Command = Write Control Data\n");`
145			`REG32(ETH_REG_BASE + ETH_MIICOMMAND) = ETH_MIICOMMAND_WCTRLDATA;`
146	2	marcus.erl
147	406	julius	`REG32(ETH_REG_BASE + ETH_MIITX_DATA) = val;`
148	2	marcus.erl
149	406	julius	`show_phy_reg(addr, addr);`
150	2	marcus.erl	`}`
151
152	406	julius	`void send_packet(unsigned long len, unsigned long start_data,`
153			`int num_of_packets)`
154	2	marcus.erl	`{`
155	406	julius	`unsigned long i, TxBD;`
156	2	marcus.erl
157	406	julius	`while (num_of_packets--) {`
158			`unsigned long data = (unsigned long )eth_get_tx_buf();`
159	2	marcus.erl
160	406	julius	`/* Set dest & src address */`
161			`*data++ = dest_mac_addr[0] << 24 \|`
162			`dest_mac_addr[1] << 16 \|`
163			`dest_mac_addr[2] << 8 \| dest_mac_addr[3] << 0;`
164	2	marcus.erl
165	406	julius	`*data++ = dest_mac_addr[4] << 24 \|`
166			`dest_mac_addr[5] << 16 \|`
167			`ETH_MACADDR0 << 8 \| ETH_MACADDR1 << 0;`
168	2	marcus.erl
169	406	julius	`*data++ = ETH_MACADDR2 << 24 \|`
170			`ETH_MACADDR3 << 16 \| ETH_MACADDR4 << 8 \| ETH_MACADDR5 << 0;`
171	2	marcus.erl
172	406	julius	`/* Write data to buffer */`
173			`for (i = 12; i < len; i += 4)`
174			`*data++ =`
175			`(i + start_data - 12) << 24 \| (i + start_data + 1 -`
176			`12) << 16 \| (i +`
177			`start_data`
178			`+ 2 -`
179			`12) << 8`
180			`\| (i + start_data + 3 - 12);`
181	2	marcus.erl
182	406	julius	`eth_send(data, len);`
183			`printf(".");`
184			`}`
185	2	marcus.erl	`}`
186
187	406	julius	`int eth_init_cmd(int argc, char *argv[])`
188	2	marcus.erl	`{`
189	406	julius	`if (argc)`
190			`return -1;`
191			`eth_init(0);`
192			`return 0;`
193	2	marcus.erl	`}`
194
195	406	julius	`int show_txbd_cmd(int argc, char *argv[])`
196	2	marcus.erl	`{`
197	406	julius	`int i;`
198			`int start, max;`
199
200			`if (argc == 1)`
201			`show_tx_bd(strtoul(argv[0], NULL, 0),`
202			`strtoul(argv[0], NULL, 0));`
203			`else if (argc == 2)`
204			`show_tx_bd(strtoul(argv[0], NULL, 0),`
205			`strtoul(argv[1], NULL, 0));`
206			`else`
207			`show_tx_bd(0, 63);`
208			`return 0;`
209	2	marcus.erl	`}`
210
211	406	julius	`int show_rxbd_cmd(int argc, char *argv[])`
212	2	marcus.erl	`{`
213	406	julius	`if (argc == 1)`
214			`show_rx_bd(strtoul(argv[0], NULL, 0),`
215			`strtoul(argv[0], NULL, 0));`
216			`else if (argc == 2)`
217			`show_rx_bd(strtoul(argv[0], NULL, 0),`
218			`strtoul(argv[1], NULL, 0));`
219			`else`
220			`show_rx_bd(0, 63);`
221			`return 0;`
222	2	marcus.erl	`}`
223
224	406	julius	`int send_packet_cmd(int argc, char *argv[])`
225	2	marcus.erl	`{`
226	406	julius	`if (argc == 1)`
227			`send_packet(strtoul(argv[0], NULL, 0), 31, 1);`
228			`else if (argc == 2)`
229			`send_packet(strtoul(argv[0], NULL, 0),`
230			`strtoul(argv[1], NULL, 0), 1);`
231			`else if (argc == 3)`
232			`send_packet(strtoul(argv[0], NULL, 0),`
233			`strtoul(argv[1], NULL, 0), strtoul(argv[2], NULL,`
234			`0));`
235			`else`
236			`return -1;`
237			`return 0;`
238	2	marcus.erl	`}`
239
240	406	julius	`int set_dest_addr_cmd(int argc, char *argv[])`
241	2	marcus.erl	`{`
242	406	julius	`if (argc == 3) {`
243			`dest_mac_addr[0] = (strtoul(argv[0], NULL, 0) >> 8) & 0xff;`
244			`dest_mac_addr[1] = (strtoul(argv[0], NULL, 0) >> 0) & 0xff;`
245			`dest_mac_addr[2] = (strtoul(argv[1], NULL, 0) >> 8) & 0xff;`
246			`dest_mac_addr[3] = (strtoul(argv[1], NULL, 0) >> 0) & 0xff;`
247			`dest_mac_addr[4] = (strtoul(argv[2], NULL, 0) >> 8) & 0xff;`
248			`dest_mac_addr[5] = (strtoul(argv[2], NULL, 0) >> 0) & 0xff;`
249			`} else`
250			`return -1;`
251			`return 0;`
252	2	marcus.erl	`}`
253
254	406	julius	`int init_txbd_pool_cmd(int argc, char *argv[])`
255	2	marcus.erl	`{`
256			`#if 0`
257	406	julius	`if (argc == 1)`
258			`init_tx_bd_pool(strtoul(argv[0], NULL, 0));`
259			`else`
260			`return -1;`
261	2	marcus.erl	`#endif`
262	406	julius	`return 0;`
263	2	marcus.erl	`}`
264
265	406	julius	`int init_rxbd_pool_cmd(int argc, char *argv[])`
266	2	marcus.erl	`{`
267	406	julius	`//if (argc == 1) init_rx_bd_pool(strtoul (argv[0], NULL, 0));`
268			`//else return -1;`
269			`init_rx_bd_pool();`
270	140	julius
271	406	julius	`return 0;`
272	2	marcus.erl	`}`
273
274	406	julius	`int show_phy_reg_cmd(int argc, char *argv[])`
275	2	marcus.erl	`{`
276	406	julius	`if (argc == 1)`
277			`show_phy_reg(strtoul(argv[0], NULL, 0),`
278			`strtoul(argv[0], NULL, 0));`
279			`else if (argc == 2)`
280			`show_phy_reg(strtoul(argv[0], NULL, 0),`
281			`strtoul(argv[1], NULL, 0));`
282			`else`
283			`show_phy_reg(0, 30);`
284			`return 0;`
285	2	marcus.erl	`}`
286
287	406	julius	`int set_phy_reg_cmd(int argc, char *argv[])`
288	2	marcus.erl	`{`
289	406	julius	`if (argc == 2)`
290			`set_phy_reg(strtoul(argv[0], NULL, 0),`
291			`strtoul(argv[1], NULL, 0));`
292			`else`
293			`return -1;`
294			`return 0;`
295	2	marcus.erl	`}`
296
297	406	julius	`int show_mac_regs_cmd(int argc, char *argv[])`
298	2	marcus.erl	`{`
299	406	julius	`if (argc)`
300			`return -1;`
301			`printf("\n %08x", ETH_REG_BASE + ETH_MODER);`
302			`printf(" MODER: %08lx", REG32(ETH_REG_BASE + ETH_MODER));`
303	2	marcus.erl
304	406	julius	`printf("\n %08x", ETH_REG_BASE + ETH_INT);`
305			`printf(" INT: %08lx", REG32(ETH_REG_BASE + ETH_INT));`
306	2	marcus.erl
307	406	julius	`printf("\n %08x", ETH_REG_BASE + ETH_INT_MASK);`
308			`printf(" INT_MASK: %08lx", REG32(ETH_REG_BASE + ETH_INT_MASK));`
309	2	marcus.erl
310	406	julius	`printf("\n %08x", ETH_REG_BASE + ETH_IPGT);`
311			`printf(" IPGT: %08lx", REG32(ETH_REG_BASE + ETH_IPGT));`
312	2	marcus.erl
313	406	julius	`printf("\n %08x", ETH_REG_BASE + ETH_IPGR1);`
314			`printf(" IPGR1: %08lx", REG32(ETH_REG_BASE + ETH_IPGR1));`
315	2	marcus.erl
316	406	julius	`printf("\n %08x", ETH_REG_BASE + ETH_IPGR2);`
317			`printf(" IPGR2: %08lx", REG32(ETH_REG_BASE + ETH_IPGR2));`
318	2	marcus.erl
319	406	julius	`printf("\n %08x", ETH_REG_BASE + ETH_PACKETLEN);`
320			`printf(" PACKETLEN: %08lx", REG32(ETH_REG_BASE + ETH_PACKETLEN));`
321	2	marcus.erl
322	406	julius	`printf("\n %08x", ETH_REG_BASE + ETH_COLLCONF);`
323			`printf(" COLLCONF: %08lx", REG32(ETH_REG_BASE + ETH_COLLCONF));`
324	2	marcus.erl
325	406	julius	`printf("\n %08x", ETH_REG_BASE + ETH_RXBD_NUM);`
326			`printf(" RX_BD_NUM: %08lx", REG32(ETH_REG_BASE + ETH_RXBD_NUM));`
327	2	marcus.erl
328	406	julius	`printf("\n %08x", ETH_REG_BASE + ETH_CTRLMODER);`
329			`printf(" CTRLMODER: %08lx", REG32(ETH_REG_BASE + ETH_CTRLMODER));`
330	2	marcus.erl
331	406	julius	`printf("\n %08x", ETH_REG_BASE + ETH_MIIMODER);`
332			`printf(" MIIMODER: %08lx", REG32(ETH_REG_BASE + ETH_MIIMODER));`
333	2	marcus.erl
334	406	julius	`printf("\n %08x", ETH_REG_BASE + ETH_MIICOMMAND);`
335			`printf(" MIICOMMAND: %08lx", REG32(ETH_REG_BASE + ETH_MIICOMMAND));`
336	2	marcus.erl
337	406	julius	`printf("\n %08x", ETH_REG_BASE + ETH_MIIADDRESS);`
338			`printf(" MIIADDRESS: %08lx", REG32(ETH_REG_BASE + ETH_MIIADDRESS));`
339	2	marcus.erl
340	406	julius	`printf("\n %08x", ETH_REG_BASE + ETH_MIITX_DATA);`
341			`printf(" MIITX_DATA: %08lx", REG32(ETH_REG_BASE + ETH_MIITX_DATA));`
342	2	marcus.erl
343	406	julius	`printf("\n %08x", ETH_REG_BASE + ETH_MIIRX_DATA);`
344			`printf(" MIIRX_DATA: %08lx", REG32(ETH_REG_BASE + ETH_MIIRX_DATA));`
345	2	marcus.erl
346	406	julius	`printf("\n %08x", ETH_REG_BASE + ETH_MIISTATUS);`
347			`printf(" MIISTATUS: %08lx", REG32(ETH_REG_BASE + ETH_MIISTATUS));`
348	2	marcus.erl
349	406	julius	`printf("\n %08x", ETH_REG_BASE + ETH_MAC_ADDR0);`
350			`printf(" MAC_ADDR0: %08lx", REG32(ETH_REG_BASE + ETH_MAC_ADDR0));`
351	2	marcus.erl
352	406	julius	`printf("\n %08x", ETH_REG_BASE + ETH_MAC_ADDR1);`
353			`printf(" MAC_ADDR1: %08lx", REG32(ETH_REG_BASE + ETH_MAC_ADDR1));`
354	2	marcus.erl
355	406	julius	`printf("\n %08x", ETH_REG_BASE + ETH_HASH_ADDR0);`
356			`printf(" ETH_HASH_ADDR0: %08lx", REG32(ETH_REG_BASE + ETH_HASH_ADDR0));`
357	2	marcus.erl
358	406	julius	`printf("\n %08x", ETH_REG_BASE + ETH_HASH_ADDR1);`
359			`printf(" ETH_HASH_ADDR1: %08lx", REG32(ETH_REG_BASE + ETH_HASH_ADDR1));`
360	2	marcus.erl
361	406	julius	`printf("\n");`
362			`return 0;`
363	2	marcus.erl	`}`
364
365	406	julius	`int eth_int_enable_cmd(int argc, char *argv[])`
366	2	marcus.erl	`{`
367	406	julius	`if (argc)`
368			`return -1;`
369			`eth_int_enable();`
370			`return 0;`
371	2	marcus.erl	`}`
372	406	julius
373			`int show_rx_buffs_cmd(int argc, char *argv[])`
374	2	marcus.erl	`{`
375	406	julius	`if (argc == 0)`
376			`show_rx_buffs(63, 0);`
377			`else if (argc == 1)`
378			`show_rx_buffs(63, 1);`
379			`else`
380			`return -1;`
381			`return 0;`
382	2	marcus.erl	`}`
383
384	406	julius	`int show_tx_buffs_cmd(int argc, char *argv[])`
385	2	marcus.erl	`{`
386	406	julius	`if (argc == 0)`
387			`show_tx_buffs(63);`
388			`else`
389			`return -1;`
390			`return 0;`
391	2	marcus.erl	`}`
392			`#endif`
393
394			`int eth_conf_cmd(int argc, char *argv[])`
395			`{`
396	406	julius	`switch (argc) {`
397			`case 0:`
398			`printf("IP: %s", inet_ntoa(global.ip));`
399			`printf("\nmask: %s", inet_ntoa(global.mask));`
400			`printf("\nGW: %s", inet_ntoa(global.gw_ip));`
401			`return 0;`
402			`case 3:`
403			`global.gw_ip = inet_aton(argv[2]);`
404			`case 2:`
405			`global.mask = inet_aton(argv[1]);`
406			`case 1:`
407			`global.ip = inet_aton(argv[0]);`
408			`break;`
409			`}`
410			`printf("Restarting network with new parameters...");`
411			`NetStartAgain();`
412	2	marcus.erl
413	406	julius	`return 0;`
414	2	marcus.erl	`}`
415
416	140	julius	`void toggle_eth_traffic_monitor_cmd(void)`
417			`{`
418	406	julius	`eth_toggle_traffic_mon();`
419	140	julius	`}`
420
421	406	julius	`void module_eth_init(void)`
422	2	marcus.erl	`{`
423	140	julius	`#if 1`
424	406	julius	`register_command("eth_init", "", "init ethernet", eth_init_cmd);`
425			`register_command("show_txbd", "[<start BD>] [<max>]",`
426			`"show Tx buffer desc", show_txbd_cmd);`
427			`register_command("show_rxbd", "[<start BD>] [<max>]",`
428			`"show Rx buffer desc", show_rxbd_cmd);`
429			`register_command("send_packet",`
430			`"<length> [<start data>] [<num_of_packets>]",`
431			`"create & send packet(s)", send_packet_cmd);`
432			`register_command("set_dest_addr", "<addrhi> <addrmid> <addrlo>",`
433			`"set destination address (for send_packet)",`
434			`set_dest_addr_cmd);`
435			`register_command("init_txbd_pool", "<max>",`
436			`"initialize Tx buffer descriptors",`
437			`init_txbd_pool_cmd);`
438			`register_command("init_rxbd_pool", "<max>",`
439			`"initialize Rx buffer descriptors",`
440			`init_rxbd_pool_cmd);`
441			`register_command("show_phy_reg", "[<start_addr>] [<end addr>]",`
442			`"show PHY registers", show_phy_reg_cmd);`
443			`register_command("set_phy_reg", "<addr> <value>", "set PHY register",`
444			`set_phy_reg_cmd);`
445			`register_command("show_mac_regs", "", "show all MAC registers",`
446			`show_mac_regs_cmd);`
447			`register_command("eth_int_enable", "", "enable ethernet interrupt",`
448			`eth_int_enable_cmd);`
449			`register_command("show_rx_buffs", "[<show_all>]",`
450			`"show receive buffers (optional arg will also show empty buffers)",`
451			`show_rx_buffs_cmd);`
452			`register_command("show_tx_buffs", "", "show transmit buffers",`
453			`show_rx_buffs_cmd);`
454			`register_command("eth_toggle_mon", "", "Toggle traffic monitor",`
455			`toggle_eth_traffic_monitor_cmd);`
456	2	marcus.erl	`#endif`
457	406	julius	`/* Initialize controller */`
458			`register_command("eth_conf", "[<ip> [<mask> [<gw>]]]",`
459			`"Get/set ethernet configuration", eth_conf_cmd);`
460	2	marcus.erl	`#if 0`
461	406	julius	`eth_init();`
462			`printf("Ethernet not initialized (run eth_init command)\n");`
463			`init_rx_bd_pool(0);`
464			`init_tx_bd_pool(3);`
465	2	marcus.erl	`#endif`
466			`}`

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