OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [bootloaders/] [orpmon/] [common/] [support.c] - Blame information for rev 248

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 marcus.erl
/* Support */
2
 
3 246 julius
#include "spr-defs.h"
4 2 marcus.erl
#include "support.h"
5
#include "common.h"
6
#include "int.h"
7
 
8
#include <ctype.h>
9
 
10
volatile unsigned long timestamp = 0;
11
 
12
void int_main(void);
13
 
14
/* return value by making a syscall */
15
void exit (int i)
16
{
17
  asm("l.add r3,r0,%0": : "r" (i));
18
  asm("l.nop %0": :"K" (NOP_EXIT));
19
  while (1);
20
}
21
 
22
/* activate printf support in simulator */
23
void __printf(const char *fmt, ...)
24
{
25 140 julius
#if 0
26 2 marcus.erl
  va_list args;
27
  va_start(args, fmt);
28
  __asm__ __volatile__ ("  l.addi\tr3,%1,0\n \
29
                           l.addi\tr4,%2,0\n \
30
                           l.nop %0": :"K" (NOP_PRINTF), "r" (fmt), "r"  (args) : "r3", "r4");
31 140 julius
#endif
32 2 marcus.erl
}
33
 
34
/* print long */
35
void report(unsigned long value)
36
{
37
  asm("l.addi\tr3,%0,0": :"r" (value));
38
  asm("l.nop %0": :"K" (NOP_REPORT));
39
}
40
 
41
/* just to satisfy linker */
42
void __main(void)
43
{
44
}
45
 
46
/* For writing into SPR. */
47
void mtspr(unsigned long spr, unsigned long value)
48
{
49
  asm("l.mtspr\t\t%0,%1,0": : "r" (spr), "r" (value));
50
}
51
 
52
/* For reading SPR. */
53
unsigned long mfspr(unsigned long spr)
54
{
55
  unsigned long value;
56
  asm("l.mfspr\t\t%0,%1,0" : "=r" (value) : "r" (spr));
57
  return value;
58
}
59
 
60
 
61
 
62
/* Parses hex or decimal number */
63
unsigned long strtoul (const char *str, char **endptr, int base)
64
{
65
 
66
  {
67
 
68
    unsigned long number = 0;
69
    char *pos = (char *) str;
70
    char *fail_char = (char *) str;
71
 
72
 
73
  while (isspace(*pos)) pos++;  /* skip leading whitespace */
74
 
75
  if ((base == 16) && (*pos == '0')) { /* handle option prefix */
76
    ++pos;
77
    fail_char = pos;
78
    if ((*pos == 'x') || (*pos == 'X')) ++pos;
79
  }
80
 
81
  if (base == 0) {               /* dynamic base */
82
    base = 10;          /* default is 10 */
83
    if (*pos == '0') {
84
      ++pos;
85
      base -= 2;                /* now base is 8 (or 16) */
86
      fail_char = pos;
87
      if ((*pos == 'x') || (*pos == 'X')) {
88
        base += 8;      /* base is 16 */
89
        ++pos;
90
      }
91
    }
92
  }
93
 
94
  /* check for illegal base */
95
  if ( !((base < 2) || (base > 36)) )
96
    while (1) {
97
      int digit = 40;
98
      if ((*pos >= '0') && (*pos <= '9')) {
99
          digit = (*pos - '0');
100
      } else if (*pos >= 'a') {
101
          digit = (*pos - 'a' + 10);
102
      } else if (*pos >= 'A') {
103
          digit = (*pos - 'A' + 10);
104
      } else break;
105
 
106
      if (digit >= base) break;
107
 
108
      fail_char = ++pos;
109
      number = number * base + digit;
110
    }
111
 
112
  if (endptr) *endptr = fail_char; {
113
    return number;
114
  }
115
  }
116
}
117
 
118
unsigned long get_timer (unsigned long base)
119
{
120 140 julius
  /*
121 2 marcus.erl
__printf("%s - %s: %d\n", __FILE__, __FUNCTION__, __LINE__);
122
__printf("   timestamp = %.8lx base = %.8lx\n", timestamp, base);
123 140 julius
  */
124 2 marcus.erl
  return (timestamp - base);
125
}
126
 
127
void set_timer (unsigned long t)
128
{
129
  timestamp = t;
130
}
131
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.