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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [bootloaders/] [orpmon/] [drivers/] [sdc.c] - Blame information for rev 610

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Line No. Rev Author Line
1 389 tac2 
#include "sdc.h"
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volatile sd_card dev;
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void reset_card()
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{
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    SD_REG(SD_ARG)   = 0;
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    SD_REG(SD_COMMAND) = 0;
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    return;
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}
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unsigned char sd_wait_rsp()
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{
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  volatile unsigned long r1, r2;
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 //Polling for timeout and command complete
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 while (1 )
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 {
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  r1= SD_REG(SD_ERROR_INT_STATUS);
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  r2= SD_REG(SD_NORMAL_INT_STATUS);
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   if (( r1 & CMD_TIMEOUT ) == CMD_TIMEOUT)
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          return 0;
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   else if ((r2  & CMD_COMPLETE ) == CMD_COMPLETE)
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          return 1;
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 }
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  //Later Exception restart module
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  return 0;
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}
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int setup_bd_transfer(boolean direction, int block_addr, volatile unsigned char *buff)
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{
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     int offset;
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     int block_addr_sd;
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   //debug("Read mmc_read_block %d to addr %d \n", block_number, buff_addr);
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        // debug("read  %d to addr %d \n", block_number, buff_addr);
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    if (dev.phys_spec_2_0 && dev.cid_reg !=66848)
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       block_addr_sd=block_addr;
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    else
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        block_addr_sd=(block_addr<<9);
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    if (direction)
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    {
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        SD_REG(BD_TX)  = buff;
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        SD_REG(BD_TX)  = block_addr_sd;
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        return TRUE;
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    }
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    else
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    {
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        SD_REG(BD_RX)  = buff;
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        SD_REG(BD_RX)  = block_addr_sd;
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        return TRUE;
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    }
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}
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int finnish_bd_transfer()
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{
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    volatile  unsigned long rtn_reg=0;
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    rtn_reg= SD_REG(BD_ISR);
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    while ( rtn_reg==0 ){
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                rtn_reg= SD_REG(BD_ISR) ;
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        }
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        SD_REG(BD_ISR) =0;
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    if ( rtn_reg & 0x1)
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    {
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        DBGA("\n Data transfer succesful\n");
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        return TRUE;
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    }
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    else
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    {
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        DBGA("Data transfer failed, rtn %x\n",rtn_reg);
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        return FALSE;
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    }
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}
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82 
 
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int sd_setup_transfer (sd_card sd_card_0)
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{
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    DBGA("Set up transfer\n");
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         //Put in transfer state
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    SD_REG(SD_COMMAND) = CMD7 | CICE | CRCE | RSP_48;
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    SD_REG(SD_ARG)=sd_card_0.rca | 0xf0f0;
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    if (!sd_wait_rsp()){
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            DBGA("Go send failed TO:/!\n");
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            return FALSE;
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    }
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    else if (   SD_REG(SD_RESP1) == (CARD_STATUS_STB  |  READY_FOR_DATA ) )
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        DBGA("Ready to transfer data!\n");
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    else{
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        DBGA("Card not ready for data %x \n",  SD_REG(SD_RESP1) );
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        return FALSE;
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    }
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    //Set block size
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102 
    if (!setBLockLength())
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         return FALSE;
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    //Set Bus width to 4, CMD55 followed by ACMD 6
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     SD_REG(SD_COMMAND) = CMD55|RSP_48;
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     SD_REG(SD_ARG) =sd_card_0.rca | 0xf0f0;
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    if (!sd_wait_rsp())
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    {
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            DBGA("CMD55 send failed :/!\n");
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            return FALSE;
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    }
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     SD_REG(SD_COMMAND) = ACMD6 | CICE | CRCE | RSP_48;
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     SD_REG(SD_ARG)=0x2;
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    if (!sd_wait_rsp())
118 
    {
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            DBGA("ACMD6 send failed :/!\n");
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            return FALSE;
121 
    }
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123 
 
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    DBGA("Card Status reg ACMD6: 0x%x \n", SD_REG(SD_RESP1)  );
125 
    DBGA("FREE BD TX/RX: 0x%x \n", SD_REG(BD_STATUS)  ) ;
126 
    DBGA("CARD in Transfer state\n");
127 
        return TRUE;
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129 
}
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131 
int setBLockLength(void){
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        SD_REG(SD_COMMAND) = CMD16 | CICE | CRCE | RSP_48;
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                SD_REG(SD_ARG)=512;
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                if (!sd_wait_rsp()){
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                                DBGA("Set block size failed :/!\n");
137 
                return FALSE;}
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                DBGA("Set block size to 512 Succes, resp 0x%x \n", SD_REG(SD_RESP1));
139 
        return TRUE;
140 
}
141 
int memCardInit(void)
142 
{
143 
 
144 
    volatile unsigned long rtn_reg=0;
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    volatile  unsigned long rtn_reg1=0;
146 
 
147 
 
148 
    SD_REG(SD_TIMEOUT)=0x28FF;
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    SD_REG(SD_SOFTWARE_RST)=1;
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151 
    SD_REG(SD_CLOCK_D)  =0;
152 
    SD_REG(SD_SOFTWARE_RST)=0;
153 
 
154 
    reset_card();
155 
    sd_wait_rsp();
156 
       DBGA("sd reset \n");
157 
 
158 
    SD_REG(SD_COMMAND) = ( CMD8 | CICE | CRCE | RSP_48);
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    SD_REG(SD_ARG) = VHS|CHECK_PATTERN;
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161 
    dev.phys_spec_2_0 = sd_wait_rsp();
162 
    reset_card;
163 
    sd_wait_rsp();
164 
     if (dev.phys_spec_2_0)
165 
     {
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167 
        rtn_reg=0;
168 
        while ((rtn_reg & BUSY) != BUSY)
169 
        {
170 
            SD_REG(SD_COMMAND) = CMD55|RSP_48;
171 
            SD_REG(SD_ARG) =0;
172 
            if (!sd_wait_rsp())
173 
                return FALSE;
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175 
            SD_REG(SD_COMMAND) =ACMD41 | RSP_48;
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            SD_REG(SD_ARG)   = 0x40000000 | 0xFF8000;
177 
            if (!sd_wait_rsp())
178 
                return FALSE;
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180 
            rtn_reg= SD_REG(SD_RESP1);
181 
        }
182 
        dev.Voltage_window=rtn_reg&VOLTAGE_MASK;
183 
        dev.HCS_s = 0;
184 
 
185 
    }
186 
    else
187 
    {
188 
        DBGA("SDC 1.xx card \n");
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        SD_REG(SD_ARG)   =0x0000;
190 
        SD_REG(SD_COMMAND) =0x0000;
191 
        while (REG32(SDC_CONTROLLER_BASE+SD_STATUS)& 1) {}
192 
 
193 
        rtn_reg=0;
194 
 
195 
        while ((rtn_reg & BUSY) != BUSY)
196 
        {
197 
            SD_REG(SD_COMMAND) = CMD55|RSP_48;
198 
            SD_REG(SD_ARG) = 0;
199 
            if (!sd_wait_rsp())
200 
            {
201 
                rtn_reg= SD_REG(SD_RESP1) ;
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                DBGA("FAIL rtn CMD55 %x\n", rtn_reg);
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                   return FALSE;
204 
            }
205 
            SD_REG(SD_COMMAND) =ACMD41 | RSP_48;
206 
            SD_REG(SD_ARG) = 0;
207 
            if (!sd_wait_rsp())
208 
            {
209 
                rtn_reg= SD_REG(SD_RESP1) ;
210 
                DBGA("FAIL rtn ACMD41 %x\n", rtn_reg);
211 
                   return FALSE;
212 
            }
213 
            rtn_reg= SD_REG(SD_RESP1) ;
214 
            DBGA("rtn ACMD41 %x\n", rtn_reg);
215 
        }
216 
        dev.Voltage_window=rtn_reg&VOLTAGE_MASK;
217 
        dev.HCS_s = 0;
218 
 
219 
    }
220 
    DBGA("get cid \n");
221 
    SD_REG(SD_COMMAND) =CMD2 | RSP_146;
222 
    SD_REG(SD_ARG) =0;
223 
    if (!sd_wait_rsp())
224 
             return FALSE;
225 
 
226 
    DBGA("get rca \n");
227 
    SD_REG(SD_COMMAND) = CMD3 | CICE | CRCE | RSP_48;
228 
    SD_REG(SD_ARG) = 0;
229 
    if (!sd_wait_rsp()){
230 
        DBGA("rca failed \n");
231 
        return FALSE;
232 
    }
233 
    rtn_reg = SD_REG(SD_RESP1);
234 
    dev.rca = ((rtn_reg&RCA_RCA_MASK));
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236 
   SD_REG(SD_COMMAND) = CMD9 | RSP_146;
237 
                        SD_REG(SD_ARG)=0;
238 
                        if (!sd_wait_rsp())
239 
                              DBGA("NO CID! \n");
240 
                        dev.cid_reg = SD_REG(SD_RESP1);
241 
 
242 
    dev.Active=1;
243 
    return sd_setup_transfer(dev);
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246 
}

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