OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [bootloaders/] [orpmon/] [drivers/] [spi.c] - Blame information for rev 314

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 marcus.erl
#include "support.h"
2
#include "board.h"
3
#include "spi.h"
4
 
5
 
6
#define SPI_XMIT()                              \
7
        REG32(SPI_BASE + SPI_CTRL) |= SPI_CTRL_GO;         \
8
        while(REG32(SPI_BASE + SPI_CTRL) & SPI_CTRL_BSY)
9
 
10
void spi_init (int slave, int fq, int bit_nb, int lsb, int tx_pol, int rx_pol)
11
{
12
        int ctrl = 0;
13
 
14
        /* Set devider register to obtain desired serial clock frequency */
15
        REG32(SPI_BASE + SPI_DEVIDER) =  IN_CLK/(fq*2) - 1;
16
 
17
        /* Set control register */
18
        ctrl = bit_nb << 3;
19
        ctrl |= lsb ? SPI_CTRL_LSB : 0;
20
        ctrl |= tx_pol ? SPI_CTRL_TX_NEGEDGE : 0;
21
        ctrl |= rx_pol ? SPI_CTRL_RX_NEGEDGE : 0;
22
        REG32(SPI_BASE + SPI_CTRL) = ctrl;
23
 
24
        /* Activate desired slave device */
25
        REG32(SPI_BASE + SPI_SS) = 1 << slave;
26
}
27
 
28
unsigned long spi_xmit (unsigned long val)
29
{
30
        REG32(SPI_BASE + SPI_TX) = val;
31
        SPI_XMIT();
32
        return REG32(SPI_BASE + SPI_RX);
33
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.