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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [bootloaders/] [orpmon/] [include/] [board.h] - Blame information for rev 651

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Line No. Rev Author Line
1 2 marcus.erl
#ifndef _BOARD_H_
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#define _BOARD_H_
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4 140 julius
#define CFG_IN_FLASH            0
5 2 marcus.erl
 
6
//LAN controller 
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//#define SMC91111_LAN          1
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#define OC_LAN                  1
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/* BOARD
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 * 0 - bender
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 * 1 - marvin
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 * 2 - ORSoC A3PE1500 board
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 * 3 - ORSoC A3P1000 board
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 * 4 - ML501
16 2 marcus.erl
 */
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#define BOARD                   2
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/* Ethernet IP and TFTP config
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 * 0 - JB ORSoC board
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 * 1 - AE ORSoC board
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 * 2 - JB Southpole board
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 * 3 - JB ORSoC board 2
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 * 4 - Unassigned
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 */
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#define IPCONFIG                 3
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28 2 marcus.erl
#if BOARD==0
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// Nibbler on bender1
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#  define FLASH_BASE_ADDR         0xf0000000
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#  define FLASH_SIZE              0x02000000
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#  define FLASH_BLOCK_SIZE        0x00020000
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#  define START_ADD               0x0
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#  define CONFIG_OR32_MC_VERSION  2
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#  define IN_CLK                  25000000
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#  define BOARD_DEF_NAME          "bender"
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// Flash Organization on board
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// FLASH_ORG_XX_Y
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// where XX - flash bit size
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//       Y  - number of parallel devices connected
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#  define FLASH_ORG_16_1          1
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#elif BOARD==1
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//Marvin
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#  define FLASH_BASE_ADDR         0xf0000000
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#  define FLASH_SIZE              0x04000000
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#  define FLASH_BLOCK_SIZE        0x00040000
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#  define START_ADD               0x0
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#  define CONFIG_OR32_MC_VERSION  1
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#  define IN_CLK                  50000000
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#  define FLASH_ORG_16_2          1
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#  define BOARD_DEF_NAME          "marvin"
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#elif BOARD==2
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//ORSoC ordb1a3pe1500
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#  define SDRAM_SIZE              0x02000000
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#  define SDRAM_ROW_SIZE          0x00000400
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#  define SDRAM_BANK_SIZE         0x00800000
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#  define IN_CLK                  20000000
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#  define BOARD_DEF_NAME          "ORSoC devboard"
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#elif BOARD==3
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//ORSoC ordb1a3p1000
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#  define SDRAM_SIZE              0x02000000
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#  define SDRAM_ROW_SIZE          0x00000400
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#  define SDRAM_BANK_SIZE         0x00800000
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#  define IN_CLK                  25000000
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#  define BOARD_DEF_NAME          "ORSoC A3P1000 devboard"
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#elif BOARD==4
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//Xilinx ML501
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#  define SDRAM_SIZE              0x10000000
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#  define SDRAM_ROW_SIZE          0x00000400
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#  define SDRAM_BANK_SIZE         0x00800000
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#  define IN_CLK                  50000000
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#  define BOARD_DEF_NAME          "Xilinx ML501"
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80 2 marcus.erl
#else
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//Custom Board
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83 2 marcus.erl
#  define IN_CLK                  25000000
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#  define BOARD_DEF_NAME          "custom"
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#endif
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// IP tboot configs
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#if IPCONFIG==0
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#define BOARD_DEF_IP            0xc0a8649b // 192.168.100.155
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#define BOARD_DEF_MASK          0xffffff00 // 255.255.255.0
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#define BOARD_DEF_GW            0xc0a86401 // 192.168.100.1
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#define BOARD_DEF_TBOOT_SRVR    0xc0a86469 //"192.168.100.105"
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#define BOARD_DEF_IMAGE_NAME    "boot.img"
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#define ETH_MDIOPHYADDR         0x00
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#define ETH_MACADDR0            0x00
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#define ETH_MACADDR1            0x12
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#define ETH_MACADDR2            0x34
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#define ETH_MACADDR3            0x56
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#define ETH_MACADDR4            0x78
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#define ETH_MACADDR5            0x9a
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#elif IPCONFIG==1
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#define BOARD_DEF_IP            0xc0a8649c // 192.168.100.156
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#define BOARD_DEF_MASK          0xffffff00 // 255.255.255.0
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#define BOARD_DEF_GW            0xc0a86401 // 192.168.100.1
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#define BOARD_DEF_TBOOT_SRVR    0xc0a864e3 //"192.168.100.227"
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#define BOARD_DEF_IMAGE_NAME    "boot.img"
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#define ETH_MDIOPHYADDR         0x00
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#define ETH_MACADDR0            0x00
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#define ETH_MACADDR1            0x12
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#define ETH_MACADDR2            0x34
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#define ETH_MACADDR3            0x56
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#define ETH_MACADDR4            0x78
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#define ETH_MACADDR5            0x9b
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#elif IPCONFIG==2
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#define BOARD_DEF_IP            0xac1e0002 // 172.30.0.2
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#define BOARD_DEF_MASK          0xffff0000 // 255.255.0.0
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#define BOARD_DEF_GW            0xac1e0001 //"172.30.0.1"
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#define BOARD_DEF_TBOOT_SRVR    0xac1e0001 //"172.30.0.1"
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#define BOARD_DEF_IMAGE_NAME    "boot.img"
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#define ETH_MDIOPHYADDR         0x00
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#define ETH_MACADDR0            0x00
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#define ETH_MACADDR1            0x12
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#define ETH_MACADDR2            0x34
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#define ETH_MACADDR3            0x56
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#define ETH_MACADDR4            0x78
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#define ETH_MACADDR5            0x9c
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#elif IPCONFIG==3 // JB ORSoC board 2
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#define BOARD_DEF_IP            0xc0a8005a // 192.168.0.90
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#define BOARD_DEF_MASK          0xffffff00 // 255.255.255.0
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#define BOARD_DEF_GW            0xc0a80001 // 192.168.0.1
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#define BOARD_DEF_TBOOT_SRVR    0xc0a8000f // 192.168.0.15
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#define BOARD_DEF_IMAGE_NAME    "boot.img"
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#define ETH_MDIOPHYADDR         0x00
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#define ETH_MACADDR0            0x00
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#define ETH_MACADDR1            0x12
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#define ETH_MACADDR2            0x34
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#define ETH_MACADDR3            0x56
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#define ETH_MACADDR4            0x78
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#define ETH_MACADDR5            0x9d
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#elif IPCONFIG==4 // Unassigned config...
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#define BOARD_DEF_IP            0x0a01010a // 10.1.1.10
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#define BOARD_DEF_MASK          0xffffff00 // 255.255.255.0
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#define BOARD_DEF_GW            0x0a010101 // 10.1.1.1
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#define BOARD_DEF_TBOOT_SRVR    0x0a010101 // 10.1.1.1
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#define BOARD_DEF_IMAGE_NAME    "boot.img"
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#define ETH_MDIOPHYADDR         0x00
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#define ETH_MACADDR0            0x00
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#define ETH_MACADDR1            0x01
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#define ETH_MACADDR2            0x34
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#define ETH_MACADDR3            0x56
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#define ETH_MACADDR4            0x78
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#define ETH_MACADDR5            0x9e
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#endif
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167 2 marcus.erl
 
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169 2 marcus.erl
#define TICKS_PER_SEC           100
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#define MS_PER_SEC 1000
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#define US_PER_SEC 1000000
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#define US_PER_TICK (US_PER_SEC/TICKS_PER_SEC)
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#define TICKS_PER_US (TICKS_PER_SEC*1000000)
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176 2 marcus.erl
#define STACK_SIZE              0x10000
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/* UART core defines */
179 2 marcus.erl
#define UART_BASE               0x90000000
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#define UART_IRQ                2
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#define UART_BAUD_RATE          115200
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/* Ethernet core defines */
184 2 marcus.erl
#define ETH_BASE                0x92000000
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#define ETH_IRQ                 4
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#define ETH_DATA_BASE  ((((unsigned long)&_stack_top) + 16) & ~0x3)
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#define SPI_BASE                0xb0000000
188 2 marcus.erl
#define CRT_BASE_ADDR           0x97000000
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#define ATA_BASE_ADDR           0x9e000000
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#define KBD_BASE_ADD            0x94000000
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#define KBD_IRQ                 5
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#define SDC_CONTROLLER_BASE     0x9e000000
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195 140 julius
#define CRT_ENABLED             0
196 2 marcus.erl
#define FB_BASE_ADDR            0xa8000000
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/* Whether online help is available -- saves space */
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#define HELP_ENABLED            1
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/* Whether self check is enabled */
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#define SELF_CHECK              0
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/* Whether we have keyboard suppport */
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#define KBD_ENABLED             0
206 2 marcus.erl
 
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/* Keyboard buffer size */
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#define KBDBUF_SIZE             256
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/* Which console is used (CT_NONE, CT_SIM, CT_UART, CT_CRT) */
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#define CONSOLE_TYPE            CT_UART
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#endif

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