OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [bootloaders/] [orpmon/] [include/] [spi.h] - Blame information for rev 587

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 marcus.erl
extern void spi_init (int slave, int fq, int bit_nb, int lsb, int tx_pol, int rx_pol);
2
extern unsigned long spi_xmit (unsigned long val);
3
 
4
/* SPI register offsets */
5
#define SPI_RX          0x00
6
#define SPI_TX          0x00
7
#define SPI_CTRL        0x04
8
#define SPI_DEVIDER     0x08
9
#define SPI_SS          0x0c
10
 
11
/* SPI control register bits */
12
#define SPI_CTRL_IE             0x00000200
13
#define SPI_CTRL_LSB            0x00000100
14
#define SPI_CTRL_TX_NEGEDGE     0x00000004
15
#define SPI_CTRL_RX_NEGEDGE     0x00000002
16
#define SPI_CTRL_GO             0x00000001
17
#define SPI_CTRL_BSY            0x00000001

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.