OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [bootloaders/] [orpmon/] [ram.ld] - Blame information for rev 193

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 140 julius
 
2
/* Seen 3 bad pages, 180-182 (0xb400-0xb6ff), so put text after these pages */
3 2 marcus.erl
MEMORY
4
        {
5
        vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000
6 140 julius
        /*ram     : ORIGIN = 0x00002000, LENGTH = 0x02000000 - 0x00002000*/
7
        ram     : ORIGIN = 0x00001200, LENGTH = 0xB400 - 0x1200
8
        ram2     : ORIGIN = 0xb700, LENGTH = 0x02000000 - 0xb700
9
        /*flash   : ORIGIN = 0xf0000000, LENGTH = 0x04000000*/
10 2 marcus.erl
        }
11
 
12 140 julius
 
13
 
14 2 marcus.erl
SECTIONS
15
{
16
        .vectors :
17
        {
18
        *(.crc)
19
        *(.vectors)
20
        } > vectors
21
 
22
        .text :
23
        {
24
        _text_begin = .;
25
        *(.text)
26
        _text_end = .;
27 140 julius
        } > ram2
28 2 marcus.erl
 
29
        .data :
30 140 julius
/*      AT ( ADDR (.text) + SIZEOF(.text) + SIZEOF(.mytext))*/
31 2 marcus.erl
        {
32
        *(.data)
33
        } > ram
34
 
35
        .rodata :
36
        {
37
        *(.rodata)
38
        *(.rodata.*)
39
        } > ram
40
 
41
        .bss :
42
        {
43
        *(.bss)
44
        } > ram
45
 
46
        .stack :
47
        {
48
        *(.stack)
49
        _src_addr = .;
50 140 julius
        } > ram2
51
/*
52
        .monitor :
53
        {
54
        *(.monitor)
55
        } > ram
56
*/
57 2 marcus.erl
 
58 140 julius
/*
59
        . += 0x100000;
60
 
61
// This section was in cmds/load.c, but we don't need it -jb
62
        .config :
63
        {
64
        _cfg_start = .;
65
        *(.config)
66
        _cfg_end = .;
67
        } > ram
68
*/
69
/*
70 2 marcus.erl
        . = 0xf0000100;
71
 
72
        .monitor ALIGN(0x40000) :
73
        {
74
        *(.monitor)
75
        } > flash
76
 
77
        . += 0x100000;
78
 
79
        .config ALIGN(0x40000) :
80
        {
81
        _cfg_start = .;
82
        *(.config)
83
        _cfg_end = .;
84
        } > flash
85 140 julius
*/
86 2 marcus.erl
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.