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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [bootloaders/] [orpmon/] [ram.ld] - Blame information for rev 577

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Line No. Rev Author Line
1 140 julius
 
2 246 julius
 
3 2 marcus.erl
MEMORY
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        {
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        vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000
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        /* Use all RAM */
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        /* Put all sections into ram */
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        ram     : ORIGIN = 0x00002000, LENGTH = 0x02000000 - 0x00002000
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        /* Uncomment the following to work around bad pages in a flash mem */
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        /* Put all sections except data, rodata into ram2 */
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        /* On ORSoC dev board devices, for pages 132-134 (256Byte pages) */
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        /*
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        ram     : ORIGIN = 0x00001200, LENGTH = 0x8400 - 0x1200
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        ram2     : ORIGIN = 0x8700, LENGTH = 0x02000000 - 0x8700
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        */
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        /* Uncomment the following to work around bad pages in a flash mem */
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        /* Put all sections except data, rodata into ram2 */
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        /* On ORSoC dev board devices, for pages 180-182 (256Byte pages) */
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        /*
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        ram     : ORIGIN = 0x00001200, LENGTH = 0xB400 - 0x1200
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        ram2     : ORIGIN = 0xb700, LENGTH = 0x02000000 - 0xb700
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        */
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        /*flash   : ORIGIN = 0xf0000000, LENGTH = 0x04000000*/
26 2 marcus.erl
        }
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30 2 marcus.erl
SECTIONS
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{
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        .vectors :
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        {
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        *(.vectors)
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        } > vectors
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        .text :
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        {
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        _text_begin = .;
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        *(.text)
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        _text_end = .;
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        } > ram
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/*        } > ram2*/
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        .data :
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        {
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        *(.data)
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        } > ram
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        .rodata :
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        {
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        *(.rodata)
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        *(.rodata.*)
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        } > ram
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        .bss (NOLOAD):
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        {
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        . = ALIGN(4);
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        _bstart = . ;
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        *(.bss)
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        _bend =  . ;
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        } > ram
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/*        } > ram2 */
64 2 marcus.erl
 
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        .stack (NOLOAD):
66 2 marcus.erl
        {
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        *(.stack)
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        _stack_top = .;
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        } > ram
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/*        } > ram2 */
71 2 marcus.erl
 
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}

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