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708 |
jeremybenn |
/* Common hooks for Blackfin.
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Copyright (C) 2005, 2006, 2007, 2008, 2009, 2010, 2011
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Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published
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by the Free Software Foundation; either version 3, or (at your
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option) any later version.
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GCC is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#include "config.h"
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#include "system.h"
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#include "coretypes.h"
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#include "diagnostic-core.h"
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#include "tm.h"
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#include "machmode.h"
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#include "tm_p.h"
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#include "common/common-target.h"
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#include "common/common-target-def.h"
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#include "opts.h"
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#include "flags.h"
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EXPORTED_CONST struct bfin_cpu bfin_cpus[] =
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{
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{"bf512", BFIN_CPU_BF512, 0x0002,
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WA_SPECULATIVE_LOADS | WA_05000074},
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{"bf512", BFIN_CPU_BF512, 0x0001,
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WA_SPECULATIVE_LOADS | WA_05000074},
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{"bf512", BFIN_CPU_BF512, 0x0000,
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WA_SPECULATIVE_LOADS | WA_05000074},
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{"bf514", BFIN_CPU_BF514, 0x0002,
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WA_SPECULATIVE_LOADS | WA_05000074},
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{"bf514", BFIN_CPU_BF514, 0x0001,
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WA_SPECULATIVE_LOADS | WA_05000074},
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{"bf514", BFIN_CPU_BF514, 0x0000,
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WA_SPECULATIVE_LOADS | WA_05000074},
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{"bf516", BFIN_CPU_BF516, 0x0002,
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WA_SPECULATIVE_LOADS | WA_05000074},
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{"bf516", BFIN_CPU_BF516, 0x0001,
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WA_SPECULATIVE_LOADS | WA_05000074},
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{"bf516", BFIN_CPU_BF516, 0x0000,
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WA_SPECULATIVE_LOADS | WA_05000074},
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{"bf518", BFIN_CPU_BF518, 0x0002,
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WA_SPECULATIVE_LOADS | WA_05000074},
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{"bf518", BFIN_CPU_BF518, 0x0001,
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WA_SPECULATIVE_LOADS | WA_05000074},
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{"bf518", BFIN_CPU_BF518, 0x0000,
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WA_SPECULATIVE_LOADS | WA_05000074},
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{"bf522", BFIN_CPU_BF522, 0x0002,
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WA_SPECULATIVE_LOADS | WA_05000074},
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{"bf522", BFIN_CPU_BF522, 0x0001,
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WA_SPECULATIVE_LOADS | WA_RETS | WA_05000074},
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{"bf522", BFIN_CPU_BF522, 0x0000,
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WA_SPECULATIVE_LOADS | WA_RETS | WA_05000074},
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{"bf523", BFIN_CPU_BF523, 0x0002,
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WA_SPECULATIVE_LOADS | WA_05000074},
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{"bf523", BFIN_CPU_BF523, 0x0001,
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WA_SPECULATIVE_LOADS | WA_RETS | WA_05000074},
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{"bf523", BFIN_CPU_BF523, 0x0000,
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WA_SPECULATIVE_LOADS | WA_RETS | WA_05000074},
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{"bf524", BFIN_CPU_BF524, 0x0002,
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WA_SPECULATIVE_LOADS | WA_05000074},
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{"bf524", BFIN_CPU_BF524, 0x0001,
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WA_SPECULATIVE_LOADS | WA_RETS | WA_05000074},
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{"bf524", BFIN_CPU_BF524, 0x0000,
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WA_SPECULATIVE_LOADS | WA_RETS | WA_05000074},
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{"bf525", BFIN_CPU_BF525, 0x0002,
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WA_SPECULATIVE_LOADS | WA_05000074},
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{"bf525", BFIN_CPU_BF525, 0x0001,
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WA_SPECULATIVE_LOADS | WA_RETS | WA_05000074},
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{"bf525", BFIN_CPU_BF525, 0x0000,
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WA_SPECULATIVE_LOADS | WA_RETS | WA_05000074},
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{"bf526", BFIN_CPU_BF526, 0x0002,
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WA_SPECULATIVE_LOADS | WA_05000074},
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{"bf526", BFIN_CPU_BF526, 0x0001,
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WA_SPECULATIVE_LOADS | WA_RETS | WA_05000074},
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{"bf526", BFIN_CPU_BF526, 0x0000,
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WA_SPECULATIVE_LOADS | WA_RETS | WA_05000074},
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{"bf527", BFIN_CPU_BF527, 0x0002,
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WA_SPECULATIVE_LOADS | WA_05000074},
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{"bf527", BFIN_CPU_BF527, 0x0001,
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WA_SPECULATIVE_LOADS | WA_RETS | WA_05000074},
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{"bf527", BFIN_CPU_BF527, 0x0000,
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WA_SPECULATIVE_LOADS | WA_RETS | WA_05000074},
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{"bf531", BFIN_CPU_BF531, 0x0006,
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WA_SPECULATIVE_LOADS | WA_LOAD_LCREGS | WA_05000074},
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{"bf531", BFIN_CPU_BF531, 0x0005,
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WA_SPECULATIVE_LOADS | WA_RETS | WA_05000283 | WA_05000315
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| WA_LOAD_LCREGS | WA_05000074},
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{"bf531", BFIN_CPU_BF531, 0x0004,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS
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| WA_05000283 | WA_05000257 | WA_05000315 | WA_LOAD_LCREGS
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| WA_05000074},
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{"bf531", BFIN_CPU_BF531, 0x0003,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS
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| WA_05000283 | WA_05000257 | WA_05000315 | WA_LOAD_LCREGS
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| WA_05000074},
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{"bf532", BFIN_CPU_BF532, 0x0006,
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WA_SPECULATIVE_LOADS | WA_LOAD_LCREGS | WA_05000074},
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{"bf532", BFIN_CPU_BF532, 0x0005,
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WA_SPECULATIVE_LOADS | WA_RETS | WA_05000283 | WA_05000315
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| WA_LOAD_LCREGS | WA_05000074},
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{"bf532", BFIN_CPU_BF532, 0x0004,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS
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| WA_05000283 | WA_05000257 | WA_05000315 | WA_LOAD_LCREGS
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| WA_05000074},
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{"bf532", BFIN_CPU_BF532, 0x0003,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS
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| WA_05000283 | WA_05000257 | WA_05000315 | WA_LOAD_LCREGS
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| WA_05000074},
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{"bf533", BFIN_CPU_BF533, 0x0006,
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WA_SPECULATIVE_LOADS | WA_LOAD_LCREGS | WA_05000074},
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{"bf533", BFIN_CPU_BF533, 0x0005,
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WA_SPECULATIVE_LOADS | WA_RETS | WA_05000283 | WA_05000315
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| WA_LOAD_LCREGS | WA_05000074},
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{"bf533", BFIN_CPU_BF533, 0x0004,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS
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| WA_05000283 | WA_05000257 | WA_05000315 | WA_LOAD_LCREGS
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| WA_05000074},
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{"bf533", BFIN_CPU_BF533, 0x0003,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS
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| WA_05000283 | WA_05000257 | WA_05000315 | WA_LOAD_LCREGS
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| WA_05000074},
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{"bf534", BFIN_CPU_BF534, 0x0003,
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WA_SPECULATIVE_LOADS | WA_RETS | WA_LOAD_LCREGS | WA_05000074},
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{"bf534", BFIN_CPU_BF534, 0x0002,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS
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| WA_05000283 | WA_05000257 | WA_05000315 | WA_LOAD_LCREGS
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| WA_05000074},
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{"bf534", BFIN_CPU_BF534, 0x0001,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS
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| WA_05000283 | WA_05000257 | WA_05000315 | WA_LOAD_LCREGS
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| WA_05000074},
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{"bf536", BFIN_CPU_BF536, 0x0003,
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WA_SPECULATIVE_LOADS | WA_RETS | WA_LOAD_LCREGS | WA_05000074},
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{"bf536", BFIN_CPU_BF536, 0x0002,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS
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| WA_05000283 | WA_05000257 | WA_05000315 | WA_LOAD_LCREGS
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| WA_05000074},
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{"bf536", BFIN_CPU_BF536, 0x0001,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS
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| WA_05000283 | WA_05000257 | WA_05000315 | WA_LOAD_LCREGS
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| WA_05000074},
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{"bf537", BFIN_CPU_BF537, 0x0003,
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WA_SPECULATIVE_LOADS | WA_RETS | WA_LOAD_LCREGS | WA_05000074},
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{"bf537", BFIN_CPU_BF537, 0x0002,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS
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| 174 |
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| WA_05000283 | WA_05000257 | WA_05000315 | WA_LOAD_LCREGS
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| WA_05000074},
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{"bf537", BFIN_CPU_BF537, 0x0001,
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WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS
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| 178 |
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| WA_05000283 | WA_05000257 | WA_05000315 | WA_LOAD_LCREGS
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| 179 |
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| WA_05000074},
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{"bf538", BFIN_CPU_BF538, 0x0005,
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WA_SPECULATIVE_LOADS | WA_LOAD_LCREGS | WA_05000074},
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{"bf538", BFIN_CPU_BF538, 0x0004,
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WA_SPECULATIVE_LOADS | WA_RETS | WA_LOAD_LCREGS | WA_05000074},
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{"bf538", BFIN_CPU_BF538, 0x0003,
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WA_SPECULATIVE_LOADS | WA_RETS
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| 187 |
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| WA_05000283 | WA_05000315 | WA_LOAD_LCREGS | WA_05000074},
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{"bf538", BFIN_CPU_BF538, 0x0002,
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| 189 |
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WA_SPECULATIVE_LOADS | WA_RETS
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| 190 |
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| WA_05000283 | WA_05000257 | WA_05000315 | WA_LOAD_LCREGS
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| 191 |
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| WA_05000074},
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| 192 |
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| 193 |
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{"bf539", BFIN_CPU_BF539, 0x0005,
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| 194 |
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WA_SPECULATIVE_LOADS | WA_LOAD_LCREGS | WA_05000074},
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| 195 |
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{"bf539", BFIN_CPU_BF539, 0x0004,
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| 196 |
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WA_SPECULATIVE_LOADS | WA_RETS | WA_LOAD_LCREGS | WA_05000074},
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| 197 |
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{"bf539", BFIN_CPU_BF539, 0x0003,
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| 198 |
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WA_SPECULATIVE_LOADS | WA_RETS
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| 199 |
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| WA_05000283 | WA_05000315 | WA_LOAD_LCREGS | WA_05000074},
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| 200 |
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{"bf539", BFIN_CPU_BF539, 0x0002,
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| 201 |
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WA_SPECULATIVE_LOADS | WA_RETS
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| 202 |
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| WA_05000283 | WA_05000257 | WA_05000315 | WA_LOAD_LCREGS
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| 203 |
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| WA_05000074},
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{"bf542m", BFIN_CPU_BF542M, 0x0003,
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WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
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| 208 |
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{"bf542", BFIN_CPU_BF542, 0x0004,
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| 209 |
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WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
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| 210 |
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{"bf542", BFIN_CPU_BF542, 0x0002,
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| 211 |
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WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
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| 212 |
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{"bf542", BFIN_CPU_BF542, 0x0001,
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| 213 |
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WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS | WA_05000074},
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| 214 |
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{"bf542", BFIN_CPU_BF542, 0x0000,
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| 215 |
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WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS | WA_LOAD_LCREGS
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| 216 |
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| WA_05000074},
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| 217 |
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| 218 |
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{"bf544m", BFIN_CPU_BF544M, 0x0003,
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| 219 |
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WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
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| 220 |
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| 221 |
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{"bf544", BFIN_CPU_BF544, 0x0004,
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| 222 |
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WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
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| 223 |
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{"bf544", BFIN_CPU_BF544, 0x0002,
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| 224 |
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WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
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| 225 |
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{"bf544", BFIN_CPU_BF544, 0x0001,
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| 226 |
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WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS | WA_05000074},
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| 227 |
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{"bf544", BFIN_CPU_BF544, 0x0000,
|
| 228 |
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WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS | WA_LOAD_LCREGS
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| 229 |
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| WA_05000074},
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| 230 |
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| 231 |
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{"bf547m", BFIN_CPU_BF547M, 0x0003,
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| 232 |
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WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
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| 233 |
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| 234 |
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{"bf547", BFIN_CPU_BF547, 0x0004,
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| 235 |
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WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
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| 236 |
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{"bf547", BFIN_CPU_BF547, 0x0002,
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| 237 |
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WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
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| 238 |
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{"bf547", BFIN_CPU_BF547, 0x0001,
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| 239 |
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WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS | WA_05000074},
|
| 240 |
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{"bf547", BFIN_CPU_BF547, 0x0000,
|
| 241 |
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WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS | WA_LOAD_LCREGS
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| 242 |
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| WA_05000074},
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| 243 |
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| 244 |
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{"bf548m", BFIN_CPU_BF548M, 0x0003,
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| 245 |
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WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
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| 246 |
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| 247 |
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{"bf548", BFIN_CPU_BF548, 0x0004,
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| 248 |
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WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
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| 249 |
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{"bf548", BFIN_CPU_BF548, 0x0002,
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| 250 |
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WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
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| 251 |
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{"bf548", BFIN_CPU_BF548, 0x0001,
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| 252 |
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WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS | WA_05000074},
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| 253 |
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{"bf548", BFIN_CPU_BF548, 0x0000,
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| 254 |
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WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS | WA_LOAD_LCREGS
|
| 255 |
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| WA_05000074},
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| 256 |
|
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| 257 |
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{"bf549m", BFIN_CPU_BF549M, 0x0003,
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| 258 |
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WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
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| 259 |
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| 260 |
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{"bf549", BFIN_CPU_BF549, 0x0004,
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| 261 |
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WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
|
| 262 |
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{"bf549", BFIN_CPU_BF549, 0x0002,
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| 263 |
|
|
WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
|
| 264 |
|
|
{"bf549", BFIN_CPU_BF549, 0x0001,
|
| 265 |
|
|
WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS | WA_05000074},
|
| 266 |
|
|
{"bf549", BFIN_CPU_BF549, 0x0000,
|
| 267 |
|
|
WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS | WA_LOAD_LCREGS
|
| 268 |
|
|
| WA_05000074},
|
| 269 |
|
|
|
| 270 |
|
|
{"bf561", BFIN_CPU_BF561, 0x0005, WA_RETS
|
| 271 |
|
|
| WA_05000283 | WA_05000315 | WA_LOAD_LCREGS | WA_05000074},
|
| 272 |
|
|
{"bf561", BFIN_CPU_BF561, 0x0003,
|
| 273 |
|
|
WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS
|
| 274 |
|
|
| WA_05000283 | WA_05000257 | WA_05000315 | WA_LOAD_LCREGS
|
| 275 |
|
|
| WA_05000074},
|
| 276 |
|
|
{"bf561", BFIN_CPU_BF561, 0x0002,
|
| 277 |
|
|
WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS | WA_RETS
|
| 278 |
|
|
| WA_05000283 | WA_05000257 | WA_05000315 | WA_LOAD_LCREGS
|
| 279 |
|
|
| WA_05000074},
|
| 280 |
|
|
|
| 281 |
|
|
{"bf592", BFIN_CPU_BF592, 0x0001,
|
| 282 |
|
|
WA_SPECULATIVE_LOADS | WA_05000074},
|
| 283 |
|
|
{"bf592", BFIN_CPU_BF592, 0x0000,
|
| 284 |
|
|
WA_SPECULATIVE_LOADS | WA_05000074},
|
| 285 |
|
|
|
| 286 |
|
|
{NULL, BFIN_CPU_UNKNOWN, 0, 0}
|
| 287 |
|
|
};
|
| 288 |
|
|
|
| 289 |
|
|
/* Implement TARGET_HANDLE_OPTION. */
|
| 290 |
|
|
|
| 291 |
|
|
static bool
|
| 292 |
|
|
bfin_handle_option (struct gcc_options *opts,
|
| 293 |
|
|
struct gcc_options *opts_set ATTRIBUTE_UNUSED,
|
| 294 |
|
|
const struct cl_decoded_option *decoded,
|
| 295 |
|
|
location_t loc)
|
| 296 |
|
|
{
|
| 297 |
|
|
size_t code = decoded->opt_index;
|
| 298 |
|
|
const char *arg = decoded->arg;
|
| 299 |
|
|
int value = decoded->value;
|
| 300 |
|
|
|
| 301 |
|
|
switch (code)
|
| 302 |
|
|
{
|
| 303 |
|
|
case OPT_mshared_library_id_:
|
| 304 |
|
|
if (value > MAX_LIBRARY_ID)
|
| 305 |
|
|
error_at (loc, "-mshared-library-id=%s is not between 0 and %d",
|
| 306 |
|
|
arg, MAX_LIBRARY_ID);
|
| 307 |
|
|
return true;
|
| 308 |
|
|
|
| 309 |
|
|
case OPT_mcpu_:
|
| 310 |
|
|
{
|
| 311 |
|
|
const char *p, *q;
|
| 312 |
|
|
int i;
|
| 313 |
|
|
|
| 314 |
|
|
i = 0;
|
| 315 |
|
|
while ((p = bfin_cpus[i].name) != NULL)
|
| 316 |
|
|
{
|
| 317 |
|
|
if (strncmp (arg, p, strlen (p)) == 0)
|
| 318 |
|
|
break;
|
| 319 |
|
|
i++;
|
| 320 |
|
|
}
|
| 321 |
|
|
|
| 322 |
|
|
if (p == NULL)
|
| 323 |
|
|
{
|
| 324 |
|
|
error_at (loc, "-mcpu=%s is not valid", arg);
|
| 325 |
|
|
return false;
|
| 326 |
|
|
}
|
| 327 |
|
|
|
| 328 |
|
|
opts->x_bfin_cpu_type = bfin_cpus[i].type;
|
| 329 |
|
|
|
| 330 |
|
|
q = arg + strlen (p);
|
| 331 |
|
|
|
| 332 |
|
|
if (*q == '\0')
|
| 333 |
|
|
{
|
| 334 |
|
|
opts->x_bfin_si_revision = bfin_cpus[i].si_revision;
|
| 335 |
|
|
opts->x_bfin_workarounds |= bfin_cpus[i].workarounds;
|
| 336 |
|
|
}
|
| 337 |
|
|
else if (strcmp (q, "-none") == 0)
|
| 338 |
|
|
opts->x_bfin_si_revision = -1;
|
| 339 |
|
|
else if (strcmp (q, "-any") == 0)
|
| 340 |
|
|
{
|
| 341 |
|
|
opts->x_bfin_si_revision = 0xffff;
|
| 342 |
|
|
while (bfin_cpus[i].type == opts->x_bfin_cpu_type)
|
| 343 |
|
|
{
|
| 344 |
|
|
opts->x_bfin_workarounds |= bfin_cpus[i].workarounds;
|
| 345 |
|
|
i++;
|
| 346 |
|
|
}
|
| 347 |
|
|
}
|
| 348 |
|
|
else
|
| 349 |
|
|
{
|
| 350 |
|
|
unsigned int si_major, si_minor;
|
| 351 |
|
|
int rev_len, n;
|
| 352 |
|
|
|
| 353 |
|
|
rev_len = strlen (q);
|
| 354 |
|
|
|
| 355 |
|
|
if (sscanf (q, "-%u.%u%n", &si_major, &si_minor, &n) != 2
|
| 356 |
|
|
|| n != rev_len
|
| 357 |
|
|
|| si_major > 0xff || si_minor > 0xff)
|
| 358 |
|
|
{
|
| 359 |
|
|
invalid_silicon_revision:
|
| 360 |
|
|
error_at (loc, "-mcpu=%s has invalid silicon revision", arg);
|
| 361 |
|
|
return false;
|
| 362 |
|
|
}
|
| 363 |
|
|
|
| 364 |
|
|
opts->x_bfin_si_revision = (si_major << 8) | si_minor;
|
| 365 |
|
|
|
| 366 |
|
|
while (bfin_cpus[i].type == opts->x_bfin_cpu_type
|
| 367 |
|
|
&& bfin_cpus[i].si_revision != opts->x_bfin_si_revision)
|
| 368 |
|
|
i++;
|
| 369 |
|
|
|
| 370 |
|
|
if (bfin_cpus[i].type != opts->x_bfin_cpu_type)
|
| 371 |
|
|
goto invalid_silicon_revision;
|
| 372 |
|
|
|
| 373 |
|
|
opts->x_bfin_workarounds |= bfin_cpus[i].workarounds;
|
| 374 |
|
|
}
|
| 375 |
|
|
|
| 376 |
|
|
return true;
|
| 377 |
|
|
}
|
| 378 |
|
|
|
| 379 |
|
|
default:
|
| 380 |
|
|
return true;
|
| 381 |
|
|
}
|
| 382 |
|
|
}
|
| 383 |
|
|
|
| 384 |
|
|
#undef TARGET_HANDLE_OPTION
|
| 385 |
|
|
#define TARGET_HANDLE_OPTION bfin_handle_option
|
| 386 |
|
|
|
| 387 |
|
|
#undef TARGET_DEFAULT_TARGET_FLAGS
|
| 388 |
|
|
#define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT
|
| 389 |
|
|
|
| 390 |
|
|
struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
|
