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708 |
jeremybenn |
/* IA-32 common hooks.
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Copyright (C) 1988, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
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2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
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Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#include "config.h"
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#include "system.h"
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#include "coretypes.h"
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#include "diagnostic-core.h"
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#include "tm.h"
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#include "tm_p.h"
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#include "common/common-target.h"
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#include "common/common-target-def.h"
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#include "opts.h"
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#include "flags.h"
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/* Define a set of ISAs which are available when a given ISA is
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enabled. MMX and SSE ISAs are handled separately. */
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#define OPTION_MASK_ISA_MMX_SET OPTION_MASK_ISA_MMX
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#define OPTION_MASK_ISA_3DNOW_SET \
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(OPTION_MASK_ISA_3DNOW | OPTION_MASK_ISA_MMX_SET)
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#define OPTION_MASK_ISA_SSE_SET OPTION_MASK_ISA_SSE
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#define OPTION_MASK_ISA_SSE2_SET \
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(OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_SSE_SET)
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#define OPTION_MASK_ISA_SSE3_SET \
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(OPTION_MASK_ISA_SSE3 | OPTION_MASK_ISA_SSE2_SET)
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#define OPTION_MASK_ISA_SSSE3_SET \
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(OPTION_MASK_ISA_SSSE3 | OPTION_MASK_ISA_SSE3_SET)
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#define OPTION_MASK_ISA_SSE4_1_SET \
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(OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_SSSE3_SET)
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#define OPTION_MASK_ISA_SSE4_2_SET \
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(OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_SSE4_1_SET)
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#define OPTION_MASK_ISA_AVX_SET \
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(OPTION_MASK_ISA_AVX | OPTION_MASK_ISA_SSE4_2_SET)
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#define OPTION_MASK_ISA_FMA_SET \
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(OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_AVX_SET)
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#define OPTION_MASK_ISA_AVX2_SET \
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(OPTION_MASK_ISA_AVX2 | OPTION_MASK_ISA_AVX_SET)
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/* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same
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as -msse4.2. */
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#define OPTION_MASK_ISA_SSE4_SET OPTION_MASK_ISA_SSE4_2_SET
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#define OPTION_MASK_ISA_SSE4A_SET \
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(OPTION_MASK_ISA_SSE4A | OPTION_MASK_ISA_SSE3_SET)
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#define OPTION_MASK_ISA_FMA4_SET \
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(OPTION_MASK_ISA_FMA4 | OPTION_MASK_ISA_SSE4A_SET \
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| OPTION_MASK_ISA_AVX_SET)
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#define OPTION_MASK_ISA_XOP_SET \
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(OPTION_MASK_ISA_XOP | OPTION_MASK_ISA_FMA4_SET)
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#define OPTION_MASK_ISA_LWP_SET \
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OPTION_MASK_ISA_LWP
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/* AES and PCLMUL need SSE2 because they use xmm registers */
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#define OPTION_MASK_ISA_AES_SET \
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(OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2_SET)
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#define OPTION_MASK_ISA_PCLMUL_SET \
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(OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2_SET)
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#define OPTION_MASK_ISA_ABM_SET \
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(OPTION_MASK_ISA_ABM | OPTION_MASK_ISA_POPCNT)
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#define OPTION_MASK_ISA_BMI_SET OPTION_MASK_ISA_BMI
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#define OPTION_MASK_ISA_BMI2_SET OPTION_MASK_ISA_BMI2
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#define OPTION_MASK_ISA_TBM_SET OPTION_MASK_ISA_TBM
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#define OPTION_MASK_ISA_POPCNT_SET OPTION_MASK_ISA_POPCNT
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#define OPTION_MASK_ISA_CX16_SET OPTION_MASK_ISA_CX16
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#define OPTION_MASK_ISA_SAHF_SET OPTION_MASK_ISA_SAHF
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#define OPTION_MASK_ISA_MOVBE_SET OPTION_MASK_ISA_MOVBE
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#define OPTION_MASK_ISA_CRC32_SET OPTION_MASK_ISA_CRC32
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#define OPTION_MASK_ISA_FSGSBASE_SET OPTION_MASK_ISA_FSGSBASE
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#define OPTION_MASK_ISA_RDRND_SET OPTION_MASK_ISA_RDRND
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#define OPTION_MASK_ISA_F16C_SET \
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(OPTION_MASK_ISA_F16C | OPTION_MASK_ISA_AVX_SET)
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/* Define a set of ISAs which aren't available when a given ISA is
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disabled. MMX and SSE ISAs are handled separately. */
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#define OPTION_MASK_ISA_MMX_UNSET \
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(OPTION_MASK_ISA_MMX | OPTION_MASK_ISA_3DNOW_UNSET)
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#define OPTION_MASK_ISA_3DNOW_UNSET \
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(OPTION_MASK_ISA_3DNOW | OPTION_MASK_ISA_3DNOW_A_UNSET)
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#define OPTION_MASK_ISA_3DNOW_A_UNSET OPTION_MASK_ISA_3DNOW_A
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#define OPTION_MASK_ISA_SSE_UNSET \
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(OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_SSE2_UNSET)
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#define OPTION_MASK_ISA_SSE2_UNSET \
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(OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_SSE3_UNSET)
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#define OPTION_MASK_ISA_SSE3_UNSET \
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(OPTION_MASK_ISA_SSE3 \
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| OPTION_MASK_ISA_SSSE3_UNSET \
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| OPTION_MASK_ISA_SSE4A_UNSET )
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#define OPTION_MASK_ISA_SSSE3_UNSET \
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(OPTION_MASK_ISA_SSSE3 | OPTION_MASK_ISA_SSE4_1_UNSET)
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#define OPTION_MASK_ISA_SSE4_1_UNSET \
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(OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_SSE4_2_UNSET)
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#define OPTION_MASK_ISA_SSE4_2_UNSET \
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(OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_AVX_UNSET )
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#define OPTION_MASK_ISA_AVX_UNSET \
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(OPTION_MASK_ISA_AVX | OPTION_MASK_ISA_FMA_UNSET \
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| OPTION_MASK_ISA_FMA4_UNSET | OPTION_MASK_ISA_F16C_UNSET \
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| OPTION_MASK_ISA_AVX2_UNSET)
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#define OPTION_MASK_ISA_FMA_UNSET OPTION_MASK_ISA_FMA
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#define OPTION_MASK_ISA_AVX2_UNSET OPTION_MASK_ISA_AVX2
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/* SSE4 includes both SSE4.1 and SSE4.2. -mno-sse4 should the same
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as -mno-sse4.1. */
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#define OPTION_MASK_ISA_SSE4_UNSET OPTION_MASK_ISA_SSE4_1_UNSET
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#define OPTION_MASK_ISA_SSE4A_UNSET \
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(OPTION_MASK_ISA_SSE4A | OPTION_MASK_ISA_FMA4_UNSET)
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#define OPTION_MASK_ISA_FMA4_UNSET \
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(OPTION_MASK_ISA_FMA4 | OPTION_MASK_ISA_XOP_UNSET)
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#define OPTION_MASK_ISA_XOP_UNSET OPTION_MASK_ISA_XOP
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#define OPTION_MASK_ISA_LWP_UNSET OPTION_MASK_ISA_LWP
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#define OPTION_MASK_ISA_AES_UNSET OPTION_MASK_ISA_AES
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#define OPTION_MASK_ISA_PCLMUL_UNSET OPTION_MASK_ISA_PCLMUL
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#define OPTION_MASK_ISA_ABM_UNSET OPTION_MASK_ISA_ABM
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#define OPTION_MASK_ISA_BMI_UNSET OPTION_MASK_ISA_BMI
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#define OPTION_MASK_ISA_BMI2_UNSET OPTION_MASK_ISA_BMI2
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#define OPTION_MASK_ISA_TBM_UNSET OPTION_MASK_ISA_TBM
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#define OPTION_MASK_ISA_POPCNT_UNSET OPTION_MASK_ISA_POPCNT
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#define OPTION_MASK_ISA_CX16_UNSET OPTION_MASK_ISA_CX16
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#define OPTION_MASK_ISA_SAHF_UNSET OPTION_MASK_ISA_SAHF
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#define OPTION_MASK_ISA_MOVBE_UNSET OPTION_MASK_ISA_MOVBE
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#define OPTION_MASK_ISA_CRC32_UNSET OPTION_MASK_ISA_CRC32
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#define OPTION_MASK_ISA_FSGSBASE_UNSET OPTION_MASK_ISA_FSGSBASE
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#define OPTION_MASK_ISA_RDRND_UNSET OPTION_MASK_ISA_RDRND
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#define OPTION_MASK_ISA_F16C_UNSET OPTION_MASK_ISA_F16C
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/* Implement TARGET_HANDLE_OPTION. */
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bool
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ix86_handle_option (struct gcc_options *opts,
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struct gcc_options *opts_set ATTRIBUTE_UNUSED,
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const struct cl_decoded_option *decoded,
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location_t loc)
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{
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size_t code = decoded->opt_index;
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int value = decoded->value;
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switch (code)
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{
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case OPT_mmmx:
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if (value)
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{
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opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MMX_SET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MMX_SET;
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}
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else
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{
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opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_MMX_UNSET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MMX_UNSET;
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}
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return true;
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case OPT_m3dnow:
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if (value)
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{
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opts->x_ix86_isa_flags |= OPTION_MASK_ISA_3DNOW_SET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_3DNOW_SET;
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}
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else
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{
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opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_3DNOW_UNSET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_3DNOW_UNSET;
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}
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return true;
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case OPT_m3dnowa:
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return false;
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case OPT_msse:
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if (value)
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{
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opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE_SET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE_SET;
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}
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else
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{
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opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE_UNSET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE_UNSET;
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}
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return true;
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case OPT_msse2:
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if (value)
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{
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opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE2_SET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE2_SET;
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}
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else
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{
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opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE2_UNSET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE2_UNSET;
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}
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return true;
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case OPT_msse3:
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if (value)
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{
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opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE3_SET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE3_SET;
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}
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else
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{
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opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE3_UNSET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE3_UNSET;
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}
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return true;
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case OPT_mssse3:
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if (value)
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{
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opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSSE3_SET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSSE3_SET;
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}
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else
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{
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opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSSE3_UNSET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSSE3_UNSET;
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}
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return true;
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case OPT_msse4_1:
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if (value)
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{
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opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_1_SET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_1_SET;
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}
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else
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{
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opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4_1_UNSET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_1_UNSET;
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}
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return true;
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case OPT_msse4_2:
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if (value)
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{
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opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_2_SET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_2_SET;
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}
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else
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{
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268 |
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opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4_2_UNSET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_2_UNSET;
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}
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return true;
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case OPT_mavx:
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if (value)
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{
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opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX_SET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX_SET;
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}
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else
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{
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281 |
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opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX_UNSET;
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX_UNSET;
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}
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return true;
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case OPT_mavx2:
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if (value)
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{
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289 |
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opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2_SET;
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290 |
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_SET;
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291 |
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}
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292 |
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else
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293 |
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{
|
294 |
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opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX2_UNSET;
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295 |
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opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_UNSET;
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296 |
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}
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return true;
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298 |
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|
299 |
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case OPT_mfma:
|
300 |
|
|
if (value)
|
301 |
|
|
{
|
302 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FMA_SET;
|
303 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA_SET;
|
304 |
|
|
}
|
305 |
|
|
else
|
306 |
|
|
{
|
307 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_FMA_UNSET;
|
308 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA_UNSET;
|
309 |
|
|
}
|
310 |
|
|
return true;
|
311 |
|
|
|
312 |
|
|
case OPT_msse4:
|
313 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_SET;
|
314 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_SET;
|
315 |
|
|
return true;
|
316 |
|
|
|
317 |
|
|
case OPT_mno_sse4:
|
318 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4_UNSET;
|
319 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_UNSET;
|
320 |
|
|
return true;
|
321 |
|
|
|
322 |
|
|
case OPT_msse4a:
|
323 |
|
|
if (value)
|
324 |
|
|
{
|
325 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4A_SET;
|
326 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4A_SET;
|
327 |
|
|
}
|
328 |
|
|
else
|
329 |
|
|
{
|
330 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4A_UNSET;
|
331 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4A_UNSET;
|
332 |
|
|
}
|
333 |
|
|
return true;
|
334 |
|
|
|
335 |
|
|
case OPT_mfma4:
|
336 |
|
|
if (value)
|
337 |
|
|
{
|
338 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FMA4_SET;
|
339 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA4_SET;
|
340 |
|
|
}
|
341 |
|
|
else
|
342 |
|
|
{
|
343 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_FMA4_UNSET;
|
344 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA4_UNSET;
|
345 |
|
|
}
|
346 |
|
|
return true;
|
347 |
|
|
|
348 |
|
|
case OPT_mxop:
|
349 |
|
|
if (value)
|
350 |
|
|
{
|
351 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XOP_SET;
|
352 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XOP_SET;
|
353 |
|
|
}
|
354 |
|
|
else
|
355 |
|
|
{
|
356 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_XOP_UNSET;
|
357 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XOP_UNSET;
|
358 |
|
|
}
|
359 |
|
|
return true;
|
360 |
|
|
|
361 |
|
|
case OPT_mlwp:
|
362 |
|
|
if (value)
|
363 |
|
|
{
|
364 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LWP_SET;
|
365 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_LWP_SET;
|
366 |
|
|
}
|
367 |
|
|
else
|
368 |
|
|
{
|
369 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_LWP_UNSET;
|
370 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_LWP_UNSET;
|
371 |
|
|
}
|
372 |
|
|
return true;
|
373 |
|
|
|
374 |
|
|
case OPT_mabm:
|
375 |
|
|
if (value)
|
376 |
|
|
{
|
377 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_ABM_SET;
|
378 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_ABM_SET;
|
379 |
|
|
}
|
380 |
|
|
else
|
381 |
|
|
{
|
382 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_ABM_UNSET;
|
383 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_ABM_UNSET;
|
384 |
|
|
}
|
385 |
|
|
return true;
|
386 |
|
|
|
387 |
|
|
case OPT_mbmi:
|
388 |
|
|
if (value)
|
389 |
|
|
{
|
390 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_BMI_SET;
|
391 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI_SET;
|
392 |
|
|
}
|
393 |
|
|
else
|
394 |
|
|
{
|
395 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_BMI_UNSET;
|
396 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI_UNSET;
|
397 |
|
|
}
|
398 |
|
|
return true;
|
399 |
|
|
|
400 |
|
|
case OPT_mbmi2:
|
401 |
|
|
if (value)
|
402 |
|
|
{
|
403 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_BMI2_SET;
|
404 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI2_SET;
|
405 |
|
|
}
|
406 |
|
|
else
|
407 |
|
|
{
|
408 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_BMI2_UNSET;
|
409 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI2_UNSET;
|
410 |
|
|
}
|
411 |
|
|
return true;
|
412 |
|
|
|
413 |
|
|
case OPT_mtbm:
|
414 |
|
|
if (value)
|
415 |
|
|
{
|
416 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_TBM_SET;
|
417 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_TBM_SET;
|
418 |
|
|
}
|
419 |
|
|
else
|
420 |
|
|
{
|
421 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_TBM_UNSET;
|
422 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_TBM_UNSET;
|
423 |
|
|
}
|
424 |
|
|
return true;
|
425 |
|
|
|
426 |
|
|
case OPT_mpopcnt:
|
427 |
|
|
if (value)
|
428 |
|
|
{
|
429 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_POPCNT_SET;
|
430 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_POPCNT_SET;
|
431 |
|
|
}
|
432 |
|
|
else
|
433 |
|
|
{
|
434 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_POPCNT_UNSET;
|
435 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_POPCNT_UNSET;
|
436 |
|
|
}
|
437 |
|
|
return true;
|
438 |
|
|
|
439 |
|
|
case OPT_msahf:
|
440 |
|
|
if (value)
|
441 |
|
|
{
|
442 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SAHF_SET;
|
443 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SAHF_SET;
|
444 |
|
|
}
|
445 |
|
|
else
|
446 |
|
|
{
|
447 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SAHF_UNSET;
|
448 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SAHF_UNSET;
|
449 |
|
|
}
|
450 |
|
|
return true;
|
451 |
|
|
|
452 |
|
|
case OPT_mcx16:
|
453 |
|
|
if (value)
|
454 |
|
|
{
|
455 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CX16_SET;
|
456 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CX16_SET;
|
457 |
|
|
}
|
458 |
|
|
else
|
459 |
|
|
{
|
460 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_CX16_UNSET;
|
461 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CX16_UNSET;
|
462 |
|
|
}
|
463 |
|
|
return true;
|
464 |
|
|
|
465 |
|
|
case OPT_mmovbe:
|
466 |
|
|
if (value)
|
467 |
|
|
{
|
468 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MOVBE_SET;
|
469 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MOVBE_SET;
|
470 |
|
|
}
|
471 |
|
|
else
|
472 |
|
|
{
|
473 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_MOVBE_UNSET;
|
474 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MOVBE_UNSET;
|
475 |
|
|
}
|
476 |
|
|
return true;
|
477 |
|
|
|
478 |
|
|
case OPT_mcrc32:
|
479 |
|
|
if (value)
|
480 |
|
|
{
|
481 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CRC32_SET;
|
482 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CRC32_SET;
|
483 |
|
|
}
|
484 |
|
|
else
|
485 |
|
|
{
|
486 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_CRC32_UNSET;
|
487 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CRC32_UNSET;
|
488 |
|
|
}
|
489 |
|
|
return true;
|
490 |
|
|
|
491 |
|
|
case OPT_maes:
|
492 |
|
|
if (value)
|
493 |
|
|
{
|
494 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AES_SET;
|
495 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AES_SET;
|
496 |
|
|
}
|
497 |
|
|
else
|
498 |
|
|
{
|
499 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AES_UNSET;
|
500 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AES_UNSET;
|
501 |
|
|
}
|
502 |
|
|
return true;
|
503 |
|
|
|
504 |
|
|
case OPT_mpclmul:
|
505 |
|
|
if (value)
|
506 |
|
|
{
|
507 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PCLMUL_SET;
|
508 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCLMUL_SET;
|
509 |
|
|
}
|
510 |
|
|
else
|
511 |
|
|
{
|
512 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_PCLMUL_UNSET;
|
513 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCLMUL_UNSET;
|
514 |
|
|
}
|
515 |
|
|
return true;
|
516 |
|
|
|
517 |
|
|
case OPT_mfsgsbase:
|
518 |
|
|
if (value)
|
519 |
|
|
{
|
520 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FSGSBASE_SET;
|
521 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FSGSBASE_SET;
|
522 |
|
|
}
|
523 |
|
|
else
|
524 |
|
|
{
|
525 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_FSGSBASE_UNSET;
|
526 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FSGSBASE_UNSET;
|
527 |
|
|
}
|
528 |
|
|
return true;
|
529 |
|
|
|
530 |
|
|
case OPT_mrdrnd:
|
531 |
|
|
if (value)
|
532 |
|
|
{
|
533 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RDRND_SET;
|
534 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RDRND_SET;
|
535 |
|
|
}
|
536 |
|
|
else
|
537 |
|
|
{
|
538 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_RDRND_UNSET;
|
539 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RDRND_UNSET;
|
540 |
|
|
}
|
541 |
|
|
return true;
|
542 |
|
|
|
543 |
|
|
case OPT_mf16c:
|
544 |
|
|
if (value)
|
545 |
|
|
{
|
546 |
|
|
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_F16C_SET;
|
547 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_F16C_SET;
|
548 |
|
|
}
|
549 |
|
|
else
|
550 |
|
|
{
|
551 |
|
|
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_F16C_UNSET;
|
552 |
|
|
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_F16C_UNSET;
|
553 |
|
|
}
|
554 |
|
|
return true;
|
555 |
|
|
|
556 |
|
|
/* Comes from final.c -- no real reason to change it. */
|
557 |
|
|
#define MAX_CODE_ALIGN 16
|
558 |
|
|
|
559 |
|
|
case OPT_malign_loops_:
|
560 |
|
|
warning_at (loc, 0, "-malign-loops is obsolete, use -falign-loops");
|
561 |
|
|
if (value > MAX_CODE_ALIGN)
|
562 |
|
|
error_at (loc, "-malign-loops=%d is not between 0 and %d",
|
563 |
|
|
value, MAX_CODE_ALIGN);
|
564 |
|
|
else
|
565 |
|
|
opts->x_align_loops = 1 << value;
|
566 |
|
|
return true;
|
567 |
|
|
|
568 |
|
|
case OPT_malign_jumps_:
|
569 |
|
|
warning_at (loc, 0, "-malign-jumps is obsolete, use -falign-jumps");
|
570 |
|
|
if (value > MAX_CODE_ALIGN)
|
571 |
|
|
error_at (loc, "-malign-jumps=%d is not between 0 and %d",
|
572 |
|
|
value, MAX_CODE_ALIGN);
|
573 |
|
|
else
|
574 |
|
|
opts->x_align_jumps = 1 << value;
|
575 |
|
|
return true;
|
576 |
|
|
|
577 |
|
|
case OPT_malign_functions_:
|
578 |
|
|
warning_at (loc, 0,
|
579 |
|
|
"-malign-functions is obsolete, use -falign-functions");
|
580 |
|
|
if (value > MAX_CODE_ALIGN)
|
581 |
|
|
error_at (loc, "-malign-functions=%d is not between 0 and %d",
|
582 |
|
|
value, MAX_CODE_ALIGN);
|
583 |
|
|
else
|
584 |
|
|
opts->x_align_functions = 1 << value;
|
585 |
|
|
return true;
|
586 |
|
|
|
587 |
|
|
case OPT_mbranch_cost_:
|
588 |
|
|
if (value > 5)
|
589 |
|
|
{
|
590 |
|
|
error_at (loc, "-mbranch-cost=%d is not between 0 and 5", value);
|
591 |
|
|
opts->x_ix86_branch_cost = 5;
|
592 |
|
|
}
|
593 |
|
|
return true;
|
594 |
|
|
|
595 |
|
|
default:
|
596 |
|
|
return true;
|
597 |
|
|
}
|
598 |
|
|
}
|
599 |
|
|
|
600 |
|
|
static const struct default_options ix86_option_optimization_table[] =
|
601 |
|
|
{
|
602 |
|
|
/* Enable redundant extension instructions removal at -O2 and higher. */
|
603 |
|
|
{ OPT_LEVELS_2_PLUS, OPT_free, NULL, 1 },
|
604 |
|
|
/* Turn off -fschedule-insns by default. It tends to make the
|
605 |
|
|
problem with not enough registers even worse. */
|
606 |
|
|
{ OPT_LEVELS_ALL, OPT_fschedule_insns, NULL, 0 },
|
607 |
|
|
|
608 |
|
|
#ifdef SUBTARGET_OPTIMIZATION_OPTIONS
|
609 |
|
|
SUBTARGET_OPTIMIZATION_OPTIONS,
|
610 |
|
|
#endif
|
611 |
|
|
{ OPT_LEVELS_NONE, 0, NULL, 0 }
|
612 |
|
|
};
|
613 |
|
|
|
614 |
|
|
/* Implement TARGET_OPTION_INIT_STRUCT. */
|
615 |
|
|
|
616 |
|
|
static void
|
617 |
|
|
ix86_option_init_struct (struct gcc_options *opts)
|
618 |
|
|
{
|
619 |
|
|
if (TARGET_MACHO)
|
620 |
|
|
/* The Darwin libraries never set errno, so we might as well
|
621 |
|
|
avoid calling them when that's the only reason we would. */
|
622 |
|
|
opts->x_flag_errno_math = 0;
|
623 |
|
|
|
624 |
|
|
opts->x_flag_pcc_struct_return = 2;
|
625 |
|
|
opts->x_flag_asynchronous_unwind_tables = 2;
|
626 |
|
|
opts->x_flag_vect_cost_model = 1;
|
627 |
|
|
}
|
628 |
|
|
|
629 |
|
|
/* On the x86 -fsplit-stack and -fstack-protector both use the same
|
630 |
|
|
field in the TCB, so they can not be used together. */
|
631 |
|
|
|
632 |
|
|
static bool
|
633 |
|
|
ix86_supports_split_stack (bool report ATTRIBUTE_UNUSED,
|
634 |
|
|
struct gcc_options *opts ATTRIBUTE_UNUSED)
|
635 |
|
|
{
|
636 |
|
|
bool ret = true;
|
637 |
|
|
|
638 |
|
|
#ifndef TARGET_THREAD_SPLIT_STACK_OFFSET
|
639 |
|
|
if (report)
|
640 |
|
|
error ("%<-fsplit-stack%> currently only supported on GNU/Linux");
|
641 |
|
|
ret = false;
|
642 |
|
|
#else
|
643 |
|
|
if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE)
|
644 |
|
|
{
|
645 |
|
|
if (report)
|
646 |
|
|
error ("%<-fsplit-stack%> requires "
|
647 |
|
|
"assembler support for CFI directives");
|
648 |
|
|
ret = false;
|
649 |
|
|
}
|
650 |
|
|
#endif
|
651 |
|
|
|
652 |
|
|
return ret;
|
653 |
|
|
}
|
654 |
|
|
|
655 |
|
|
#undef TARGET_DEFAULT_TARGET_FLAGS
|
656 |
|
|
#define TARGET_DEFAULT_TARGET_FLAGS \
|
657 |
|
|
(TARGET_DEFAULT \
|
658 |
|
|
| TARGET_SUBTARGET_DEFAULT \
|
659 |
|
|
| TARGET_TLS_DIRECT_SEG_REFS_DEFAULT)
|
660 |
|
|
|
661 |
|
|
#undef TARGET_HANDLE_OPTION
|
662 |
|
|
#define TARGET_HANDLE_OPTION ix86_handle_option
|
663 |
|
|
|
664 |
|
|
#undef TARGET_OPTION_OPTIMIZATION_TABLE
|
665 |
|
|
#define TARGET_OPTION_OPTIMIZATION_TABLE ix86_option_optimization_table
|
666 |
|
|
#undef TARGET_OPTION_INIT_STRUCT
|
667 |
|
|
#define TARGET_OPTION_INIT_STRUCT ix86_option_init_struct
|
668 |
|
|
|
669 |
|
|
#undef TARGET_SUPPORTS_SPLIT_STACK
|
670 |
|
|
#define TARGET_SUPPORTS_SPLIT_STACK ix86_supports_split_stack
|
671 |
|
|
|
672 |
|
|
struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
|