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jeremybenn |
/* Definitions of target machine for GNU compiler, for ARM with a.out
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Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2004, 2007, 2008, 2010
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Free Software Foundation, Inc.
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Contributed by Richard Earnshaw (rearnsha@armltd.co.uk).
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published
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by the Free Software Foundation; either version 3, or (at your
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option) any later version.
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GCC is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#ifndef ASM_APP_ON
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#define ASM_APP_ON ""
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#endif
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#ifndef ASM_APP_OFF
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#define ASM_APP_OFF ""
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#endif
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/* Switch to the text or data segment. */
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#define TEXT_SECTION_ASM_OP "\t.text"
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#define DATA_SECTION_ASM_OP "\t.data"
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#define BSS_SECTION_ASM_OP "\t.bss"
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/* Note: If USER_LABEL_PREFIX or LOCAL_LABEL_PREFIX are changed,
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make sure that this change is reflected in the function
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coff_arm_is_local_label_name() in bfd/coff-arm.c. */
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#ifndef REGISTER_PREFIX
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#define REGISTER_PREFIX ""
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#endif
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#ifndef USER_LABEL_PREFIX
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#define USER_LABEL_PREFIX "_"
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#endif
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#ifndef LOCAL_LABEL_PREFIX
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#define LOCAL_LABEL_PREFIX ""
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#endif
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/* The assembler's names for the registers. Note that the ?xx registers are
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there so that VFPv3/NEON registers D16-D31 have the same spacing as D0-D15
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(each of which is overlaid on two S registers), although there are no
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actual single-precision registers which correspond to D16-D31. */
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#ifndef REGISTER_NAMES
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#define REGISTER_NAMES \
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{ \
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
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"r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc", \
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
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"cc", "sfp", "afp", \
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"mv0", "mv1", "mv2", "mv3", \
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"mv4", "mv5", "mv6", "mv7", \
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"mv8", "mv9", "mv10", "mv11", \
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"mv12", "mv13", "mv14", "mv15", \
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"wcgr0", "wcgr1", "wcgr2", "wcgr3", \
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"wr0", "wr1", "wr2", "wr3", \
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"wr4", "wr5", "wr6", "wr7", \
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"wr8", "wr9", "wr10", "wr11", \
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"wr12", "wr13", "wr14", "wr15", \
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"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
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"s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", \
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"s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", \
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"s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", \
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"d16", "?16", "d17", "?17", "d18", "?18", "d19", "?19", \
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"d20", "?20", "d21", "?21", "d22", "?22", "d23", "?23", \
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"d24", "?24", "d25", "?25", "d26", "?26", "d27", "?27", \
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"d28", "?28", "d29", "?29", "d30", "?30", "d31", "?31", \
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"vfpcc" \
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}
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#endif
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#ifndef ADDITIONAL_REGISTER_NAMES
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#define ADDITIONAL_REGISTER_NAMES \
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{ \
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{"a1", 0}, \
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{"a2", 1}, \
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{"a3", 2}, \
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{"a4", 3}, \
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{"v1", 4}, \
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{"v2", 5}, \
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{"v3", 6}, \
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{"v4", 7}, \
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{"v5", 8}, \
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{"v6", 9}, \
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{"rfp", 9}, /* Gcc used to call it this */ \
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{"sb", 9}, \
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{"v7", 10}, \
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{"r10", 10}, /* sl */ \
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{"r11", 11}, /* fp */ \
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{"r12", 12}, /* ip */ \
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{"r13", 13}, /* sp */ \
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{"r14", 14}, /* lr */ \
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{"r15", 15}, /* pc */ \
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{"mvf0", 27}, \
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{"mvf1", 28}, \
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{"mvf2", 29}, \
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{"mvf3", 30}, \
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{"mvf4", 31}, \
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{"mvf5", 32}, \
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{"mvf6", 33}, \
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{"mvf7", 34}, \
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{"mvf8", 35}, \
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{"mvf9", 36}, \
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{"mvf10", 37}, \
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{"mvf11", 38}, \
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{"mvf12", 39}, \
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{"mvf13", 40}, \
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{"mvf14", 41}, \
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{"mvf15", 42}, \
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{"mvd0", 27}, \
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{"mvd1", 28}, \
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{"mvd2", 29}, \
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{"mvd3", 30}, \
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{"mvd4", 31}, \
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{"mvd5", 32}, \
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{"mvd6", 33}, \
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{"mvd7", 34}, \
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{"mvd8", 35}, \
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{"mvd9", 36}, \
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{"mvd10", 37}, \
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{"mvd11", 38}, \
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{"mvd12", 39}, \
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{"mvd13", 40}, \
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{"mvd14", 41}, \
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{"mvd15", 42}, \
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{"mvfx0", 27}, \
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{"mvfx1", 28}, \
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{"mvfx2", 29}, \
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{"mvfx3", 30}, \
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{"mvfx4", 31}, \
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{"mvfx5", 32}, \
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{"mvfx6", 33}, \
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{"mvfx7", 34}, \
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{"mvfx8", 35}, \
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{"mvfx9", 36}, \
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{"mvfx10", 37}, \
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{"mvfx11", 38}, \
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{"mvfx12", 39}, \
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{"mvfx13", 40}, \
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{"mvfx14", 41}, \
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{"mvfx15", 42}, \
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{"mvdx0", 27}, \
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{"mvdx1", 28}, \
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{"mvdx2", 29}, \
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{"mvdx3", 30}, \
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{"mvdx4", 31}, \
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{"mvdx5", 32}, \
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{"mvdx6", 33}, \
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{"mvdx7", 34}, \
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{"mvdx8", 35}, \
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{"mvdx9", 36}, \
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{"mvdx10", 37}, \
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{"mvdx11", 38}, \
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{"mvdx12", 39}, \
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{"mvdx13", 40}, \
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{"mvdx14", 41}, \
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{"mvdx15", 42} \
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}
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#endif
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#ifndef OVERLAPPING_REGISTER_NAMES
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#define OVERLAPPING_REGISTER_NAMES \
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{ \
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{"d0", 63, 2}, \
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{"d1", 65, 2}, \
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{"d2", 67, 2}, \
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{"d3", 69, 2}, \
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{"d4", 71, 2}, \
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{"d5", 73, 2}, \
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{"d6", 75, 2}, \
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{"d7", 77, 2}, \
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{"d8", 79, 2}, \
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{"d9", 81, 2}, \
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{"d10", 83, 2}, \
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{"d11", 85, 2}, \
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{"d12", 87, 2}, \
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{"d13", 89, 2}, \
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{"d14", 91, 2}, \
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{"d15", 93, 2}, \
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{"q0", 63, 4}, \
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{"q1", 67, 4}, \
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{"q2", 71, 4}, \
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{"q3", 75, 4}, \
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{"q4", 79, 4}, \
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{"q5", 83, 4}, \
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{"q6", 87, 4}, \
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{"q7", 91, 4}, \
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{"q8", 95, 4}, \
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{"q9", 99, 4}, \
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{"q10", 103, 4}, \
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{"q11", 107, 4}, \
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{"q12", 111, 4}, \
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{"q13", 115, 4}, \
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{"q14", 119, 4}, \
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{"q15", 123, 4} \
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}
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#endif
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#ifndef NO_DOLLAR_IN_LABEL
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#define NO_DOLLAR_IN_LABEL 1
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#endif
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/* Generate DBX debugging information. riscix.h will undefine this because
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the native assembler does not support stabs. */
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#define DBX_DEBUGGING_INFO 1
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/* Acorn dbx moans about continuation chars, so don't use any. */
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#ifndef DBX_CONTIN_LENGTH
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#define DBX_CONTIN_LENGTH 0
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#endif
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/* Output a function label definition. */
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#ifndef ASM_DECLARE_FUNCTION_NAME
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#define ASM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL) \
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do \
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{ \
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ARM_DECLARE_FUNCTION_NAME (STREAM, NAME, DECL); \
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ASM_OUTPUT_LABEL (STREAM, NAME); \
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} \
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while (0)
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#endif
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/* Globalizing directive for a label. */
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#define GLOBAL_ASM_OP "\t.global\t"
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/* Make an internal label into a string. */
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#ifndef ASM_GENERATE_INTERNAL_LABEL
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#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
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sprintf (STRING, "*%s%s%u", LOCAL_LABEL_PREFIX, PREFIX, (unsigned int)(NUM))
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#endif
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/* Output an element of a dispatch table. */
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#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
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do \
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{ \
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gcc_assert (!TARGET_THUMB2); \
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asm_fprintf (STREAM, "\t.word\t%LL%d\n", VALUE); \
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} \
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while (0)
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/* Thumb-2 always uses addr_diff_elf so that the Table Branch instructions
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can be used. For non-pic code where the offsets do not suitable for
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TBB/TBH the elements are output as absolute labels. */
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#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
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do \
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{ \
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if (TARGET_ARM) \
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asm_fprintf (STREAM, "\tb\t%LL%d\n", VALUE); \
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else if (TARGET_THUMB1) \
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{ \
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if (flag_pic || optimize_size) \
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{ \
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switch (GET_MODE(body)) \
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{ \
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case QImode: \
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asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n", \
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VALUE, REL); \
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break; \
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case HImode: /* TBH */ \
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asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n", \
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VALUE, REL); \
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break; \
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case SImode: \
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asm_fprintf (STREAM, "\t.word\t%LL%d-%LL%d\n", \
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VALUE, REL); \
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break; \
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default: \
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gcc_unreachable(); \
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} \
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} \
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else \
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asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE); \
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} \
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else /* Thumb-2 */ \
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{ \
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switch (GET_MODE(body)) \
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{ \
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288 |
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case QImode: /* TBB */ \
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asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n", \
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VALUE, REL); \
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break; \
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case HImode: /* TBH */ \
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asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n", \
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VALUE, REL); \
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break; \
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296 |
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case SImode: \
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if (flag_pic) \
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asm_fprintf (STREAM, "\t.word\t%LL%d+1-%LL%d\n", VALUE, REL); \
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else \
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asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE); \
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break; \
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default: \
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gcc_unreachable(); \
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} \
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} \
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} \
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while (0)
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309 |
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310 |
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#undef ASM_OUTPUT_ASCII
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311 |
|
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#define ASM_OUTPUT_ASCII(STREAM, PTR, LEN) \
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output_ascii_pseudo_op (STREAM, (const unsigned char *) (PTR), LEN)
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314 |
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/* Output a gap. In fact we fill it with nulls. */
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#undef ASM_OUTPUT_SKIP
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316 |
|
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#define ASM_OUTPUT_SKIP(STREAM, NBYTES) \
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fprintf (STREAM, "\t.space\t%d\n", (int) (NBYTES))
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318 |
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319 |
|
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/* Align output to a power of two. Horrible /bin/as. */
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|
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#ifndef ASM_OUTPUT_ALIGN
|
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|
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#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
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do \
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{ \
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register int amount = 1 << (POWER); \
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\
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|
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if (amount == 2) \
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|
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fprintf (STREAM, "\t.even\n"); \
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else if (amount != 1) \
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|
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fprintf (STREAM, "\t.align\t%d\n", amount - 4); \
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} \
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while (0)
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#endif
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333 |
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|
334 |
|
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/* Output a common block. */
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335 |
|
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#ifndef ASM_OUTPUT_COMMON
|
336 |
|
|
#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
|
337 |
|
|
do \
|
338 |
|
|
{ \
|
339 |
|
|
fprintf (STREAM, "\t.comm\t"); \
|
340 |
|
|
assemble_name (STREAM, NAME); \
|
341 |
|
|
asm_fprintf (STREAM, ", %d\t%@ %d\n", \
|
342 |
|
|
(int)(ROUNDED), (int)(SIZE)); \
|
343 |
|
|
} \
|
344 |
|
|
while (0)
|
345 |
|
|
#endif
|
346 |
|
|
|
347 |
|
|
/* Output a local common block. /bin/as can't do this, so hack a
|
348 |
|
|
`.space' into the bss segment. Note that this is *bad* practice,
|
349 |
|
|
which is guaranteed NOT to work since it doesn't define STATIC
|
350 |
|
|
COMMON space but merely STATIC BSS space. */
|
351 |
|
|
#ifndef ASM_OUTPUT_ALIGNED_LOCAL
|
352 |
|
|
#define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \
|
353 |
|
|
do \
|
354 |
|
|
{ \
|
355 |
|
|
switch_to_section (bss_section); \
|
356 |
|
|
ASM_OUTPUT_ALIGN (STREAM, floor_log2 (ALIGN / BITS_PER_UNIT)); \
|
357 |
|
|
ASM_OUTPUT_LABEL (STREAM, NAME); \
|
358 |
|
|
fprintf (STREAM, "\t.space\t%d\n", (int)(SIZE)); \
|
359 |
|
|
} \
|
360 |
|
|
while (0)
|
361 |
|
|
#endif
|
362 |
|
|
|
363 |
|
|
/* Output a zero-initialized block. */
|
364 |
|
|
#ifndef ASM_OUTPUT_ALIGNED_BSS
|
365 |
|
|
#define ASM_OUTPUT_ALIGNED_BSS(STREAM, DECL, NAME, SIZE, ALIGN) \
|
366 |
|
|
asm_output_aligned_bss (STREAM, DECL, NAME, SIZE, ALIGN)
|
367 |
|
|
#endif
|
368 |
|
|
|
369 |
|
|
/* Output a #ident directive. */
|
370 |
|
|
#ifndef ASM_OUTPUT_IDENT
|
371 |
|
|
#define ASM_OUTPUT_IDENT(STREAM,STRING) \
|
372 |
|
|
asm_fprintf (STREAM, "%@ - - - ident %s\n", STRING)
|
373 |
|
|
#endif
|
374 |
|
|
|
375 |
|
|
#ifndef ASM_COMMENT_START
|
376 |
|
|
#define ASM_COMMENT_START "@"
|
377 |
|
|
#endif
|
378 |
|
|
|
379 |
|
|
/* This works for GAS and some other assemblers. */
|
380 |
|
|
#define SET_ASM_OP "\t.set\t"
|