OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [arm/] [vxworks.opt] - Blame information for rev 720

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 709 jeremybenn
; ARM VxWorks options.
2
 
3
; Copyright (C) 2011
4
; Free Software Foundation, Inc.
5
;
6
; This file is part of GCC.
7
;
8
; GCC is free software; you can redistribute it and/or modify it under
9
; the terms of the GNU General Public License as published by the Free
10
; Software Foundation; either version 3, or (at your option) any later
11
; version.
12
;
13
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
15
; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16
; for more details.
17
;
18
; You should have received a copy of the GNU General Public License
19
; along with GCC; see the file COPYING3.  If not see
20
; .
21
 
22
; See the GCC internals manual (options.texi) for a description of
23
; this file's format.
24
 
25
; Please try to keep this file in ASCII collating order.
26
 
27
t4
28
Driver
29
 
30
t4be
31
Driver
32
 
33
t4t
34
Driver
35
 
36
t4tbe
37
Driver
38
 
39
t5
40
Driver
41
 
42
t5be
43
Driver
44
 
45
t5t
46
Driver
47
 
48
t5tbe
49
Driver
50
 
51
tstrongarm
52
Driver
53
 
54
txscale
55
Driver
56
 
57
txscalebe
58
Driver
59
 
60
; This comment is to ensure we retain the blank line above.

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.