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1 709 jeremybenn
;; Predicate definitions for ATMEL AVR micro controllers.
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;; Copyright (C) 2006, 2007, 2008 Free Software Foundation, Inc.
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 3, or (at your option)
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;; any later version.
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;;
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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;; GNU General Public License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3.  If not see
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;; .
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;; Registers from r0 to r15.
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(define_predicate "l_register_operand"
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  (and (match_code "reg")
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       (match_test "REGNO (op) <= 15")))
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;; Registers from r16 to r31.
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(define_predicate "d_register_operand"
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  (and (match_code "reg")
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       (match_test "REGNO (op) >= 16 && REGNO (op) <= 31")))
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(define_predicate "even_register_operand"
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  (and (match_code "reg")
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       (and (match_test "REGNO (op) <= 31")
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            (match_test "(REGNO (op) & 1) == 0"))))
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(define_predicate "odd_register_operand"
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  (and (match_code "reg")
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       (and (match_test "REGNO (op) <= 31")
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            (match_test "(REGNO (op) & 1) != 0"))))
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;; SP register.
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(define_predicate "stack_register_operand"
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  (and (match_code "reg")
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       (match_test "REGNO (op) == REG_SP")))
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;; Return true if OP is a valid address for lower half of I/O space.
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(define_predicate "low_io_address_operand"
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  (and (match_code "const_int")
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       (match_test "IN_RANGE (INTVAL (op) - avr_current_arch->sfr_offset,
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                              0, 0x1f)")))
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;; Return true if OP is a valid address for high half of I/O space.
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(define_predicate "high_io_address_operand"
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  (and (match_code "const_int")
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       (match_test "IN_RANGE (INTVAL (op) - avr_current_arch->sfr_offset,
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                              0x20, 0x3F)")))
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;; Return true if OP is a valid address of I/O space.
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(define_predicate "io_address_operand"
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  (and (match_code "const_int")
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       (match_test "IN_RANGE (INTVAL (op) - avr_current_arch->sfr_offset,
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                              0, 0x40 - GET_MODE_SIZE (mode))")))
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;; Return 1 if OP is a general operand not in flash memory
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(define_predicate "nop_general_operand"
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  (and (match_operand 0 "general_operand")
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       (match_test "!avr_mem_flash_p (op)")))
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;; Return 1 if OP is an "ordinary" general operand, i.e. a general
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;; operand whose load is not handled by a libgcc call or ELPM.
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(define_predicate "nox_general_operand"
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  (and (match_operand 0 "general_operand")
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       (not (match_test "avr_load_libgcc_p (op)"))
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       (not (match_test "avr_mem_memx_p (op)"))))
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;; Return 1 if OP is the zero constant for MODE.
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(define_predicate "const0_operand"
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  (and (match_code "const_int,const_double")
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       (match_test "op == CONST0_RTX (mode)")))
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;; Return 1 if OP is the one constant integer for MODE.
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(define_predicate "const1_operand"
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  (and (match_code "const_int")
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       (match_test "op == CONST1_RTX (mode)")))
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;; Return 1 if OP is constant integer 0..7 for MODE.
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(define_predicate "const_0_to_7_operand"
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  (and (match_code "const_int")
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       (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
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;; Return 1 if OP is constant integer 2..7 for MODE.
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(define_predicate "const_2_to_7_operand"
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  (and (match_code "const_int")
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       (match_test "IN_RANGE (INTVAL (op), 2, 7)")))
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;; Return 1 if OP is constant integer 1..6 for MODE.
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(define_predicate "const_1_to_6_operand"
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  (and (match_code "const_int")
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       (match_test "IN_RANGE (INTVAL (op), 1, 6)")))
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;; Return 1 if OP is constant integer 2..6 for MODE.
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(define_predicate "const_2_to_6_operand"
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  (and (match_code "const_int")
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       (match_test "IN_RANGE (INTVAL (op), 2, 6)")))
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;; Returns true if OP is either the constant zero or a register.
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(define_predicate "reg_or_0_operand"
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  (ior (match_operand 0 "register_operand")
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       (match_operand 0 "const0_operand")))
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;; Returns 1 if OP is a SYMBOL_REF.
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(define_predicate "symbol_ref_operand"
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  (match_code "symbol_ref"))
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;; Return true if OP is a text segment reference.
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;; This is needed for program memory address expressions.
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(define_predicate "text_segment_operand"
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  (match_code "code_label,label_ref,symbol_ref,plus,const")
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{
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  switch (GET_CODE (op))
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    {
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    case CODE_LABEL:
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      return true;
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    case LABEL_REF :
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      return true;
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    case SYMBOL_REF :
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      return SYMBOL_REF_FUNCTION_P (op);
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    case PLUS :
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      /* Assume canonical format of symbol + constant.
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         Fall through.  */
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    case CONST :
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      return text_segment_operand (XEXP (op, 0), VOIDmode);
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    default :
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      return false;
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    }
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})
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;; Return true if OP is a constant that contains only one 1 in its
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;; binary representation.
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(define_predicate "single_one_operand"
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  (and (match_code "const_int")
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       (match_test "exact_log2(INTVAL (op) & GET_MODE_MASK (mode)) >= 0")))
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;; Return true if OP is a constant that contains only one 0 in its
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;; binary representation.
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(define_predicate "single_zero_operand"
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  (and (match_code "const_int")
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       (match_test "exact_log2(~INTVAL (op) & GET_MODE_MASK (mode)) >= 0")))
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;;
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(define_predicate "avr_sp_immediate_operand"
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  (and (match_code "const_int")
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       (match_test "satisfies_constraint_Csp (op)")))
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;; True for EQ & NE
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(define_predicate "eqne_operator"
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  (match_code "eq,ne"))
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;; True for GE & LT
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(define_predicate "gelt_operator"
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  (match_code "ge,lt"))
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;; True for GT, GTU, LE & LEU
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(define_predicate "difficult_comparison_operator"
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  (match_code "gt,gtu,le,leu"))
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;; False for GT, GTU, LE & LEU
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(define_predicate "simple_comparison_operator"
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  (and (match_operand 0 "comparison_operator")
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       (not (match_code "gt,gtu,le,leu"))))
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;; Return true if OP is a valid call operand.
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(define_predicate "call_insn_operand"
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  (and (match_code "mem")
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       (ior (match_test "register_operand (XEXP (op, 0), mode)")
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            (match_test "CONSTANT_ADDRESS_P (XEXP (op, 0))"))))
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;; For some insns we must ensure that no hard register is inserted
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;; into their operands because the insns are split and the split
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;; involves hard registers.  An example are divmod insn that are
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;; split to insns that represent implicit library calls.
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;; True for register that is pseudo register.
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(define_predicate "pseudo_register_operand"
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  (and (match_operand 0 "register_operand")
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       (not (and (match_code "reg")
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                 (match_test "HARD_REGISTER_P (op)")))))
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;; True for operand that is pseudo register or CONST_INT.
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(define_predicate "pseudo_register_or_const_int_operand"
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  (ior (match_operand 0 "const_int_operand")
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       (match_operand 0 "pseudo_register_operand")))
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;; We keep combiner from inserting hard registers into the input of sign- and
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;; zero-extends.  A hard register in the input operand is not wanted because
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;; 32-bit multiply patterns clobber some hard registers and extends with a
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;; hard register that overlaps these clobbers won't combine to a widening
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;; multiplication.  There is no need for combine to propagate or insert
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;; hard registers, register allocation can do it just as well.
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;; True for operand that is pseudo register at combine time.
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(define_predicate "combine_pseudo_register_operand"
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  (ior (match_operand 0 "pseudo_register_operand")
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       (and (match_operand 0 "register_operand")
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            (match_test "reload_completed || reload_in_progress"))))
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;; Return true if OP is a constant integer that is either
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;; 8 or 16 or 24.
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(define_predicate "const_8_16_24_operand"
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  (and (match_code "const_int")
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       (match_test "8 == INTVAL(op) || 16 == INTVAL(op) || 24 == INTVAL(op)")))
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;; Unsigned CONST_INT that fits in 8 bits, i.e. 0..255.
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(define_predicate "u8_operand"
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  (and (match_code "const_int")
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       (match_test "IN_RANGE (INTVAL (op), 0, 255)")))
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;; Signed CONST_INT that fits in 8 bits, i.e. -128..127.
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(define_predicate "s8_operand"
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  (and (match_code "const_int")
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       (match_test "IN_RANGE (INTVAL (op), -128, 127)")))
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;; One-extended CONST_INT that fits in 8 bits, i.e. -256..-1.
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(define_predicate "o8_operand"
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  (and (match_code "const_int")
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       (match_test "IN_RANGE (INTVAL (op), -256, -1)")))
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;; Signed CONST_INT that fits in 9 bits, i.e. -256..255.
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(define_predicate "s9_operand"
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  (and (match_code "const_int")
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       (match_test "IN_RANGE (INTVAL (op), -256, 255)")))
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(define_predicate "register_or_s9_operand"
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  (ior (match_operand 0 "register_operand")
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       (match_operand 0 "s9_operand")))
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;; Unsigned CONST_INT that fits in 16 bits, i.e. 0..65536.
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(define_predicate "u16_operand"
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  (and (match_code "const_int")
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       (match_test "IN_RANGE (INTVAL (op), 0, (1<<16)-1)")))
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;; Signed CONST_INT that fits in 16 bits, i.e. -32768..32767.
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(define_predicate "s16_operand"
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  (and (match_code "const_int")
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       (match_test "IN_RANGE (INTVAL (op), -(1<<15), (1<<15)-1)")))
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;; One-extended CONST_INT that fits in 16 bits, i.e. -65536..-1.
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(define_predicate "o16_operand"
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  (and (match_code "const_int")
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       (match_test "IN_RANGE (INTVAL (op), -(1<<16), -1)")))

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