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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [bfin/] [sync.md] - Blame information for rev 801

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Line No. Rev Author Line
1 709 jeremybenn 
;; GCC machine description for Blackfin synchronization instructions.
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;; Copyright (C) 2005, 2006, 2007 Free Software Foundation, Inc.
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;; Contributed by Analog Devices.
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 3, or (at your option)
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;; any later version.
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;;
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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;; GNU General Public License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3.  If not see
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;; .
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(define_code_iterator FETCHOP [plus minus ior and xor])
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(define_code_attr fetchop_name
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  [(plus "add") (minus "sub") (ior "ior") (and "and") (xor "xor")])
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(define_code_attr fetchop_addr
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  [(plus "1072") (minus "1088") (ior "1104") (and "1120") (xor "1136")])
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(define_insn "sync_si_internal"
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  [(set (mem:SI (match_operand:SI 0 "register_operand" "qA"))
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        (unspec:SI
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          [(FETCHOP:SI (mem:SI (match_dup 0))
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             (match_operand:SI 1 "register_operand" "q0"))
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           (match_operand:SI 2 "register_no_elim_operand" "a")]
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          UNSPEC_ATOMIC))
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   (clobber (match_scratch:SI 3 "=q0"))
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   (clobber (match_scratch:SI 4 "=q1"))
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   (clobber (reg:SI REG_RETS))]
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  "TARGET_SUPPORTS_SYNC_CALLS"
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  "call (%2);"
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  [(set_attr "type" "call")])
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(define_expand "sync_si"
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  [(parallel
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    [(set (match_operand:SI 0 "memory_operand" "+m")
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          (unspec:SI
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           [(FETCHOP:SI (match_dup 0)
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                        (match_operand:SI 1 "register_operand" "q0"))
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            (match_dup 2)]
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           UNSPEC_ATOMIC))
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     (clobber (match_scratch:SI 3 ""))
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     (clobber (match_scratch:SI 4 ""))
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     (clobber (reg:SI REG_RETS))])]
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  "TARGET_SUPPORTS_SYNC_CALLS"
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{
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  if (!REG_P (XEXP (operands[0], 0)))
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    {
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      operands[0] = shallow_copy_rtx (operands[0]);
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      XEXP (operands[0], 0) = force_reg (Pmode, XEXP (operands[0], 0));
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    }
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  operands[2] = force_reg (Pmode, GEN_INT ());
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})
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(define_insn "sync_old_si_internal"
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  [(set (match_operand:SI 0 "register_operand" "=q1")
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        (mem:SI (match_operand:SI 1 "register_operand" "qA")))
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   (set (mem:SI (match_dup 1))
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        (unspec:SI
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          [(FETCHOP:SI (mem:SI (match_dup 1))
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             (match_operand:SI 2 "register_operand" "q0"))
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           (match_operand:SI 3 "register_no_elim_operand" "a")]
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          UNSPEC_ATOMIC))
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   (clobber (match_scratch:SI 4 "=q0"))
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   (clobber (reg:SI REG_RETS))]
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  "TARGET_SUPPORTS_SYNC_CALLS"
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  "call (%3);"
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  [(set_attr "type" "call")])
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(define_expand "sync_old_si"
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  [(parallel
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    [(set (match_operand:SI 0 "register_operand" "")
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          (match_operand:SI 1 "memory_operand" ""))
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     (set (match_dup 1)
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          (unspec:SI
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           [(FETCHOP:SI (match_dup 1)
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                        (match_operand:SI 2 "register_operand" ""))
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            (match_dup 3)]
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           UNSPEC_ATOMIC))
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     (clobber (match_scratch:SI 4 ""))
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     (clobber (reg:SI REG_RETS))])]
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  "TARGET_SUPPORTS_SYNC_CALLS"
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{
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  if (!REG_P (XEXP (operands[1], 0)))
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    {
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      operands[1] = shallow_copy_rtx (operands[1]);
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      XEXP (operands[1], 0) = force_reg (Pmode, XEXP (operands[1], 0));
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    }
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  operands[3] = force_reg (Pmode, GEN_INT ());
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})
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(define_insn "sync_new_si_internal"
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  [(set (match_operand:SI 0 "register_operand" "=q0")
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        (unspec:SI
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          [(FETCHOP:SI
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            (mem:SI (match_operand:SI 1 "register_operand" "qA"))
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            (match_operand:SI 2 "register_operand" "q0"))
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           (match_operand:SI 3 "register_no_elim_operand" "a")]
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          UNSPEC_ATOMIC))
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   (set (mem:SI (match_dup 1))
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        (unspec:SI
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          [(FETCHOP:SI (mem:SI (match_dup 1)) (match_dup 2))
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           (match_dup 3)]
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          UNSPEC_ATOMIC))
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   (clobber (match_scratch:SI 4 "=q1"))
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   (clobber (reg:SI REG_RETS))]
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  "TARGET_SUPPORTS_SYNC_CALLS"
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  "call (%3);"
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  [(set_attr "type" "call")])
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(define_expand "sync_new_si"
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  [(parallel
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    [(set (match_operand:SI 0 "register_operand" "")
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          (unspec:SI
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           [(FETCHOP:SI (match_operand:SI 1 "memory_operand" "")
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                        (match_operand:SI 2 "register_operand" ""))
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            (match_dup 3)]
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           UNSPEC_ATOMIC))
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     (set (match_dup 1)
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          (unspec:SI
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           [(FETCHOP:SI (match_dup 1) (match_dup 2))
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            (match_dup 3)]
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           UNSPEC_ATOMIC))
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     (clobber (match_scratch:SI 4 ""))
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     (clobber (reg:SI REG_RETS))])]
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  "TARGET_SUPPORTS_SYNC_CALLS"
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{
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  if (!REG_P (XEXP (operands[1], 0)))
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    {
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      operands[1] = shallow_copy_rtx (operands[1]);
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      XEXP (operands[1], 0) = force_reg (Pmode, XEXP (operands[1], 0));
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    }
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  operands[3] = force_reg (Pmode, GEN_INT ());
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})
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(define_insn "sync_compare_and_swapsi_internal"
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  [(set (match_operand:SI 0 "register_operand" "=q0")
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        (mem:SI (match_operand:SI 1 "register_operand" "qA")))
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   (set (mem:SI (match_dup 1))
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        (unspec:SI
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          [(mem:SI (match_dup 1))
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           (match_operand:SI 2 "register_operand" "q1")
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           (match_operand:SI 3 "register_operand" "q2")
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           (match_operand:SI 4 "register_no_elim_operand" "a")]
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          UNSPEC_ATOMIC))
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   (clobber (reg:SI REG_RETS))]
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  "TARGET_SUPPORTS_SYNC_CALLS"
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  "call (%4);"
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  [(set_attr "type" "call")])
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(define_expand "sync_compare_and_swapsi"
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  [(parallel
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    [(set (match_operand:SI 0 "register_operand" "")
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          (match_operand:SI 1 "memory_operand" ""))
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     (set (match_dup 1)
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          (unspec:SI
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           [(match_dup 1)
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            (match_operand:SI 2 "register_operand" "")
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            (match_operand:SI 3 "register_operand" "")
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            (match_dup 4)]
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           UNSPEC_ATOMIC))
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     (clobber (reg:SI REG_RETS))])]
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  "TARGET_SUPPORTS_SYNC_CALLS"
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{
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  if (!REG_P (XEXP (operands[1], 0)))
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    {
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      operands[1] = shallow_copy_rtx (operands[1]);
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      XEXP (operands[1], 0) = force_reg (Pmode, XEXP (operands[1], 0));
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    }
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  operands[4] = force_reg (Pmode, GEN_INT (0x420));
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})

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