OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [i386/] [f16cintrin.h] - Blame information for rev 709

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 709 jeremybenn
/* Copyright (C) 2011 Free Software Foundation, Inc.
2
 
3
   This file is part of GCC.
4
 
5
   GCC is free software; you can redistribute it and/or modify
6
   it under the terms of the GNU General Public License as published by
7
   the Free Software Foundation; either version 3, or (at your option)
8
   any later version.
9
 
10
   GCC is distributed in the hope that it will be useful,
11
   but WITHOUT ANY WARRANTY; without even the implied warranty of
12
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
   GNU General Public License for more details.
14
 
15
   Under Section 7 of GPL version 3, you are granted additional
16
   permissions described in the GCC Runtime Library Exception, version
17
   3.1, as published by the Free Software Foundation.
18
 
19
   You should have received a copy of the GNU General Public License and
20
   a copy of the GCC Runtime Library Exception along with this program;
21
   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
22
   <http://www.gnu.org/licenses/>.  */
23
 
24
#if !defined _X86INTRIN_H_INCLUDED && !defined _IMMINTRIN_H_INCLUDED
25
# error "Never use <f16intrin.h> directly; include <x86intrin.h> or <immintrin.h> instead."
26
#endif
27
 
28
#ifndef __F16C__
29
# error "F16C instruction set not enabled"
30
#else
31
 
32
#ifndef _F16CINTRIN_H_INCLUDED
33
#define _F16CINTRIN_H_INCLUDED
34
 
35
extern __inline float __attribute__((__gnu_inline__, __always_inline__, __artificial__))
36
_cvtsh_ss (unsigned short __S)
37
{
38
  __v8hi __H = __extension__ (__v8hi){ __S, 0, 0, 0, 0, 0, 0, 0 };
39
  __v4sf __A = __builtin_ia32_vcvtph2ps (__H);
40
  return __builtin_ia32_vec_ext_v4sf (__A, 0);
41
}
42
 
43
extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
44
_mm_cvtph_ps (__m128i __A)
45
{
46
  return (__m128) __builtin_ia32_vcvtph2ps ((__v8hi) __A);
47
}
48
 
49
extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
50
_mm256_cvtph_ps (__m128i __A)
51
{
52
  return (__m256) __builtin_ia32_vcvtph2ps256 ((__v8hi) __A);
53
}
54
 
55
#ifdef __OPTIMIZE__
56
extern __inline unsigned short __attribute__((__gnu_inline__, __always_inline__, __artificial__))
57
_cvtss_sh (float __F, const int __I)
58
{
59
  __v4sf __A =  __extension__ (__v4sf){ __F, 0, 0, 0 };
60
  __v8hi __H = __builtin_ia32_vcvtps2ph (__A, __I);
61
  return (unsigned short) __builtin_ia32_vec_ext_v8hi (__H, 0);
62
}
63
 
64
extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
65
_mm_cvtps_ph (__m128 __A, const int __I)
66
{
67
  return (__m128i) __builtin_ia32_vcvtps2ph ((__v4sf) __A, __I);
68
}
69
 
70
extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
71
_mm256_cvtps_ph (__m256 __A, const int __I)
72
{
73
  return (__m128i) __builtin_ia32_vcvtps2ph256 ((__v8sf) __A, __I);
74
}
75
#else
76
#define _cvtss_sh(__F, __I)                                             \
77
  (__extension__                                                        \
78
   ({                                                                   \
79
      __v4sf __A =  __extension__ (__v4sf){ __F, 0, 0, 0 };                \
80
      __v8hi __H = __builtin_ia32_vcvtps2ph (__A, __I);                 \
81
      (unsigned short) __builtin_ia32_vec_ext_v8hi (__H, 0);             \
82
    }))
83
 
84
#define _mm_cvtps_ph(A, I) \
85
  ((__m128i) __builtin_ia32_vcvtps2ph ((__v4sf)(__m128) A, (int) (I)))
86
 
87
#define _mm256_cvtps_ph(A, I) \
88
  ((__m128i) __builtin_ia32_vcvtps2ph256 ((__v8sf)(__m256) A, (int) (I)))
89
#endif /* __OPTIMIZE */
90
 
91
#endif /* _F16CINTRIN_H_INCLUDED */
92
#endif /* __F16C__ */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.