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jeremybenn |
;; Predicate definitions for IA-64.
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;; Copyright (C) 2004, 2005, 2007, 2010 Free Software Foundation, Inc.
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 3, or (at your option)
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;; any later version.
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;;
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;; GNU General Public License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3. If not see
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;; .
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;; True if OP is a valid operand for the MEM of a CALL insn.
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(define_predicate "call_operand"
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(ior (match_code "symbol_ref")
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(match_operand 0 "register_operand")))
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;; True if OP refers to any kind of symbol.
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;; For roughly the same reasons that pmode_register_operand exists, this
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;; predicate ignores its mode argument.
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(define_special_predicate "symbolic_operand"
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(match_code "symbol_ref,const,label_ref"))
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;; True if OP is a SYMBOL_REF which refers to a function.
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(define_predicate "function_operand"
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(and (match_code "symbol_ref")
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(match_test "SYMBOL_REF_FUNCTION_P (op)")))
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;; True if OP refers to a symbol in the sdata section.
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(define_predicate "sdata_symbolic_operand"
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(match_code "symbol_ref,const")
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{
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HOST_WIDE_INT offset = 0, size = 0;
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switch (GET_CODE (op))
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{
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case CONST:
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op = XEXP (op, 0);
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if (GET_CODE (op) != PLUS
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|| GET_CODE (XEXP (op, 0)) != SYMBOL_REF
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|| GET_CODE (XEXP (op, 1)) != CONST_INT)
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return false;
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offset = INTVAL (XEXP (op, 1));
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op = XEXP (op, 0);
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/* FALLTHRU */
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case SYMBOL_REF:
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if (CONSTANT_POOL_ADDRESS_P (op))
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{
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size = GET_MODE_SIZE (get_pool_mode (op));
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if (size > ia64_section_threshold)
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return false;
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}
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else
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{
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tree t;
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if (!SYMBOL_REF_LOCAL_P (op) || !SYMBOL_REF_SMALL_P (op))
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return false;
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/* Note that in addition to DECLs, we can get various forms
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of constants here. */
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t = SYMBOL_REF_DECL (op);
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if (DECL_P (t))
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t = DECL_SIZE_UNIT (t);
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else
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t = TYPE_SIZE_UNIT (TREE_TYPE (t));
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if (t && host_integerp (t, 0))
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{
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size = tree_low_cst (t, 0);
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if (size < 0)
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size = 0;
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}
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}
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/* Deny the stupid user trick of addressing outside the object. Such
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things quickly result in GPREL22 relocation overflows. Of course,
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they're also highly undefined. From a pure pedant's point of view
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they deserve a slap on the wrist (such as provided by a relocation
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overflow), but that just leads to bugzilla noise. */
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return (offset >= 0 && offset <= size);
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default:
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gcc_unreachable ();
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}
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})
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;; True if OP refers to a symbol in the small address area.
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(define_predicate "small_addr_symbolic_operand"
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(match_code "symbol_ref,const")
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{
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switch (GET_CODE (op))
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{
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case CONST:
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op = XEXP (op, 0);
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if (GET_CODE (op) != PLUS
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|| GET_CODE (XEXP (op, 0)) != SYMBOL_REF
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|| GET_CODE (XEXP (op, 1)) != CONST_INT)
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return false;
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op = XEXP (op, 0);
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/* FALLTHRU */
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case SYMBOL_REF:
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return SYMBOL_REF_SMALL_ADDR_P (op);
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default:
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gcc_unreachable ();
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}
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})
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;; True if OP refers to a symbol with which we may use any offset.
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(define_predicate "any_offset_symbol_operand"
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(match_code "symbol_ref")
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{
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if (TARGET_NO_PIC || TARGET_AUTO_PIC)
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return true;
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if (SYMBOL_REF_SMALL_ADDR_P (op))
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return true;
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if (SYMBOL_REF_FUNCTION_P (op))
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return false;
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if (sdata_symbolic_operand (op, mode))
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return true;
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return false;
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})
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;; True if OP refers to a symbol with which we may use 14-bit aligned offsets.
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;; False if OP refers to a symbol with which we may not use any offset at any
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;; time.
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(define_predicate "aligned_offset_symbol_operand"
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(and (match_code "symbol_ref")
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(match_test "! SYMBOL_REF_FUNCTION_P (op)")))
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;; True if OP refers to a symbol, and is appropriate for a GOT load.
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(define_predicate "got_symbolic_operand"
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(match_operand 0 "symbolic_operand" "")
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{
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HOST_WIDE_INT addend = 0;
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switch (GET_CODE (op))
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{
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case LABEL_REF:
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return true;
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case CONST:
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/* Accept only (plus (symbol_ref) (const_int)). */
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op = XEXP (op, 0);
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if (GET_CODE (op) != PLUS
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|| GET_CODE (XEXP (op, 0)) != SYMBOL_REF
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|| GET_CODE (XEXP (op, 1)) != CONST_INT)
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return false;
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addend = INTVAL (XEXP (op, 1));
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op = XEXP (op, 0);
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/* FALLTHRU */
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case SYMBOL_REF:
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/* These symbols shouldn't be used with got loads. */
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if (SYMBOL_REF_SMALL_ADDR_P (op))
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return false;
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if (SYMBOL_REF_TLS_MODEL (op) != 0)
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return false;
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if (any_offset_symbol_operand (op, mode))
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return true;
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/* The low 14 bits of the constant have been forced to zero
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so that we do not use up so many GOT entries. Prevent cse
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from undoing this. */
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if (aligned_offset_symbol_operand (op, mode))
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return (addend & 0x3fff) == 0;
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return addend == 0;
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default:
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gcc_unreachable ();
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}
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})
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;; Return true if OP is a valid thread local storage symbolic operand.
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(define_predicate "tls_symbolic_operand"
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(match_code "symbol_ref,const")
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{
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switch (GET_CODE (op))
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{
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case SYMBOL_REF:
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return SYMBOL_REF_TLS_MODEL (op) != 0;
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case CONST:
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op = XEXP (op, 0);
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if (GET_CODE (op) != PLUS
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|| GET_CODE (XEXP (op, 0)) != SYMBOL_REF
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|| GET_CODE (XEXP (op, 1)) != CONST_INT)
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return false;
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/* We only allow certain offsets for certain tls models. */
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switch (SYMBOL_REF_TLS_MODEL (XEXP (op, 0)))
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{
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case TLS_MODEL_GLOBAL_DYNAMIC:
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case TLS_MODEL_LOCAL_DYNAMIC:
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return false;
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case TLS_MODEL_INITIAL_EXEC:
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return (INTVAL (XEXP (op, 1)) & 0x3fff) == 0;
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case TLS_MODEL_LOCAL_EXEC:
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return true;
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default:
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return false;
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}
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default:
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gcc_unreachable ();
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}
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})
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;; Return true if OP is a local-dynamic thread local storage symbolic operand.
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(define_predicate "ld_tls_symbolic_operand"
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(and (match_code "symbol_ref")
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(match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_DYNAMIC")))
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;; Return true if OP is an initial-exec thread local storage symbolic operand.
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(define_predicate "ie_tls_symbolic_operand"
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(match_code "symbol_ref,const")
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{
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switch (GET_CODE (op))
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{
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case CONST:
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op = XEXP (op, 0);
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if (GET_CODE (op) != PLUS
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|| GET_CODE (XEXP (op, 0)) != SYMBOL_REF
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|| GET_CODE (XEXP (op, 1)) != CONST_INT
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|| (INTVAL (XEXP (op, 1)) & 0x3fff) != 0)
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return false;
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op = XEXP (op, 0);
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/* FALLTHRU */
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case SYMBOL_REF:
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return SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_INITIAL_EXEC;
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default:
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gcc_unreachable ();
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}
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})
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;; Return true if OP is a local-exec thread local storage symbolic operand.
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(define_predicate "le_tls_symbolic_operand"
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(match_code "symbol_ref,const")
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{
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switch (GET_CODE (op))
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{
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case CONST:
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op = XEXP (op, 0);
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if (GET_CODE (op) != PLUS
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|| GET_CODE (XEXP (op, 0)) != SYMBOL_REF
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|| GET_CODE (XEXP (op, 1)) != CONST_INT)
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return false;
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op = XEXP (op, 0);
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/* FALLTHRU */
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case SYMBOL_REF:
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return SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC;
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default:
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gcc_unreachable ();
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}
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})
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;; Like nonimmediate_operand, but don't allow MEMs that try to use a
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;; POST_MODIFY with a REG as displacement.
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(define_predicate "destination_operand"
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(and (match_operand 0 "nonimmediate_operand")
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(match_test "GET_CODE (op) != MEM
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|| GET_CODE (XEXP (op, 0)) != POST_MODIFY
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|| GET_CODE (XEXP (XEXP (XEXP (op, 0), 1), 1)) != REG")))
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283 |
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284 |
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;; Like destination_operand, but don't allow any post-increments.
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(define_predicate "not_postinc_destination_operand"
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(and (match_operand 0 "nonimmediate_operand")
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(match_test "GET_CODE (op) != MEM
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|| GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC")))
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289 |
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290 |
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;; Like memory_operand, but don't allow post-increments.
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(define_predicate "not_postinc_memory_operand"
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(and (match_operand 0 "memory_operand")
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(match_test "GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC")))
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294 |
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295 |
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;; True if OP is a general operand, with some restrictions on symbols.
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(define_predicate "move_operand"
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(match_operand 0 "general_operand")
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{
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switch (GET_CODE (op))
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{
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case CONST:
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{
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HOST_WIDE_INT addend;
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304 |
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305 |
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/* Accept only (plus (symbol_ref) (const_int)). */
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op = XEXP (op, 0);
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307 |
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if (GET_CODE (op) != PLUS
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308 |
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|| GET_CODE (XEXP (op, 0)) != SYMBOL_REF
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|| GET_CODE (XEXP (op, 1)) != CONST_INT)
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return false;
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311 |
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312 |
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addend = INTVAL (XEXP (op, 1));
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op = XEXP (op, 0);
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314 |
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315 |
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/* After reload, we want to allow any offset whatsoever. This
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allows reload the opportunity to avoid spilling addresses to
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the stack, and instead simply substitute in the value from a
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REG_EQUIV. We'll split this up again when splitting the insn. */
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if (reload_in_progress || reload_completed)
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return true;
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321 |
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322 |
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/* Some symbol types we allow to use with any offset. */
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if (any_offset_symbol_operand (op, mode))
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return true;
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325 |
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|
326 |
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/* Some symbol types we allow offsets with the low 14 bits of the
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327 |
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constant forced to zero so that we do not use up so many GOT
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328 |
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entries. We want to prevent cse from undoing this. */
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if (aligned_offset_symbol_operand (op, mode))
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return (addend & 0x3fff) == 0;
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/* The remaining symbol types may never be used with an offset. */
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return false;
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}
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default:
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return true;
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338 |
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}
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339 |
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})
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340 |
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341 |
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;; Like move_operand but don't allow post-increments.
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342 |
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(define_predicate "not_postinc_move_operand"
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343 |
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(and (match_operand 0 "move_operand")
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344 |
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(match_test "GET_CODE (op) != MEM
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345 |
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|| GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC")))
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346 |
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347 |
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;; True if OP is a register operand that is (or could be) a GR reg.
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348 |
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(define_predicate "gr_register_operand"
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349 |
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(match_operand 0 "register_operand")
|
350 |
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{
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351 |
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unsigned int regno;
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352 |
|
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if (GET_CODE (op) == SUBREG)
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353 |
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op = SUBREG_REG (op);
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354 |
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355 |
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regno = REGNO (op);
|
356 |
|
|
return (regno >= FIRST_PSEUDO_REGISTER || GENERAL_REGNO_P (regno));
|
357 |
|
|
})
|
358 |
|
|
|
359 |
|
|
;; True if OP is a register operand that is (or could be) an FR reg.
|
360 |
|
|
(define_predicate "fr_register_operand"
|
361 |
|
|
(match_operand 0 "register_operand")
|
362 |
|
|
{
|
363 |
|
|
unsigned int regno;
|
364 |
|
|
if (GET_CODE (op) == SUBREG)
|
365 |
|
|
op = SUBREG_REG (op);
|
366 |
|
|
|
367 |
|
|
regno = REGNO (op);
|
368 |
|
|
return (regno >= FIRST_PSEUDO_REGISTER || FR_REGNO_P (regno));
|
369 |
|
|
})
|
370 |
|
|
|
371 |
|
|
;; True if OP is a register operand that is (or could be) a GR/FR reg.
|
372 |
|
|
(define_predicate "grfr_register_operand"
|
373 |
|
|
(match_operand 0 "register_operand")
|
374 |
|
|
{
|
375 |
|
|
unsigned int regno;
|
376 |
|
|
if (GET_CODE (op) == SUBREG)
|
377 |
|
|
op = SUBREG_REG (op);
|
378 |
|
|
|
379 |
|
|
regno = REGNO (op);
|
380 |
|
|
return (regno >= FIRST_PSEUDO_REGISTER
|
381 |
|
|
|| GENERAL_REGNO_P (regno)
|
382 |
|
|
|| FR_REGNO_P (regno));
|
383 |
|
|
})
|
384 |
|
|
|
385 |
|
|
;; True if OP is a nonimmediate operand that is (or could be) a GR reg.
|
386 |
|
|
(define_predicate "gr_nonimmediate_operand"
|
387 |
|
|
(match_operand 0 "nonimmediate_operand")
|
388 |
|
|
{
|
389 |
|
|
unsigned int regno;
|
390 |
|
|
|
391 |
|
|
if (GET_CODE (op) == MEM)
|
392 |
|
|
return true;
|
393 |
|
|
if (GET_CODE (op) == SUBREG)
|
394 |
|
|
op = SUBREG_REG (op);
|
395 |
|
|
|
396 |
|
|
regno = REGNO (op);
|
397 |
|
|
return (regno >= FIRST_PSEUDO_REGISTER || GENERAL_REGNO_P (regno));
|
398 |
|
|
})
|
399 |
|
|
|
400 |
|
|
;; True if OP is a nonimmediate operand that is (or could be) a FR reg.
|
401 |
|
|
(define_predicate "fr_nonimmediate_operand"
|
402 |
|
|
(match_operand 0 "nonimmediate_operand")
|
403 |
|
|
{
|
404 |
|
|
unsigned int regno;
|
405 |
|
|
|
406 |
|
|
if (GET_CODE (op) == MEM)
|
407 |
|
|
return true;
|
408 |
|
|
if (GET_CODE (op) == SUBREG)
|
409 |
|
|
op = SUBREG_REG (op);
|
410 |
|
|
|
411 |
|
|
regno = REGNO (op);
|
412 |
|
|
return (regno >= FIRST_PSEUDO_REGISTER || FR_REGNO_P (regno));
|
413 |
|
|
})
|
414 |
|
|
|
415 |
|
|
;; True if OP is a nonimmediate operand that is (or could be) a GR/FR reg.
|
416 |
|
|
(define_predicate "grfr_nonimmediate_operand"
|
417 |
|
|
(match_operand 0 "nonimmediate_operand")
|
418 |
|
|
{
|
419 |
|
|
unsigned int regno;
|
420 |
|
|
|
421 |
|
|
if (GET_CODE (op) == MEM)
|
422 |
|
|
return true;
|
423 |
|
|
if (GET_CODE (op) == SUBREG)
|
424 |
|
|
op = SUBREG_REG (op);
|
425 |
|
|
|
426 |
|
|
regno = REGNO (op);
|
427 |
|
|
return (regno >= FIRST_PSEUDO_REGISTER
|
428 |
|
|
|| GENERAL_REGNO_P (regno)
|
429 |
|
|
|| FR_REGNO_P (regno));
|
430 |
|
|
})
|
431 |
|
|
|
432 |
|
|
;; True if OP is a GR register operand, or zero.
|
433 |
|
|
(define_predicate "gr_reg_or_0_operand"
|
434 |
|
|
(ior (match_operand 0 "gr_register_operand")
|
435 |
|
|
(and (match_code "const_int,const_double,const_vector")
|
436 |
|
|
(match_test "op == CONST0_RTX (GET_MODE (op))"))))
|
437 |
|
|
|
438 |
|
|
;; True if OP is a GR register operand, or a 5-bit immediate operand.
|
439 |
|
|
(define_predicate "gr_reg_or_5bit_operand"
|
440 |
|
|
(ior (match_operand 0 "gr_register_operand")
|
441 |
|
|
(and (match_code "const_int")
|
442 |
|
|
(match_test "INTVAL (op) >= 0 && INTVAL (op) < 32"))))
|
443 |
|
|
|
444 |
|
|
;; True if OP is a GR register operand, or a 6-bit immediate operand.
|
445 |
|
|
(define_predicate "gr_reg_or_6bit_operand"
|
446 |
|
|
(ior (match_operand 0 "gr_register_operand")
|
447 |
|
|
(and (match_code "const_int")
|
448 |
|
|
(match_test "satisfies_constraint_M (op)"))))
|
449 |
|
|
|
450 |
|
|
;; True if OP is a GR register operand, or an 8-bit immediate operand.
|
451 |
|
|
(define_predicate "gr_reg_or_8bit_operand"
|
452 |
|
|
(ior (match_operand 0 "gr_register_operand")
|
453 |
|
|
(and (match_code "const_int")
|
454 |
|
|
(match_test "satisfies_constraint_K (op)"))))
|
455 |
|
|
|
456 |
|
|
;; True if OP is a GR/FR register operand, or an 8-bit immediate operand.
|
457 |
|
|
(define_predicate "grfr_reg_or_8bit_operand"
|
458 |
|
|
(ior (match_operand 0 "grfr_register_operand")
|
459 |
|
|
(and (match_code "const_int")
|
460 |
|
|
(match_test "satisfies_constraint_K (op)"))))
|
461 |
|
|
|
462 |
|
|
;; True if OP is a register operand, or an 8-bit adjusted immediate operand.
|
463 |
|
|
(define_predicate "gr_reg_or_8bit_adjusted_operand"
|
464 |
|
|
(ior (match_operand 0 "gr_register_operand")
|
465 |
|
|
(and (match_code "const_int")
|
466 |
|
|
(match_test "satisfies_constraint_L (op)"))))
|
467 |
|
|
|
468 |
|
|
;; True if OP is a register operand, or is valid for both an 8-bit
|
469 |
|
|
;; immediate and an 8-bit adjusted immediate operand. This is necessary
|
470 |
|
|
;; because when we emit a compare, we don't know what the condition will be,
|
471 |
|
|
;; so we need the union of the immediates accepted by GT and LT.
|
472 |
|
|
(define_predicate "gr_reg_or_8bit_and_adjusted_operand"
|
473 |
|
|
(ior (match_operand 0 "gr_register_operand")
|
474 |
|
|
(and (match_code "const_int")
|
475 |
|
|
(match_test "satisfies_constraint_K (op)
|
476 |
|
|
&& satisfies_constraint_L (op)"))))
|
477 |
|
|
|
478 |
|
|
;; True if OP is a register operand, or a 14-bit immediate operand.
|
479 |
|
|
(define_predicate "gr_reg_or_14bit_operand"
|
480 |
|
|
(ior (match_operand 0 "gr_register_operand")
|
481 |
|
|
(and (match_code "const_int")
|
482 |
|
|
(match_test "satisfies_constraint_I (op)"))))
|
483 |
|
|
|
484 |
|
|
;; True if OP is a register operand, or a 22-bit immediate operand.
|
485 |
|
|
(define_predicate "gr_reg_or_22bit_operand"
|
486 |
|
|
(ior (match_operand 0 "gr_register_operand")
|
487 |
|
|
(and (match_code "const_int")
|
488 |
|
|
(match_test "satisfies_constraint_J (op)"))))
|
489 |
|
|
|
490 |
|
|
;; True if OP is a 7-bit immediate operand.
|
491 |
|
|
(define_predicate "dshift_count_operand"
|
492 |
|
|
(and (match_code "const_int")
|
493 |
|
|
(match_test "INTVAL (op) >= 0 && INTVAL (op) < 128")))
|
494 |
|
|
|
495 |
|
|
;; True if OP is a 6-bit immediate operand.
|
496 |
|
|
(define_predicate "shift_count_operand"
|
497 |
|
|
(and (match_code "const_int")
|
498 |
|
|
(match_test "satisfies_constraint_M (op)")))
|
499 |
|
|
|
500 |
|
|
;; True if OP-1 is a 6-bit immediate operand, used in extr instruction.
|
501 |
|
|
(define_predicate "extr_len_operand"
|
502 |
|
|
(and (match_code "const_int")
|
503 |
|
|
(match_test "satisfies_constraint_M (GEN_INT (INTVAL (op) - 1))")))
|
504 |
|
|
|
505 |
|
|
;; True if OP is a 5-bit immediate operand.
|
506 |
|
|
(define_predicate "shift_32bit_count_operand"
|
507 |
|
|
(and (match_code "const_int")
|
508 |
|
|
(match_test "INTVAL (op) >= 0 && INTVAL (op) < 32")))
|
509 |
|
|
|
510 |
|
|
;; True if OP is one of the immediate values 2, 4, 8, or 16.
|
511 |
|
|
(define_predicate "shladd_operand"
|
512 |
|
|
(and (match_code "const_int")
|
513 |
|
|
(match_test "INTVAL (op) == 2 || INTVAL (op) == 4 ||
|
514 |
|
|
INTVAL (op) == 8 || INTVAL (op) == 16")))
|
515 |
|
|
|
516 |
|
|
;; True if OP is one of the immediate values 1, 2, 3, or 4.
|
517 |
|
|
(define_predicate "shladd_log2_operand"
|
518 |
|
|
(and (match_code "const_int")
|
519 |
|
|
(match_test "INTVAL (op) >= 1 && INTVAL (op) <= 4")))
|
520 |
|
|
|
521 |
|
|
;; True if OP is one of the immediate values -16, -8, -4, -1, 1, 4, 8, 16.
|
522 |
|
|
(define_predicate "fetchadd_operand"
|
523 |
|
|
(and (match_code "const_int")
|
524 |
|
|
(match_test "INTVAL (op) == -16 || INTVAL (op) == -8 ||
|
525 |
|
|
INTVAL (op) == -4 || INTVAL (op) == -1 ||
|
526 |
|
|
INTVAL (op) == 1 || INTVAL (op) == 4 ||
|
527 |
|
|
INTVAL (op) == 8 || INTVAL (op) == 16")))
|
528 |
|
|
|
529 |
|
|
;; True if OP is one of the immediate values 0, 7, 15, 16
|
530 |
|
|
(define_predicate "pmpyshr_operand"
|
531 |
|
|
(and (match_code "const_int")
|
532 |
|
|
(match_test "INTVAL (op) == 0 || INTVAL (op) == 7
|
533 |
|
|
|| INTVAL (op) == 15 || INTVAL (op) == 16")))
|
534 |
|
|
|
535 |
|
|
;; True if OP is 0..3.
|
536 |
|
|
(define_predicate "const_int_2bit_operand"
|
537 |
|
|
(and (match_code "const_int")
|
538 |
|
|
(match_test "INTVAL (op) >= 0 && INTVAL (op) <= 3")))
|
539 |
|
|
|
540 |
|
|
;; True if OP is a floating-point constant zero, one, or a register.
|
541 |
|
|
(define_predicate "fr_reg_or_fp01_operand"
|
542 |
|
|
(ior (match_operand 0 "fr_register_operand")
|
543 |
|
|
(and (match_code "const_double")
|
544 |
|
|
(match_test "satisfies_constraint_G (op)"))))
|
545 |
|
|
|
546 |
|
|
;; Like fr_reg_or_fp01_operand, but don't allow any SUBREGs.
|
547 |
|
|
(define_predicate "xfreg_or_fp01_operand"
|
548 |
|
|
(and (match_operand 0 "fr_reg_or_fp01_operand")
|
549 |
|
|
(not (match_code "subreg"))))
|
550 |
|
|
|
551 |
|
|
;; Like fr_reg_or_fp01_operand, but don't allow 0 if flag_signed_zero is set.
|
552 |
|
|
;; Using f0 as the second arg to fadd or fsub, or as the third arg to fma or
|
553 |
|
|
;; fms can cause a zero result to have the wrong sign.
|
554 |
|
|
(define_predicate "fr_reg_or_signed_fp01_operand"
|
555 |
|
|
(ior (match_operand 0 "fr_register_operand")
|
556 |
|
|
(and (match_code "const_double")
|
557 |
|
|
(match_test "satisfies_constraint_Z (op)"))))
|
558 |
|
|
|
559 |
|
|
;; Like fr_reg_or_signed_fp01_operand, but don't allow any SUBREGs.
|
560 |
|
|
(define_predicate "xfreg_or_signed_fp01_operand"
|
561 |
|
|
(and (match_operand 0 "fr_reg_or_signed_fp01_operand")
|
562 |
|
|
(not (match_code "subreg"))))
|
563 |
|
|
|
564 |
|
|
;; True if OP is a constant zero, or a register.
|
565 |
|
|
(define_predicate "fr_reg_or_0_operand"
|
566 |
|
|
(ior (match_operand 0 "fr_register_operand")
|
567 |
|
|
(and (match_code "const_double,const_vector")
|
568 |
|
|
(match_test "op == CONST0_RTX (GET_MODE (op))"))))
|
569 |
|
|
|
570 |
|
|
;; Return 1 if OP is a valid comparison operator for "cbranch" instructions.
|
571 |
|
|
(define_predicate "ia64_cbranch_operator"
|
572 |
|
|
(ior (match_operand 0 "ordered_comparison_operator")
|
573 |
|
|
(match_code "ordered,unordered")))
|
574 |
|
|
|
575 |
|
|
;; True if this is a comparison operator, which accepts a normal 8-bit
|
576 |
|
|
;; signed immediate operand.
|
577 |
|
|
(define_predicate "normal_comparison_operator"
|
578 |
|
|
(match_code "eq,ne,gt,le,gtu,leu"))
|
579 |
|
|
|
580 |
|
|
;; True if this is a comparison operator, which accepts an adjusted 8-bit
|
581 |
|
|
;; signed immediate operand.
|
582 |
|
|
(define_predicate "adjusted_comparison_operator"
|
583 |
|
|
(match_code "lt,ge,ltu,geu"))
|
584 |
|
|
|
585 |
|
|
;; True if this is a signed inequality operator.
|
586 |
|
|
(define_predicate "signed_inequality_operator"
|
587 |
|
|
(match_code "ge,gt,le,lt"))
|
588 |
|
|
|
589 |
|
|
;; True if this operator is valid for predication.
|
590 |
|
|
(define_predicate "predicate_operator"
|
591 |
|
|
(match_code "eq,ne"))
|
592 |
|
|
|
593 |
|
|
;; True if this operator can be used in a conditional operation.
|
594 |
|
|
(define_predicate "condop_operator"
|
595 |
|
|
(match_code "plus,minus,ior,xor,and"))
|
596 |
|
|
|
597 |
|
|
;; These three are hardware registers that can only be addressed in
|
598 |
|
|
;; DImode. It's not strictly necessary to test mode == DImode here,
|
599 |
|
|
;; but it makes decent insurance against someone writing a
|
600 |
|
|
;; match_operand wrong.
|
601 |
|
|
|
602 |
|
|
;; True if this is the ar.lc register.
|
603 |
|
|
(define_predicate "ar_lc_reg_operand"
|
604 |
|
|
(and (match_code "reg")
|
605 |
|
|
(match_test "mode == DImode && REGNO (op) == AR_LC_REGNUM")))
|
606 |
|
|
|
607 |
|
|
;; True if this is the ar.ccv register.
|
608 |
|
|
(define_predicate "ar_ccv_reg_operand"
|
609 |
|
|
(and (match_code "reg")
|
610 |
|
|
(match_test "mode == DImode && REGNO (op) == AR_CCV_REGNUM")))
|
611 |
|
|
|
612 |
|
|
;; True if this is the ar.pfs register.
|
613 |
|
|
(define_predicate "ar_pfs_reg_operand"
|
614 |
|
|
(and (match_code "reg")
|
615 |
|
|
(match_test "mode == DImode && REGNO (op) == AR_PFS_REGNUM")))
|
616 |
|
|
|
617 |
|
|
;; True if OP is valid as a base register in a reg + offset address.
|
618 |
|
|
;; ??? Should I copy the flag_omit_frame_pointer and cse_not_expected
|
619 |
|
|
;; checks from pa.c basereg_operand as well? Seems to be OK without them
|
620 |
|
|
;; in test runs.
|
621 |
|
|
(define_predicate "basereg_operand"
|
622 |
|
|
(match_operand 0 "register_operand")
|
623 |
|
|
{
|
624 |
|
|
return REG_P (op) && REG_POINTER (op);
|
625 |
|
|
})
|
626 |
|
|
|
627 |
|
|
;; True if this is the right-most vector element; for mux1 @brcst.
|
628 |
|
|
(define_predicate "mux1_brcst_element"
|
629 |
|
|
(and (match_code "const_int")
|
630 |
|
|
(match_test "INTVAL (op) == (TARGET_BIG_ENDIAN ? 7 : 0)")))
|