OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [m68k/] [m68k.opt] - Blame information for rev 747

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 709 jeremybenn 
; Options for the Motorola 68000 port of the compiler.
2 
 
3 
; Copyright (C) 2005, 2006, 2007, 2008, 2009, 2011
4 
; Free Software Foundation, Inc.
5 
;
6 
; This file is part of GCC.
7 
;
8 
; GCC is free software; you can redistribute it and/or modify it under
9 
; the terms of the GNU General Public License as published by the Free
10 
; Software Foundation; either version 3, or (at your option) any later
11 
; version.
12 
;
13 
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 
; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16 
; for more details.
17 
;
18 
; You should have received a copy of the GNU General Public License
19 
; along with GCC; see the file COPYING3.  If not see
20 
; .
21 
 
22 
HeaderInclude
23 
config/m68k/m68k-opts.h
24 
 
25 
; Specify the identification number of the library being built.
26 
Variable
27 
const char *m68k_library_id_string = "_current_shared_library_a5_offset_"
28 
 
29 
m5200
30 
Target RejectNegative Alias(mcpu=, 5206)
31 
Generate code for a 520X
32 
 
33 
m5206e
34 
Target RejectNegative Alias(mcpu=, 5206e)
35 
Generate code for a 5206e
36 
 
37 
m528x
38 
Target RejectNegative Alias(mcpu=, 528x)
39 
Generate code for a 528x
40 
 
41 
m5307
42 
Target RejectNegative Alias(mcpu=, 5307)
43 
Generate code for a 5307
44 
 
45 
m5407
46 
Target RejectNegative Alias(mcpu=, 5407)
47 
Generate code for a 5407
48 
 
49 
m68000
50 
Target RejectNegative Alias(mcpu=, 68000)
51 
Generate code for a 68000
52 
 
53 
m68010
54 
Target RejectNegative Alias(mcpu=, 68010)
55 
Generate code for a 68010
56 
 
57 
m68020
58 
Target RejectNegative Alias(mcpu=, 68020)
59 
Generate code for a 68020
60 
 
61 
m68020-40
62 
Target RejectNegative
63 
Generate code for a 68040, without any new instructions
64 
 
65 
m68020-60
66 
Target RejectNegative
67 
Generate code for a 68060, without any new instructions
68 
 
69 
m68030
70 
Target RejectNegative Alias(mcpu=, 68030)
71 
Generate code for a 68030
72 
 
73 
m68040
74 
Target RejectNegative Alias(mcpu=, 68040)
75 
Generate code for a 68040
76 
 
77 
m68060
78 
Target RejectNegative Alias(mcpu=, 68060)
79 
Generate code for a 68060
80 
 
81 
m68302
82 
Target RejectNegative Alias(mcpu=, 68302)
83 
Generate code for a 68302
84 
 
85 
m68332
86 
Target RejectNegative Alias(mcpu=, 68332)
87 
Generate code for a 68332
88 
 
89 
; Has no effect on gcc
90 
m68851
91 
Target
92 
Generate code for a 68851
93 
 
94 
m68881
95 
Target RejectNegative Mask(HARD_FLOAT)
96 
Generate code that uses 68881 floating-point instructions
97 
 
98 
malign-int
99 
Target Report Mask(ALIGN_INT)
100 
Align variables on a 32-bit boundary
101 
 
102 
march=
103 
Target RejectNegative Joined Enum(m68k_isa) Var(m68k_arch_option)
104 
Specify the name of the target architecture
105 
 
106 
mbitfield
107 
Target Report Mask(BITFIELD)
108 
Use the bit-field instructions
109 
 
110 
mc68000
111 
Target RejectNegative Alias(mcpu=, 68000)
112 
Generate code for a 68000
113 
 
114 
mc68020
115 
Target RejectNegative Alias(mcpu=, 68020)
116 
Generate code for a 68020
117 
 
118 
mcfv4e
119 
Target RejectNegative Alias(mcpu=, 547x)
120 
Generate code for a ColdFire v4e
121 
 
122 
mcpu=
123 
Target RejectNegative Joined Enum(target_device) Var(m68k_cpu_option) Init(unk_device)
124 
Specify the target CPU
125 
 
126 
mcpu32
127 
Target RejectNegative Alias(mcpu=, 68332)
128 
Generate code for a cpu32
129 
 
130 
mdiv
131 
Target Report Mask(CF_HWDIV)
132 
Use hardware division instructions on ColdFire
133 
 
134 
mfidoa
135 
Target RejectNegative
136 
Generate code for a Fido A
137 
 
138 
mhard-float
139 
Target RejectNegative Mask(HARD_FLOAT) MaskExists
140 
Generate code which uses hardware floating point instructions
141 
 
142 
mid-shared-library
143 
Target Report Mask(ID_SHARED_LIBRARY)
144 
Enable ID based shared library
145 
 
146 
mnobitfield
147 
Target RejectNegative InverseMask(BITFIELD)
148 
Do not use the bit-field instructions
149 
 
150 
mnortd
151 
Target RejectNegative InverseMask(RTD)
152 
Use normal calling convention
153 
 
154 
mnoshort
155 
Target RejectNegative InverseMask(SHORT)
156 
Consider type 'int' to be 32 bits wide
157 
 
158 
mpcrel
159 
Target Report Mask(PCREL)
160 
Generate pc-relative code
161 
 
162 
mrtd
163 
Target Report Mask(RTD)
164 
Use different calling convention using 'rtd'
165 
 
166 
msep-data
167 
Target Report Mask(SEP_DATA)
168 
Enable separate data segment
169 
 
170 
mshared-library-id=
171 
Target RejectNegative Joined UInteger
172 
ID of shared library to build
173 
 
174 
mshort
175 
Target Report Mask(SHORT)
176 
Consider type 'int' to be 16 bits wide
177 
 
178 
msoft-float
179 
Target RejectNegative InverseMask(HARD_FLOAT)
180 
Generate code with library calls for floating point
181 
 
182 
mstrict-align
183 
Target Report Mask(STRICT_ALIGNMENT)
184 
Do not use unaligned memory references
185 
 
186 
mtune=
187 
Target RejectNegative Joined Enum(uarch_type) Var(m68k_tune_option) Init(unk_arch)
188 
Tune for the specified target CPU or architecture
189 
 
190 
mxgot
191 
Target Report Mask(XGOT)
192 
Support more than 8192 GOT entries on ColdFire
193 
 
194 
mxtls
195 
Target Report Mask(XTLS)
196 
Support TLS segment larger than 64K

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.