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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [mep/] [mep.opt] - Blame information for rev 713

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; Target specific command line options for the MEP port of the compiler.
; Copyright (C) 2005, 2007, 2009, 2010, 2011 Free Software Foundation, Inc.
; Contributed by Red Hat Inc.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
; for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3.  If not see
; .  */
 
Mask(IVC2)
 
mabsdiff
Target Mask(OPT_ABSDIFF)
Enable absolute difference instructions
 
mall-opts
Target RejectNegative
Enable all optional instructions
 
maverage
Target Mask(OPT_AVERAGE)
Enable average instructions
 
mbased=
Target Joined Var(mep_based_cutoff) RejectNegative UInteger Init(0)
Variables this size and smaller go in the based section. (default 0)
 
mbitops
Target Mask(OPT_BITOPS)
Enable bit manipulation instructions
 
mc=
Target Joined Var(mep_const_section) RejectNegative
Section to put all const variables in (tiny, near, far) (no default)
 
mclip
Target Mask(OPT_CLIP)
Enable clip instructions
 
mconfig=
Target Joined Var(mep_config_string) RejectNegative
Configuration name
 
mcop
Target Mask(COP)
Enable MeP Coprocessor
 
mcop32
Target Mask(COP) MaskExists RejectNegative
Enable MeP Coprocessor with 32-bit registers
 
mcop64
Target Mask(64BIT_CR_REGS) RejectNegative
Enable MeP Coprocessor with 64-bit registers
 
mivc2
Target RejectNegative Var(mep_deferred_options) Defer
Enable IVC2 scheduling
 
mdc
Target Mask(DC) RejectNegative
Const variables default to the near section
 
mdebug
Target Disabled Undocumented
 
mdiv
Target Mask(OPT_DIV)
Enable 32-bit divide instructions
 
meb
Target InverseMask(LITTLE_ENDIAN) RejectNegative
Use big-endian byte order
 
mel
Target Mask(LITTLE_ENDIAN) RejectNegative
Use little-endian byte order
 
mfar
Driver RejectNegative
 
mio-volatile
Target Mask(IO_VOLATILE)
__io vars are volatile by default
 
ml
Target Mask(L) RejectNegative
All variables default to the far section
 
mleadz
Target Mask(OPT_LEADZ)
Enable leading zero instructions
 
mlibrary
Target Mask(LIBRARY) RejectNegative Undocumented
 
mm
Target Mask(M) RejectNegative
All variables default to the near section
 
mminmax
Target Mask(OPT_MINMAX)
Enable min/max instructions
 
mmult
Target Mask(OPT_MULT)
Enable 32-bit multiply instructions
 
mno-opts
Target RejectNegative
Disable all optional instructions
 
mrand-tpgp
Target Mask(RAND_TPGP) RejectNegative Undocumented
 
mrepeat
Target Mask(OPT_REPEAT)
Allow gcc to use the repeat/erepeat instructions
 
ms
Target Mask(S) RejectNegative
All variables default to the tiny section
 
msatur
Target Mask(OPT_SATUR)
Enable saturation instructions
 
msdram
Target
Use sdram version of runtime
 
msim
Target RejectNegative
Use simulator runtime
 
msimnovec
Target RejectNegative
Use simulator runtime without vectors
 
mtf
Target Mask(TF) RejectNegative
All functions default to the far section
 
mtiny=
Target Joined Var(mep_tiny_cutoff) RejectNegative UInteger Init(4)
Variables this size and smaller go in the tiny section. (default 4)
 
mvl32
Target InverseMask(OPT_VL64) Undocumented RejectNegative
 
mvl64
Target Mask(OPT_VL64) Undocumented RejectNegative
 
mvliw
Target Mask(VLIW) Undocumented

Line No.	Rev	Author	Line
1	709	jeremybenn	`; Target specific command line options for the MEP port of the compiler.`
2			`; Copyright (C) 2005, 2007, 2009, 2010, 2011 Free Software Foundation, Inc.`
3			`; Contributed by Red Hat Inc.`
4			`;`
5			`; GCC is free software; you can redistribute it and/or modify it under`
6			`; the terms of the GNU General Public License as published by the Free`
7			`; Software Foundation; either version 3, or (at your option) any later`
8			`; version.`
9			`;`
10			`; GCC is distributed in the hope that it will be useful, but WITHOUT ANY`
11			`; WARRANTY; without even the implied warranty of MERCHANTABILITY or`
12			`; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License`
13			`; for more details.`
14			`;`
15			`; You should have received a copy of the GNU General Public License`
16			`; along with GCC; see the file COPYING3. If not see`
17			`; . */`
18
19			`Mask(IVC2)`
20
21			`mabsdiff`
22			`Target Mask(OPT_ABSDIFF)`
23			`Enable absolute difference instructions`
24
25			`mall-opts`
26			`Target RejectNegative`
27			`Enable all optional instructions`
28
29			`maverage`
30			`Target Mask(OPT_AVERAGE)`
31			`Enable average instructions`
32
33			`mbased=`
34			`Target Joined Var(mep_based_cutoff) RejectNegative UInteger Init(0)`
35			`Variables this size and smaller go in the based section. (default 0)`
36
37			`mbitops`
38			`Target Mask(OPT_BITOPS)`
39			`Enable bit manipulation instructions`
40
41			`mc=`
42			`Target Joined Var(mep_const_section) RejectNegative`
43			`Section to put all const variables in (tiny, near, far) (no default)`
44
45			`mclip`
46			`Target Mask(OPT_CLIP)`
47			`Enable clip instructions`
48
49			`mconfig=`
50			`Target Joined Var(mep_config_string) RejectNegative`
51			`Configuration name`
52
53			`mcop`
54			`Target Mask(COP)`
55			`Enable MeP Coprocessor`
56
57			`mcop32`
58			`Target Mask(COP) MaskExists RejectNegative`
59			`Enable MeP Coprocessor with 32-bit registers`
60
61			`mcop64`
62			`Target Mask(64BIT_CR_REGS) RejectNegative`
63			`Enable MeP Coprocessor with 64-bit registers`
64
65			`mivc2`
66			`Target RejectNegative Var(mep_deferred_options) Defer`
67			`Enable IVC2 scheduling`
68
69			`mdc`
70			`Target Mask(DC) RejectNegative`
71			`Const variables default to the near section`
72
73			`mdebug`
74			`Target Disabled Undocumented`
75
76			`mdiv`
77			`Target Mask(OPT_DIV)`
78			`Enable 32-bit divide instructions`
79
80			`meb`
81			`Target InverseMask(LITTLE_ENDIAN) RejectNegative`
82			`Use big-endian byte order`
83
84			`mel`
85			`Target Mask(LITTLE_ENDIAN) RejectNegative`
86			`Use little-endian byte order`
87
88			`mfar`
89			`Driver RejectNegative`
90
91			`mio-volatile`
92			`Target Mask(IO_VOLATILE)`
93			`__io vars are volatile by default`
94
95			`ml`
96			`Target Mask(L) RejectNegative`
97			`All variables default to the far section`
98
99			`mleadz`
100			`Target Mask(OPT_LEADZ)`
101			`Enable leading zero instructions`
102
103			`mlibrary`
104			`Target Mask(LIBRARY) RejectNegative Undocumented`
105
106			`mm`
107			`Target Mask(M) RejectNegative`
108			`All variables default to the near section`
109
110			`mminmax`
111			`Target Mask(OPT_MINMAX)`
112			`Enable min/max instructions`
113
114			`mmult`
115			`Target Mask(OPT_MULT)`
116			`Enable 32-bit multiply instructions`
117
118			`mno-opts`
119			`Target RejectNegative`
120			`Disable all optional instructions`
121
122			`mrand-tpgp`
123			`Target Mask(RAND_TPGP) RejectNegative Undocumented`
124
125			`mrepeat`
126			`Target Mask(OPT_REPEAT)`
127			`Allow gcc to use the repeat/erepeat instructions`
128
129			`ms`
130			`Target Mask(S) RejectNegative`
131			`All variables default to the tiny section`
132
133			`msatur`
134			`Target Mask(OPT_SATUR)`
135			`Enable saturation instructions`
136
137			`msdram`
138			`Target`
139			`Use sdram version of runtime`
140
141			`msim`
142			`Target RejectNegative`
143			`Use simulator runtime`
144
145			`msimnovec`
146			`Target RejectNegative`
147			`Use simulator runtime without vectors`
148
149			`mtf`
150			`Target Mask(TF) RejectNegative`
151			`All functions default to the far section`
152
153			`mtiny=`
154			`Target Joined Var(mep_tiny_cutoff) RejectNegative UInteger Init(4)`
155			`Variables this size and smaller go in the tiny section. (default 4)`
156
157			`mvl32`
158			`Target InverseMask(OPT_VL64) Undocumented RejectNegative`
159
160			`mvl64`
161			`Target Mask(OPT_VL64) Undocumented RejectNegative`
162
163			`mvliw`
164			`Target Mask(VLIW) Undocumented`

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Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [mep/] [mep.opt] - Blame information for rev 713