OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [microblaze/] [microblaze.opt] - Blame information for rev 867

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 709 jeremybenn
; Options for the MicroBlaze port of the compiler
2
;
3
; Copyright 2009, 2010, 2011 Free Software Foundation, Inc.
4
;
5
; Contributed by Michael Eager .
6
;
7
; This file is part of GCC.
8
;
9
; GCC is free software; you can redistribute it and/or modify it under
10
; the terms of the GNU General Public License as published by the Free
11
; Software Foundation; either version 3, or (at your option) any later
12
; version.
13
;
14
; GCC is distributed in the hope that it will be useful, but WITHOUT
15
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16
; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
17
; License for more details.
18
;
19
; You should have received a copy of the GNU General Public License
20
; along with GCC; see the file COPYING3.  If not see
21
; .  */
22
 
23
Zxl-mode-bootstrap
24
Driver
25
 
26
Zxl-mode-executable
27
Driver
28
 
29
Zxl-mode-novectors
30
Driver
31
 
32
Zxl-mode-xilkernel
33
Driver
34
 
35
Zxl-mode-xmdstub
36
Driver
37
 
38
msoft-float
39
Target Report RejectNegative Mask(SOFT_FLOAT)
40
Use software emulation for floating point (default)
41
 
42
mhard-float
43
Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
44
Use hardware floating point instructions
45
 
46
msmall-divides
47
Target Mask(SMALL_DIVIDES)
48
Use table lookup optimization for small signed integer divisions
49
 
50
mcpu=
51
Target RejectNegative Joined Var(microblaze_select_cpu)
52
-mcpu=PROCESSOR         Use features of and schedule code for given CPU
53
 
54
mmemcpy
55
Target Mask(MEMCPY)
56
Don't optimize block moves, use memcpy
57
 
58
mxl-soft-mul
59
Target Mask(SOFT_MUL)
60
Use the soft multiply emulation (default)
61
 
62
mxl-soft-div
63
Target Mask(SOFT_DIV)
64
Use the software emulation for divides (default)
65
 
66
mxl-barrel-shift
67
Target Mask(BARREL_SHIFT)
68
Use the hardware barrel shifter instead of emulation
69
 
70
mxl-pattern-compare
71
Target Mask(PATTERN_COMPARE)
72
Use pattern compare instructions
73
 
74
mxl-stack-check
75
Target Mask(STACK_CHECK) Warn(%qs is deprecated; use -fstack-check)
76
Check for stack overflow at runtime
77
 
78
mxl-gp-opt
79
Target Mask(XLGPOPT)
80
Use GP relative sdata/sbss sections
81
 
82
mno-clearbss
83
Target RejectNegative Var(flag_zero_initialized_in_bss, 0) Warn(%qs is deprecated; use -fno-zero-initialized-in-bss)
84
Clear the BSS to zero and place zero initialized in BSS
85
 
86
mxl-multiply-high
87
Target Mask(MULTIPLY_HIGH)
88
Use multiply high instructions for high part of 32x32 multiply
89
 
90
mxl-float-convert
91
Target Mask(FLOAT_CONVERT)
92
Use hardware floating point conversion instructions
93
 
94
mxl-float-sqrt
95
Target Mask(FLOAT_SQRT)
96
Use hardware floating point square root instruction
97
 
98
mxl-mode-executable
99
Target Mask(XL_MODE_EXECUTABLE)
100
Description for mxl-mode-executable
101
 
102
mxl-mode-xmdstub
103
Target Mask(XL_MODE_XMDSTUB)
104
Description for mxl-mode-xmdstub
105
 
106
mxl-mode-bootstrap
107
Target Mask(XL_MODE_BOOTSTRAP)
108
Description for mxl-mode-bootstrap
109
 
110
mxl-mode-novectors
111
Target Mask(XL_MODE_NOVECTORS)
112
Description for mxl-mode-novectors
113
 
114
mxl-mode-xilkernel
115
Target

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.