OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [mips/] [3000.md] - Blame information for rev 757

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 709 jeremybenn
;; R3000 and TX39 pipeline description.
2
;;   Copyright (C) 2004, 2005, 2007 Free Software Foundation, Inc.
3
;;
4
;; This file is part of GCC.
5
 
6
;; GCC is free software; you can redistribute it and/or modify it
7
;; under the terms of the GNU General Public License as published
8
;; by the Free Software Foundation; either version 3, or (at your
9
;; option) any later version.
10
 
11
;; GCC is distributed in the hope that it will be useful, but WITHOUT
12
;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13
;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
14
;; License for more details.
15
 
16
;; You should have received a copy of the GNU General Public License
17
;; along with GCC; see the file COPYING3.  If not see
18
;; .
19
 
20
 
21
;; This file overrides parts of generic.md.  It is derived from the
22
;; old define_function_unit description.
23
 
24
(define_insn_reservation "r3k_load" 2
25
  (and (eq_attr "cpu" "r3000,r3900")
26
       (eq_attr "type" "load,fpload,fpidxload"))
27
  "alu")
28
 
29
(define_insn_reservation "r3k_imul" 12
30
  (and (eq_attr "cpu" "r3000,r3900")
31
       (eq_attr "type" "imul,imul3,imadd"))
32
  "imuldiv*12")
33
 
34
(define_insn_reservation "r3k_idiv" 35
35
  (and (eq_attr "cpu" "r3000,r3900")
36
       (eq_attr "type" "idiv"))
37
  "imuldiv*35")
38
 
39
(define_insn_reservation "r3k_fmove" 1
40
  (and (eq_attr "cpu" "r3000,r3900")
41
       (eq_attr "type" "fabs,fneg,fmove"))
42
  "alu")
43
 
44
(define_insn_reservation "r3k_fadd" 2
45
  (and (eq_attr "cpu" "r3000,r3900")
46
       (eq_attr "type" "fcmp,fadd"))
47
  "alu")
48
 
49
(define_insn_reservation "r3k_fmul_single" 4
50
  (and (eq_attr "cpu" "r3000,r3900")
51
       (and (eq_attr "type" "fmul,fmadd")
52
            (eq_attr "mode" "SF")))
53
  "alu")
54
 
55
(define_insn_reservation "r3k_fmul_double" 5
56
  (and (eq_attr "cpu" "r3000,r3900")
57
       (and (eq_attr "type" "fmul,fmadd")
58
            (eq_attr "mode" "DF")))
59
  "alu")
60
 
61
(define_insn_reservation "r3k_fdiv_single" 12
62
  (and (eq_attr "cpu" "r3000,r3900")
63
       (and (eq_attr "type" "fdiv,frdiv")
64
            (eq_attr "mode" "SF")))
65
  "alu")
66
 
67
(define_insn_reservation "r3k_fdiv_double" 19
68
  (and (eq_attr "cpu" "r3000,r3900")
69
       (and (eq_attr "type" "fdiv,frdiv")
70
            (eq_attr "mode" "DF")))
71
  "alu")

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.