OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [mips/] [t-vr] - Blame information for rev 801

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 709 jeremybenn
# Copyright (C) 2002, 2004, 2005, 2011 Free Software Foundation, Inc.
2
#
3
# This file is part of GCC.
4
#
5
# GCC is free software; you can redistribute it and/or modify
6
# it under the terms of the GNU General Public License as published by
7
# the Free Software Foundation; either version 3, or (at your option)
8
# any later version.
9
#
10
# GCC is distributed in the hope that it will be useful,
11
# but WITHOUT ANY WARRANTY; without even the implied warranty of
12
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
# GNU General Public License for more details.
14
#
15
# You should have received a copy of the GNU General Public License
16
# along with GCC; see the file COPYING3.  If not see
17
# .
18
 
19
# Main multilibs
20
# --------------
21
#
22
# Endianness: EB or EL
23
#
24
# ABIs: mabi=32
25
#       mabi=o64
26
#       mabi=eabi
27
#       mabi=eabi/mlong32
28
#       mabi=eabi/mgp32
29
#       mabi=eabi/mgp32/mlong64
30
#
31
# Architecture: march=vr4120 with -mfix-vr4120
32
#               march=vr4130 with -mfix-vr4130 (default)
33
#               march=vr5000
34
#               march=vr5400
35
#               march=vr5500
36
#
37
# Total: 2 * 6 * 5 = 60 multilibs.
38
#
39
#
40
# Extra vr4300 multilibs
41
# ----------------------
42
#
43
# Endianness: EB or EL
44
#
45
# ABI: o64
46
#
47
# Architecture: vr4300.
48
#
49
# Total: 2 * 1 * 2 = 2 multilibs.
50
#
51
#
52
# Extra MIPS16 multilibs
53
# ----------------------
54
#
55
# Endianness: EB or EL
56
#
57
# ABIs: mabi=o64
58
#       mabi=eabi/mlong32
59
#       mabi=eabi/mgp32
60
#
61
# Architecture: march=vr4120 with -mfix-vr4120
62
#               march=vr4130 with -mfix-vr4130 (default)
63
#
64
# Total: 2 * 3 * 2 = 12 multilibs.
65
MULTILIB_OPTIONS =                      \
66
        EL/EB                           \
67
        mabi=32/mabi=o64/mabi=eabi      \
68
        mgp32                           \
69
        mlong64                         \
70
        mips16                          \
71
        mfix-vr4120/mfix-vr4130/march=vr4300/march=vr5000/march=vr5400/march=vr5500
72
 
73
MULTILIB_DIRNAMES =     \
74
        el eb           \
75
        o32 o64 eabi    \
76
        gp32            \
77
        long64          \
78
        mips16          \
79
        vr4120 vr4130 vr4300 vr5000 vr5400 vr5500
80
 
81
MULTILIB_MATCHES = EL=mel EB=meb mfix-vr4120=march?vr4120 \
82
                   mfix-vr4130=march?vr4130
83
 
84
# Assume a 41xx-series is the default: we'd need a *mips16 entry if
85
# the default processor didn't support mips16.  Also assume the
86
# default ABI is EABI64 -mlong32.
87
MULTILIB_EXCEPTIONS =                           \
88
        *mabi=32/mlong64*                       \
89
        *mabi=32/mgp32*                         \
90
        *mabi=o64/mgp32*                        \
91
        *mabi=o64/mlong64*                      \
92
        *mips16/march=vr5*                      \
93
        *mips16/march=vr4300                    \
94
        $(MIPS16_EXCEPTIONS)                    \
95
        $(VR4300_EXCEPTIONS)
96
 
97
MIPS16_EXCEPTIONS =                             \
98
        *mabi=32*mips16*                        \
99
        *mlong64*mips16*
100
 
101
VR4300_EXCEPTIONS =                             \
102
        *mabi=32*march=vr4300                   \
103
        *mgp32*march=vr4300                     \
104
        *mlong64*march=vr4300                   \
105
        march=vr4300                            \
106
        E[LB]/march=vr4300

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.