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1 709 jeremybenn
/* Definitions of target machine for GNU compiler, for the HP Spectrum.
2
   Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
3
   2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4
   Free Software Foundation, Inc.
5
   Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
6
   and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
7
   Software Science at the University of Utah.
8
 
9
This file is part of GCC.
10
 
11
GCC is free software; you can redistribute it and/or modify
12
it under the terms of the GNU General Public License as published by
13
the Free Software Foundation; either version 3, or (at your option)
14
any later version.
15
 
16
GCC is distributed in the hope that it will be useful,
17
but WITHOUT ANY WARRANTY; without even the implied warranty of
18
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19
GNU General Public License for more details.
20
 
21
You should have received a copy of the GNU General Public License
22
along with GCC; see the file COPYING3.  If not see
23
<http://www.gnu.org/licenses/>.  */
24
 
25
/* For long call handling.  */
26
extern unsigned long total_code_bytes;
27
 
28
#define pa_cpu_attr ((enum attr_cpu)pa_cpu)
29
 
30
#define TARGET_PA_10 (!TARGET_PA_11 && !TARGET_PA_20)
31
 
32
/* Generate code for the HPPA 2.0 architecture in 64bit mode.  */
33
#ifndef TARGET_64BIT
34
#define TARGET_64BIT 0
35
#endif
36
 
37
/* Generate code for ELF32 ABI.  */
38
#ifndef TARGET_ELF32
39
#define TARGET_ELF32 0
40
#endif
41
 
42
/* Generate code for SOM 32bit ABI.  */
43
#ifndef TARGET_SOM
44
#define TARGET_SOM 0
45
#endif
46
 
47
/* HP-UX UNIX features.  */
48
#ifndef TARGET_HPUX
49
#define TARGET_HPUX 0
50
#endif
51
 
52
/* HP-UX 10.10 UNIX 95 features.  */
53
#ifndef TARGET_HPUX_10_10
54
#define TARGET_HPUX_10_10 0
55
#endif
56
 
57
/* HP-UX 11.* features (11.00, 11.11, 11.23, etc.)  */
58
#ifndef TARGET_HPUX_11
59
#define TARGET_HPUX_11 0
60
#endif
61
 
62
/* HP-UX 11i multibyte and UNIX 98 extensions.  */
63
#ifndef TARGET_HPUX_11_11
64
#define TARGET_HPUX_11_11 0
65
#endif
66
 
67
/* HP-UX 11i multibyte and UNIX 2003 extensions.  */
68
#ifndef TARGET_HPUX_11_31
69
#define TARGET_HPUX_11_31 0
70
#endif
71
 
72
/* HP-UX long double library.  */
73
#ifndef HPUX_LONG_DOUBLE_LIBRARY
74
#define HPUX_LONG_DOUBLE_LIBRARY 0
75
#endif
76
 
77
/* Linux kernel atomic operation support.  */
78
#ifndef TARGET_SYNC_LIBCALL
79
#define TARGET_SYNC_LIBCALL 0
80
#endif
81
 
82
/* The following three defines are potential target switches.  The current
83
   defines are optimal given the current capabilities of GAS and GNU ld.  */
84
 
85
/* Define to a C expression evaluating to true to use long absolute calls.
86
   Currently, only the HP assembler and SOM linker support long absolute
87
   calls.  They are used only in non-pic code.  */
88
#define TARGET_LONG_ABS_CALL (TARGET_SOM && !TARGET_GAS)
89
 
90
/* Define to a C expression evaluating to true to use long PIC symbol
91
   difference calls.  Long PIC symbol difference calls are only used with
92
   the HP assembler and linker.  The HP assembler detects this instruction
93
   sequence and treats it as long pc-relative call.  Currently, GAS only
94
   allows a difference of two symbols in the same subspace, and it doesn't
95
   detect the sequence as a pc-relative call.  */
96
#define TARGET_LONG_PIC_SDIFF_CALL (!TARGET_GAS && TARGET_HPUX)
97
 
98
/* Define to a C expression evaluating to true to use long PIC
99
   pc-relative calls.  Long PIC pc-relative calls are only used with
100
   GAS.  Currently, they are usable for calls which bind local to a
101
   module but not for external calls.  */
102
#define TARGET_LONG_PIC_PCREL_CALL 0
103
 
104
/* Define to a C expression evaluating to true to use SOM secondary
105
   definition symbols for weak support.  Linker support for secondary
106
   definition symbols is buggy prior to HP-UX 11.X.  */
107
#define TARGET_SOM_SDEF 0
108
 
109
/* Define to a C expression evaluating to true to save the entry value
110
   of SP in the current frame marker.  This is normally unnecessary.
111
   However, the HP-UX unwind library looks at the SAVE_SP callinfo flag.
112
   HP compilers don't use this flag but it is supported by the assembler.
113
   We set this flag to indicate that register %r3 has been saved at the
114
   start of the frame.  Thus, when the HP unwind library is used, we
115
   need to generate additional code to save SP into the frame marker.  */
116
#define TARGET_HPUX_UNWIND_LIBRARY 0
117
 
118
#ifndef TARGET_DEFAULT
119
#define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY | MASK_BIG_SWITCH)
120
#endif
121
 
122
#ifndef TARGET_CPU_DEFAULT
123
#define TARGET_CPU_DEFAULT 0
124
#endif
125
 
126
#ifndef TARGET_SCHED_DEFAULT
127
#define TARGET_SCHED_DEFAULT PROCESSOR_8000
128
#endif
129
 
130
/* Support for a compile-time default CPU, et cetera.  The rules are:
131
   --with-schedule is ignored if -mschedule is specified.
132
   --with-arch is ignored if -march is specified.  */
133
#define OPTION_DEFAULT_SPECS \
134
  {"arch", "%{!march=*:-march=%(VALUE)}" }, \
135
  {"schedule", "%{!mschedule=*:-mschedule=%(VALUE)}" }
136
 
137
/* Specify the dialect of assembler to use.  New mnemonics is dialect one
138
   and the old mnemonics are dialect zero.  */
139
#define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0)
140
 
141
/* Override some settings from dbxelf.h.  */
142
 
143
/* We do not have to be compatible with dbx, so we enable gdb extensions
144
   by default.  */
145
#define DEFAULT_GDB_EXTENSIONS 1
146
 
147
/* This used to be zero (no max length), but big enums and such can
148
   cause huge strings which killed gas.
149
 
150
   We also have to avoid lossage in dbxout.c -- it does not compute the
151
   string size accurately, so we are real conservative here.  */
152
#undef DBX_CONTIN_LENGTH
153
#define DBX_CONTIN_LENGTH 3000
154
 
155
/* GDB always assumes the current function's frame begins at the value
156
   of the stack pointer upon entry to the current function.  Accessing
157
   local variables and parameters passed on the stack is done using the
158
   base of the frame + an offset provided by GCC.
159
 
160
   For functions which have frame pointers this method works fine;
161
   the (frame pointer) == (stack pointer at function entry) and GCC provides
162
   an offset relative to the frame pointer.
163
 
164
   This loses for functions without a frame pointer; GCC provides an offset
165
   which is relative to the stack pointer after adjusting for the function's
166
   frame size.  GDB would prefer the offset to be relative to the value of
167
   the stack pointer at the function's entry.  Yuk!  */
168
#define DEBUGGER_AUTO_OFFSET(X) \
169
  ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
170
    + (frame_pointer_needed ? 0 : pa_compute_frame_size (get_frame_size (), 0)))
171
 
172
#define DEBUGGER_ARG_OFFSET(OFFSET, X) \
173
  ((GET_CODE (X) == PLUS ? OFFSET : 0) \
174
    + (frame_pointer_needed ? 0 : pa_compute_frame_size (get_frame_size (), 0)))
175
 
176
#define TARGET_CPU_CPP_BUILTINS()                               \
177
do {                                                            \
178
     builtin_assert("cpu=hppa");                                \
179
     builtin_assert("machine=hppa");                            \
180
     builtin_define("__hppa");                                  \
181
     builtin_define("__hppa__");                                \
182
     if (TARGET_PA_20)                                          \
183
       builtin_define("_PA_RISC2_0");                           \
184
     else if (TARGET_PA_11)                                     \
185
       builtin_define("_PA_RISC1_1");                           \
186
     else                                                       \
187
       builtin_define("_PA_RISC1_0");                           \
188
} while (0)
189
 
190
/* An old set of OS defines for various BSD-like systems.  */
191
#define TARGET_OS_CPP_BUILTINS()                                \
192
  do                                                            \
193
    {                                                           \
194
        builtin_define_std ("REVARGV");                         \
195
        builtin_define_std ("hp800");                           \
196
        builtin_define_std ("hp9000");                          \
197
        builtin_define_std ("hp9k8");                           \
198
        if (!c_dialect_cxx () && !flag_iso)                     \
199
          builtin_define ("hppa");                              \
200
        builtin_define_std ("spectrum");                        \
201
        builtin_define_std ("unix");                            \
202
        builtin_assert ("system=bsd");                          \
203
        builtin_assert ("system=unix");                         \
204
    }                                                           \
205
  while (0)
206
 
207
#define CC1_SPEC "%{pg:} %{p:}"
208
 
209
#define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}"
210
 
211
/* We don't want -lg.  */
212
#ifndef LIB_SPEC
213
#define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
214
#endif
215
 
216
/* Make gcc agree with <machine/ansi.h> */
217
 
218
#define SIZE_TYPE "unsigned int"
219
#define PTRDIFF_TYPE "int"
220
#define WCHAR_TYPE "unsigned int"
221
#define WCHAR_TYPE_SIZE 32
222
 
223
/* target machine storage layout */
224
typedef struct GTY(()) machine_function
225
{
226
  /* Flag indicating that a .NSUBSPA directive has been output for
227
     this function.  */
228
  int in_nsubspa;
229
} machine_function;
230
 
231
/* Define this macro if it is advisable to hold scalars in registers
232
   in a wider mode than that declared by the program.  In such cases,
233
   the value is constrained to be within the bounds of the declared
234
   type, but kept valid in the wider mode.  The signedness of the
235
   extension may differ from that of the type.  */
236
 
237
#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE)  \
238
  if (GET_MODE_CLASS (MODE) == MODE_INT \
239
      && GET_MODE_SIZE (MODE) < UNITS_PER_WORD)         \
240
    (MODE) = word_mode;
241
 
242
/* Define this if most significant bit is lowest numbered
243
   in instructions that operate on numbered bit-fields.  */
244
#define BITS_BIG_ENDIAN 1
245
 
246
/* Define this if most significant byte of a word is the lowest numbered.  */
247
/* That is true on the HP-PA.  */
248
#define BYTES_BIG_ENDIAN 1
249
 
250
/* Define this if most significant word of a multiword number is lowest
251
   numbered.  */
252
#define WORDS_BIG_ENDIAN 1
253
 
254
#define MAX_BITS_PER_WORD 64
255
 
256
/* Width of a word, in units (bytes).  */
257
#define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
258
 
259
/* Minimum number of units in a word.  If this is undefined, the default
260
   is UNITS_PER_WORD.  Otherwise, it is the constant value that is the
261
   smallest value that UNITS_PER_WORD can have at run-time.
262
 
263
   FIXME: This needs to be 4 when TARGET_64BIT is true to suppress the
264
   building of various TImode routines in libgcc.  The HP runtime
265
   specification doesn't provide the alignment requirements and calling
266
   conventions for TImode variables.  */
267
#define MIN_UNITS_PER_WORD 4
268
 
269
/* The widest floating point format supported by the hardware.  Note that
270
   setting this influences some Ada floating point type sizes, currently
271
   required for GNAT to operate properly.  */
272
#define WIDEST_HARDWARE_FP_SIZE 64
273
 
274
/* Allocation boundary (in *bits*) for storing arguments in argument list.  */
275
#define PARM_BOUNDARY BITS_PER_WORD
276
 
277
/* Largest alignment required for any stack parameter, in bits.
278
   Don't define this if it is equal to PARM_BOUNDARY */
279
#define MAX_PARM_BOUNDARY BIGGEST_ALIGNMENT
280
 
281
/* Boundary (in *bits*) on which stack pointer is always aligned;
282
   certain optimizations in combine depend on this.
283
 
284
   The HP-UX runtime documents mandate 64-byte and 16-byte alignment for
285
   the stack on the 32 and 64-bit ports, respectively.  However, we
286
   are only guaranteed that the stack is aligned to BIGGEST_ALIGNMENT
287
   in main.  Thus, we treat the former as the preferred alignment.  */
288
#define STACK_BOUNDARY BIGGEST_ALIGNMENT
289
#define PREFERRED_STACK_BOUNDARY (TARGET_64BIT ? 128 : 512)
290
 
291
/* Allocation boundary (in *bits*) for the code of a function.  */
292
#define FUNCTION_BOUNDARY BITS_PER_WORD
293
 
294
/* Alignment of field after `int : 0' in a structure.  */
295
#define EMPTY_FIELD_BOUNDARY 32
296
 
297
/* Every structure's size must be a multiple of this.  */
298
#define STRUCTURE_SIZE_BOUNDARY 8
299
 
300
/* A bit-field declared as `int' forces `int' alignment for the struct.  */
301
#define PCC_BITFIELD_TYPE_MATTERS 1
302
 
303
/* No data type wants to be aligned rounder than this.  */
304
#define BIGGEST_ALIGNMENT (2 * BITS_PER_WORD)
305
 
306
/* Get around hp-ux assembler bug, and make strcpy of constants fast.  */
307
#define CONSTANT_ALIGNMENT(EXP, ALIGN)          \
308
  (TREE_CODE (EXP) == STRING_CST                \
309
   && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
310
 
311
/* Make arrays of chars word-aligned for the same reasons.  */
312
#define DATA_ALIGNMENT(TYPE, ALIGN)             \
313
  (TREE_CODE (TYPE) == ARRAY_TYPE               \
314
   && TYPE_MODE (TREE_TYPE (TYPE)) == QImode    \
315
   && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
316
 
317
/* Set this nonzero if move instructions will actually fail to work
318
   when given unaligned data.  */
319
#define STRICT_ALIGNMENT 1
320
 
321
/* Value is 1 if it is a good idea to tie two pseudo registers
322
   when one has mode MODE1 and one has mode MODE2.
323
   If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
324
   for any hard reg, then this must be 0 for correct output.  */
325
#define MODES_TIEABLE_P(MODE1, MODE2) \
326
  pa_modes_tieable_p (MODE1, MODE2)
327
 
328
/* Specify the registers used for certain standard purposes.
329
   The values of these macros are register numbers.  */
330
 
331
/* The HP-PA pc isn't overloaded on a register that the compiler knows about.  */
332
/* #define PC_REGNUM  */
333
 
334
/* Register to use for pushing function arguments.  */
335
#define STACK_POINTER_REGNUM 30
336
 
337
/* Fixed register for local variable access.  Always eliminated.  */
338
#define FRAME_POINTER_REGNUM (TARGET_64BIT ? 61 : 89)
339
 
340
/* Base register for access to local variables of the function.  */
341
#define HARD_FRAME_POINTER_REGNUM 3
342
 
343
/* Don't allow hard registers to be renamed into r2 unless r2
344
   is already live or already being saved (due to eh).  */
345
 
346
#define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
347
  ((NEW_REG) != 2 || df_regs_ever_live_p (2) || crtl->calls_eh_return)
348
 
349
/* Base register for access to arguments of the function.  */
350
#define ARG_POINTER_REGNUM (TARGET_64BIT ? 29 : 3)
351
 
352
/* Register in which static-chain is passed to a function.  */
353
#define STATIC_CHAIN_REGNUM (TARGET_64BIT ? 31 : 29)
354
 
355
/* Register used to address the offset table for position-independent
356
   data references.  */
357
#define PIC_OFFSET_TABLE_REGNUM \
358
  (flag_pic ? (TARGET_64BIT ? 27 : 19) : INVALID_REGNUM)
359
 
360
#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
361
 
362
/* Function to return the rtx used to save the pic offset table register
363
   across function calls.  */
364
extern rtx hppa_pic_save_rtx (void);
365
 
366
#define DEFAULT_PCC_STRUCT_RETURN 0
367
 
368
/* Register in which address to store a structure value
369
   is passed to a function.  */
370
#define PA_STRUCT_VALUE_REGNUM 28
371
 
372
/* Definitions for register eliminations.
373
 
374
   We have two registers that can be eliminated.  First, the frame pointer
375
   register can often be eliminated in favor of the stack pointer register.
376
   Secondly, the argument pointer register can always be eliminated in the
377
   32-bit runtimes.  */
378
 
379
/* This is an array of structures.  Each structure initializes one pair
380
   of eliminable registers.  The "from" register number is given first,
381
   followed by "to".  Eliminations of the same "from" register are listed
382
   in order of preference.
383
 
384
   The argument pointer cannot be eliminated in the 64-bit runtime.  It
385
   is the same register as the hard frame pointer in the 32-bit runtime.
386
   So, it does not need to be listed.  */
387
#define ELIMINABLE_REGS                                 \
388
{{ HARD_FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},    \
389
 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},         \
390
 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM} }
391
 
392
/* Define the offset between two registers, one to be eliminated,
393
   and the other its replacement, at the start of a routine.  */
394
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
395
  ((OFFSET) = pa_initial_elimination_offset(FROM, TO))
396
 
397
/* Describe how we implement __builtin_eh_return.  */
398
#define EH_RETURN_DATA_REGNO(N) \
399
  ((N) < 3 ? (N) + 20 : (N) == 3 ? 31 : INVALID_REGNUM)
400
#define EH_RETURN_STACKADJ_RTX  gen_rtx_REG (Pmode, 29)
401
#define EH_RETURN_HANDLER_RTX pa_eh_return_handler_rtx ()
402
 
403
/* Offset from the frame pointer register value to the top of stack.  */
404
#define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
405
 
406
/* The maximum number of hard registers that can be saved in the call
407
   frame.  The soft frame pointer is not included.  */
408
#define DWARF_FRAME_REGISTERS (FIRST_PSEUDO_REGISTER - 1)
409
 
410
/* A C expression whose value is RTL representing the location of the
411
   incoming return address at the beginning of any function, before the
412
   prologue.  You only need to define this macro if you want to support
413
   call frame debugging information like that provided by DWARF 2.  */
414
#define INCOMING_RETURN_ADDR_RTX (gen_rtx_REG (word_mode, 2))
415
#define DWARF_FRAME_RETURN_COLUMN (DWARF_FRAME_REGNUM (2))
416
 
417
/* A C expression whose value is an integer giving a DWARF 2 column
418
   number that may be used as an alternate return column.  This should
419
   be defined only if DWARF_FRAME_RETURN_COLUMN is set to a general
420
   register, but an alternate column needs to be used for signal frames.
421
 
422
   Column 0 is not used but unfortunately its register size is set to
423
   4 bytes (sizeof CCmode) so it can't be used on 64-bit targets.  */
424
#define DWARF_ALT_FRAME_RETURN_COLUMN (FIRST_PSEUDO_REGISTER - 1)
425
 
426
/* This macro chooses the encoding of pointers embedded in the exception
427
   handling sections.  If at all possible, this should be defined such
428
   that the exception handling section will not require dynamic relocations,
429
   and so may be read-only.
430
 
431
   Because the HP assembler auto aligns, it is necessary to use
432
   DW_EH_PE_aligned.  It's not possible to make the data read-only
433
   on the HP-UX SOM port since the linker requires fixups for label
434
   differences in different sections to be word aligned.  However,
435
   the SOM linker can do unaligned fixups for absolute pointers.
436
   We also need aligned pointers for global and function pointers.
437
 
438
   Although the HP-UX 64-bit ELF linker can handle unaligned pc-relative
439
   fixups, the runtime doesn't have a consistent relationship between
440
   text and data for dynamically loaded objects.  Thus, it's not possible
441
   to use pc-relative encoding for pointers on this target.  It may be
442
   possible to use segment relative encodings but GAS doesn't currently
443
   have a mechanism to generate these encodings.  For other targets, we
444
   use pc-relative encoding for pointers.  If the pointer might require
445
   dynamic relocation, we make it indirect.  */
446
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL)                       \
447
  (TARGET_GAS && !TARGET_HPUX                                           \
448
   ? (DW_EH_PE_pcrel                                                    \
449
      | ((GLOBAL) || (CODE) == 2 ? DW_EH_PE_indirect : 0)                \
450
      | (TARGET_64BIT ? DW_EH_PE_sdata8 : DW_EH_PE_sdata4))             \
451
   : (!TARGET_GAS || (GLOBAL) || (CODE) == 2                            \
452
      ? DW_EH_PE_aligned : DW_EH_PE_absptr))
453
 
454
/* Handle special EH pointer encodings.  Absolute, pc-relative, and
455
   indirect are handled automatically.  We output pc-relative, and
456
   indirect pc-relative ourself since we need some special magic to
457
   generate pc-relative relocations, and to handle indirect function
458
   pointers.  */
459
#define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \
460
  do {                                                                  \
461
    if (((ENCODING) & 0x70) == DW_EH_PE_pcrel)                          \
462
      {                                                                 \
463
        fputs (integer_asm_op (SIZE, FALSE), FILE);                     \
464
        if ((ENCODING) & DW_EH_PE_indirect)                             \
465
          output_addr_const (FILE, pa_get_deferred_plabel (ADDR));      \
466
        else                                                            \
467
          assemble_name (FILE, XSTR ((ADDR), 0));                        \
468
        fputs ("+8-$PIC_pcrel$0", FILE);                                \
469
        goto DONE;                                                      \
470
      }                                                                 \
471
    } while (0)
472
 
473
 
474
/* The class value for index registers, and the one for base regs.  */
475
#define INDEX_REG_CLASS GENERAL_REGS
476
#define BASE_REG_CLASS GENERAL_REGS
477
 
478
#define FP_REG_CLASS_P(CLASS) \
479
  ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS)
480
 
481
/* True if register is floating-point.  */
482
#define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST)
483
 
484
#define MAYBE_FP_REG_CLASS_P(CLASS) \
485
  reg_classes_intersect_p ((CLASS), FP_REGS)
486
 
487
 
488
/* Stack layout; function entry, exit and calling.  */
489
 
490
/* Define this if pushing a word on the stack
491
   makes the stack pointer a smaller address.  */
492
/* #define STACK_GROWS_DOWNWARD */
493
 
494
/* Believe it or not.  */
495
#define ARGS_GROW_DOWNWARD
496
 
497
/* Define this to nonzero if the nominal address of the stack frame
498
   is at the high-address end of the local variables;
499
   that is, each additional local variable allocated
500
   goes at a more negative offset in the frame.  */
501
#define FRAME_GROWS_DOWNWARD 0
502
 
503
/* Offset within stack frame to start allocating local variables at.
504
   If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
505
   first local allocated.  Otherwise, it is the offset to the BEGINNING
506
   of the first local allocated.
507
 
508
   On the 32-bit ports, we reserve one slot for the previous frame
509
   pointer and one fill slot.  The fill slot is for compatibility
510
   with HP compiled programs.  On the 64-bit ports, we reserve one
511
   slot for the previous frame pointer.  */
512
#define STARTING_FRAME_OFFSET 8
513
 
514
/* Define STACK_ALIGNMENT_NEEDED to zero to disable final alignment
515
   of the stack.  The default is to align it to STACK_BOUNDARY.  */
516
#define STACK_ALIGNMENT_NEEDED 0
517
 
518
/* If we generate an insn to push BYTES bytes,
519
   this says how many the stack pointer really advances by.
520
   On the HP-PA, don't define this because there are no push insns.  */
521
/*  #define PUSH_ROUNDING(BYTES) */
522
 
523
/* Offset of first parameter from the argument pointer register value.
524
   This value will be negated because the arguments grow down.
525
   Also note that on STACK_GROWS_UPWARD machines (such as this one)
526
   this is the distance from the frame pointer to the end of the first
527
   argument, not it's beginning.  To get the real offset of the first
528
   argument, the size of the argument must be added.  */
529
 
530
#define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32)
531
 
532
/* When a parameter is passed in a register, stack space is still
533
   allocated for it.  */
534
#define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16)
535
 
536
/* Define this if the above stack space is to be considered part of the
537
   space allocated by the caller.  */
538
#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
539
 
540
/* Keep the stack pointer constant throughout the function.
541
   This is both an optimization and a necessity: longjmp
542
   doesn't behave itself when the stack pointer moves within
543
   the function!  */
544
#define ACCUMULATE_OUTGOING_ARGS 1
545
 
546
/* The weird HPPA calling conventions require a minimum of 48 bytes on
547
   the stack: 16 bytes for register saves, and 32 bytes for magic.
548
   This is the difference between the logical top of stack and the
549
   actual sp.
550
 
551
   On the 64-bit port, the HP C compiler allocates a 48-byte frame
552
   marker, although the runtime documentation only describes a 16
553
   byte marker.  For compatibility, we allocate 48 bytes.  */
554
#define STACK_POINTER_OFFSET \
555
  (TARGET_64BIT ? -(crtl->outgoing_args_size + 48): -32)
556
 
557
#define STACK_DYNAMIC_OFFSET(FNDECL)    \
558
  (TARGET_64BIT                         \
559
   ? (STACK_POINTER_OFFSET)             \
560
   : ((STACK_POINTER_OFFSET) - crtl->outgoing_args_size))
561
 
562
 
563
/* Define a data type for recording info about an argument list
564
   during the scan of that argument list.  This data type should
565
   hold all necessary information about the function itself
566
   and about the args processed so far, enough to enable macros
567
   such as FUNCTION_ARG to determine where the next arg should go.
568
 
569
   On the HP-PA, the WORDS field holds the number of words
570
   of arguments scanned so far (including the invisible argument,
571
   if any, which holds the structure-value-address).  Thus, 4 or
572
   more means all following args should go on the stack.
573
 
574
   The INCOMING field tracks whether this is an "incoming" or
575
   "outgoing" argument.
576
 
577
   The INDIRECT field indicates whether this is is an indirect
578
   call or not.
579
 
580
   The NARGS_PROTOTYPE field indicates that an argument does not
581
   have a prototype when it less than or equal to 0.  */
582
 
583
struct hppa_args {int words, nargs_prototype, incoming, indirect; };
584
 
585
#define CUMULATIVE_ARGS struct hppa_args
586
 
587
/* Initialize a variable CUM of type CUMULATIVE_ARGS
588
   for a call to a function whose data type is FNTYPE.
589
   For a library call, FNTYPE is 0.  */
590
 
591
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
592
  (CUM).words = 0,                                                       \
593
  (CUM).incoming = 0,                                                    \
594
  (CUM).indirect = (FNTYPE) && !(FNDECL),                               \
595
  (CUM).nargs_prototype = (FNTYPE && prototype_p (FNTYPE)               \
596
                           ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
597
                              + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
598
                                 || pa_return_in_memory (TREE_TYPE (FNTYPE), 0))) \
599
                           : 0)
600
 
601
 
602
 
603
/* Similar, but when scanning the definition of a procedure.  We always
604
   set NARGS_PROTOTYPE large so we never return a PARALLEL.  */
605
 
606
#define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
607
  (CUM).words = 0,                               \
608
  (CUM).incoming = 1,                           \
609
  (CUM).indirect = 0,                            \
610
  (CUM).nargs_prototype = 1000
611
 
612
/* Figure out the size in words of the function argument.  The size
613
   returned by this macro should always be greater than zero because
614
   we pass variable and zero sized objects by reference.  */
615
 
616
#define FUNCTION_ARG_SIZE(MODE, TYPE)   \
617
  ((((MODE) != BLKmode \
618
     ? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
619
     : int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
620
 
621
/* Determine where to put an argument to a function.
622
   Value is zero to push the argument on the stack,
623
   or a hard register in which to store the argument.
624
 
625
   MODE is the argument's machine mode.
626
   TYPE is the data type of the argument (as a tree).
627
    This is null for libcalls where that information may
628
    not be available.
629
   CUM is a variable of type CUMULATIVE_ARGS which gives info about
630
    the preceding args and about the function being called.
631
   NAMED is nonzero if this argument is a named parameter
632
    (otherwise it is an extra parameter matching an ellipsis).
633
 
634
   On the HP-PA the first four words of args are normally in registers
635
   and the rest are pushed.  But any arg that won't entirely fit in regs
636
   is pushed.
637
 
638
   Arguments passed in registers are either 1 or 2 words long.
639
 
640
   The caller must make a distinction between calls to explicitly named
641
   functions and calls through pointers to functions -- the conventions
642
   are different!  Calls through pointers to functions only use general
643
   registers for the first four argument words.
644
 
645
   Of course all this is different for the portable runtime model
646
   HP wants everyone to use for ELF.  Ugh.  Here's a quick description
647
   of how it's supposed to work.
648
 
649
   1) callee side remains unchanged.  It expects integer args to be
650
   in the integer registers, float args in the float registers and
651
   unnamed args in integer registers.
652
 
653
   2) caller side now depends on if the function being called has
654
   a prototype in scope (rather than if it's being called indirectly).
655
 
656
      2a) If there is a prototype in scope, then arguments are passed
657
      according to their type (ints in integer registers, floats in float
658
      registers, unnamed args in integer registers.
659
 
660
      2b) If there is no prototype in scope, then floating point arguments
661
      are passed in both integer and float registers.  egad.
662
 
663
  FYI: The portable parameter passing conventions are almost exactly like
664
  the standard parameter passing conventions on the RS6000.  That's why
665
  you'll see lots of similar code in rs6000.h.  */
666
 
667
/* If defined, a C expression which determines whether, and in which
668
   direction, to pad out an argument with extra space.  */
669
#define FUNCTION_ARG_PADDING(MODE, TYPE) \
670
  pa_function_arg_padding ((MODE), (TYPE))
671
 
672
/* Specify padding for the last element of a block move between registers
673
   and memory.
674
 
675
   The 64-bit runtime specifies that objects need to be left justified
676
   (i.e., the normal justification for a big endian target).  The 32-bit
677
   runtime specifies right justification for objects smaller than 64 bits.
678
   We use a DImode register in the parallel for 5 to 7 byte structures
679
   so that there is only one element.  This allows the object to be
680
   correctly padded.  */
681
#define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \
682
  pa_function_arg_padding ((MODE), (TYPE))
683
 
684
 
685
/* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than
686
   as assembly via FUNCTION_PROFILER.  Just output a local label.
687
   We can't use the function label because the GAS SOM target can't
688
   handle the difference of a global symbol and a local symbol.  */
689
 
690
#ifndef FUNC_BEGIN_PROLOG_LABEL
691
#define FUNC_BEGIN_PROLOG_LABEL        "LFBP"
692
#endif
693
 
694
#define FUNCTION_PROFILER(FILE, LABEL) \
695
  (*targetm.asm_out.internal_label) (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL)
696
 
697
#define PROFILE_HOOK(label_no) hppa_profile_hook (label_no)
698
void hppa_profile_hook (int label_no);
699
 
700
/* The profile counter if emitted must come before the prologue.  */
701
#define PROFILE_BEFORE_PROLOGUE 1
702
 
703
/* We never want final.c to emit profile counters.  When profile
704
   counters are required, we have to defer emitting them to the end
705
   of the current file.  */
706
#define NO_PROFILE_COUNTERS 1
707
 
708
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
709
   the stack pointer does not matter.  The value is tested only in
710
   functions that have frame pointers.
711
   No definition is equivalent to always zero.  */
712
 
713
extern int may_call_alloca;
714
 
715
#define EXIT_IGNORE_STACK       \
716
 (get_frame_size () != 0 \
717
  || cfun->calls_alloca || crtl->outgoing_args_size)
718
 
719
/* Length in units of the trampoline for entering a nested function.  */
720
 
721
#define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52)
722
 
723
/* Alignment required by the trampoline.  */
724
 
725
#define TRAMPOLINE_ALIGNMENT BITS_PER_WORD
726
 
727
/* Minimum length of a cache line.  A length of 16 will work on all
728
   PA-RISC processors.  All PA 1.1 processors have a cache line of
729
   32 bytes.  Most but not all PA 2.0 processors have a cache line
730
   of 64 bytes.  As cache flushes are expensive and we don't support
731
   PA 1.0, we use a minimum length of 32.  */
732
 
733
#define MIN_CACHELINE_SIZE 32
734
 
735
 
736
/* Addressing modes, and classification of registers for them.
737
 
738
   Using autoincrement addressing modes on PA8000 class machines is
739
   not profitable.  */
740
 
741
#define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000)
742
#define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000)
743
 
744
#define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000)
745
#define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000)
746
 
747
/* Macros to check register numbers against specific register classes.  */
748
 
749
/* The following macros assume that X is a hard or pseudo reg number.
750
   They give nonzero only if X is a hard reg of the suitable class
751
   or a pseudo reg currently allocated to a suitable hard reg.
752
   Since they use reg_renumber, they are safe only once reg_renumber
753
   has been allocated, which happens in local-alloc.c.  */
754
 
755
#define REGNO_OK_FOR_INDEX_P(X) \
756
  ((X) && ((X) < 32                                                     \
757
   || ((X) == FRAME_POINTER_REGNUM)                                     \
758
   || ((X) >= FIRST_PSEUDO_REGISTER                                     \
759
       && reg_renumber                                                  \
760
       && (unsigned) reg_renumber[X] < 32)))
761
#define REGNO_OK_FOR_BASE_P(X) \
762
  ((X) && ((X) < 32                                                     \
763
   || ((X) == FRAME_POINTER_REGNUM)                                     \
764
   || ((X) >= FIRST_PSEUDO_REGISTER                                     \
765
       && reg_renumber                                                  \
766
       && (unsigned) reg_renumber[X] < 32)))
767
#define REGNO_OK_FOR_FP_P(X) \
768
  (FP_REGNO_P (X)                                                       \
769
   || (X >= FIRST_PSEUDO_REGISTER                                       \
770
       && reg_renumber                                                  \
771
       && FP_REGNO_P (reg_renumber[X])))
772
 
773
/* Now macros that check whether X is a register and also,
774
   strictly, whether it is in a specified class.
775
 
776
   These macros are specific to the HP-PA, and may be used only
777
   in code for printing assembler insns and in conditions for
778
   define_optimization.  */
779
 
780
/* 1 if X is an fp register.  */
781
 
782
#define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
783
 
784
/* Maximum number of registers that can appear in a valid memory address.  */
785
 
786
#define MAX_REGS_PER_ADDRESS 2
787
 
788
/* Non-TLS symbolic references.  */
789
#define PA_SYMBOL_REF_TLS_P(RTX) \
790
  (GET_CODE (RTX) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (RTX) != 0)
791
 
792
/* Recognize any constant value that is a valid address except
793
   for symbolic addresses.  We get better CSE by rejecting them
794
   here and allowing hppa_legitimize_address to break them up.  We
795
   use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE.  */
796
 
797
#define CONSTANT_ADDRESS_P(X) \
798
  ((GET_CODE (X) == LABEL_REF                                           \
799
   || (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (X))         \
800
   || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST                \
801
   || GET_CODE (X) == HIGH)                                             \
802
   && (reload_in_progress || reload_completed                           \
803
       || ! pa_symbolic_expression_p (X)))
804
 
805
/* A C expression that is nonzero if we are using the new HP assembler.  */
806
 
807
#ifndef NEW_HP_ASSEMBLER
808
#define NEW_HP_ASSEMBLER 0
809
#endif
810
 
811
/* The macros below define the immediate range for CONST_INTS on
812
   the 64-bit port.  Constants in this range can be loaded in three
813
   instructions using a ldil/ldo/depdi sequence.  Constants outside
814
   this range are forced to the constant pool prior to reload.  */
815
 
816
#define MAX_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) 32 << 31)
817
#define MIN_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) -32 << 31)
818
#define LEGITIMATE_64BIT_CONST_INT_P(X) \
819
  ((X) >= MIN_LEGIT_64BIT_CONST_INT && (X) < MAX_LEGIT_64BIT_CONST_INT)
820
 
821
/* Target flags set on a symbol_ref.  */
822
 
823
/* Set by ASM_OUTPUT_SYMBOL_REF when a symbol_ref is output.  */
824
#define SYMBOL_FLAG_REFERENCED (1 << SYMBOL_FLAG_MACH_DEP_SHIFT)
825
#define SYMBOL_REF_REFERENCED_P(RTX) \
826
  ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_REFERENCED) != 0)
827
 
828
/* Defines for constraints.md.  */
829
 
830
/* Return 1 iff OP is a scaled or unscaled index address.  */
831
#define IS_INDEX_ADDR_P(OP) \
832
  (GET_CODE (OP) == PLUS                                \
833
   && GET_MODE (OP) == Pmode                            \
834
   && (GET_CODE (XEXP (OP, 0)) == MULT                   \
835
       || GET_CODE (XEXP (OP, 1)) == MULT               \
836
       || (REG_P (XEXP (OP, 0))                          \
837
           && REG_P (XEXP (OP, 1)))))
838
 
839
/* Return 1 iff OP is a LO_SUM DLT address.  */
840
#define IS_LO_SUM_DLT_ADDR_P(OP) \
841
  (GET_CODE (OP) == LO_SUM                              \
842
   && GET_MODE (OP) == Pmode                            \
843
   && REG_P (XEXP (OP, 0))                               \
844
   && REG_OK_FOR_BASE_P (XEXP (OP, 0))                   \
845
   && GET_CODE (XEXP (OP, 1)) == UNSPEC)
846
 
847
/* Nonzero if 14-bit offsets can be used for all loads and stores.
848
   This is not possible when generating PA 1.x code as floating point
849
   loads and stores only support 5-bit offsets.  Note that we do not
850
   forbid the use of 14-bit offsets in GO_IF_LEGITIMATE_ADDRESS.
851
   Instead, we use pa_secondary_reload() to reload integer mode
852
   REG+D memory addresses used in floating point loads and stores.
853
 
854
   FIXME: the ELF32 linker clobbers the LSB of the FP register number
855
   in PA 2.0 floating-point insns with long displacements.  This is
856
   because R_PARISC_DPREL14WR and other relocations like it are not
857
   yet supported by GNU ld.  For now, we reject long displacements
858
   on this target.  */
859
 
860
#define INT14_OK_STRICT \
861
  (TARGET_SOFT_FLOAT                                                   \
862
   || TARGET_DISABLE_FPREGS                                            \
863
   || (TARGET_PA_20 && !TARGET_ELF32))
864
 
865
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
866
   and check its validity for a certain class.
867
   We have two alternate definitions for each of them.
868
   The usual definition accepts all pseudo regs; the other rejects
869
   them unless they have been allocated suitable hard regs.
870
   The symbol REG_OK_STRICT causes the latter definition to be used.
871
 
872
   Most source files want to accept pseudo regs in the hope that
873
   they will get allocated to the class that the insn wants them to be in.
874
   Source files for reload pass need to be strict.
875
   After reload, it makes no difference, since pseudo regs have
876
   been eliminated by then.  */
877
 
878
#ifndef REG_OK_STRICT
879
 
880
/* Nonzero if X is a hard reg that can be used as an index
881
   or if it is a pseudo reg.  */
882
#define REG_OK_FOR_INDEX_P(X) \
883
  (REGNO (X) && (REGNO (X) < 32                                 \
884
   || REGNO (X) == FRAME_POINTER_REGNUM                         \
885
   || REGNO (X) >= FIRST_PSEUDO_REGISTER))
886
 
887
/* Nonzero if X is a hard reg that can be used as a base reg
888
   or if it is a pseudo reg.  */
889
#define REG_OK_FOR_BASE_P(X) \
890
  (REGNO (X) && (REGNO (X) < 32                                 \
891
   || REGNO (X) == FRAME_POINTER_REGNUM                         \
892
   || REGNO (X) >= FIRST_PSEUDO_REGISTER))
893
 
894
#else
895
 
896
/* Nonzero if X is a hard reg that can be used as an index.  */
897
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
898
 
899
/* Nonzero if X is a hard reg that can be used as a base reg.  */
900
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
901
 
902
#endif
903
 
904
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
905
   valid memory address for an instruction.  The MODE argument is the
906
   machine mode for the MEM expression that wants to use this address.
907
 
908
   On HP PA-RISC, the legitimate address forms are REG+SMALLINT,
909
   REG+REG, and REG+(REG*SCALE).  The indexed address forms are only
910
   available with floating point loads and stores, and integer loads.
911
   We get better code by allowing indexed addresses in the initial
912
   RTL generation.
913
 
914
   The acceptance of indexed addresses as legitimate implies that we
915
   must provide patterns for doing indexed integer stores, or the move
916
   expanders must force the address of an indexed store to a register.
917
   We have adopted the latter approach.
918
 
919
   Another function of GO_IF_LEGITIMATE_ADDRESS is to ensure that
920
   the base register is a valid pointer for indexed instructions.
921
   On targets that have non-equivalent space registers, we have to
922
   know at the time of assembler output which register in a REG+REG
923
   pair is the base register.  The REG_POINTER flag is sometimes lost
924
   in reload and the following passes, so it can't be relied on during
925
   code generation.  Thus, we either have to canonicalize the order
926
   of the registers in REG+REG indexed addresses, or treat REG+REG
927
   addresses separately and provide patterns for both permutations.
928
 
929
   The latter approach requires several hundred additional lines of
930
   code in pa.md.  The downside to canonicalizing is that a PLUS
931
   in the wrong order can't combine to form to make a scaled indexed
932
   memory operand.  As we won't need to canonicalize the operands if
933
   the REG_POINTER lossage can be fixed, it seems better canonicalize.
934
 
935
   We initially break out scaled indexed addresses in canonical order
936
   in pa_emit_move_sequence.  LEGITIMIZE_ADDRESS also canonicalizes
937
   scaled indexed addresses during RTL generation.  However, fold_rtx
938
   has its own opinion on how the operands of a PLUS should be ordered.
939
   If one of the operands is equivalent to a constant, it will make
940
   that operand the second operand.  As the base register is likely to
941
   be equivalent to a SYMBOL_REF, we have made it the second operand.
942
 
943
   GO_IF_LEGITIMATE_ADDRESS accepts REG+REG as legitimate when the
944
   operands are in the order INDEX+BASE on targets with non-equivalent
945
   space registers, and in any order on targets with equivalent space
946
   registers.  It accepts both MULT+BASE and BASE+MULT for scaled indexing.
947
 
948
   We treat a SYMBOL_REF as legitimate if it is part of the current
949
   function's constant-pool, because such addresses can actually be
950
   output as REG+SMALLINT.  */
951
 
952
#define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20)
953
#define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
954
 
955
#define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20)
956
#define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
957
 
958
#define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800)
959
#define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
960
 
961
#define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000)
962
#define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
963
 
964
#if HOST_BITS_PER_WIDE_INT > 32
965
#define VAL_32_BITS_P(X) \
966
  ((unsigned HOST_WIDE_INT)(X) + ((unsigned HOST_WIDE_INT) 1 << 31)    \
967
   < (unsigned HOST_WIDE_INT) 2 << 31)
968
#else
969
#define VAL_32_BITS_P(X) 1
970
#endif
971
#define INT_32_BITS(X) VAL_32_BITS_P (INTVAL (X))
972
 
973
/* These are the modes that we allow for scaled indexing.  */
974
#define MODE_OK_FOR_SCALED_INDEXING_P(MODE) \
975
  ((TARGET_64BIT && (MODE) == DImode)                                   \
976
   || (MODE) == SImode                                                  \
977
   || (MODE) == HImode                                                  \
978
   || (MODE) == SFmode                                                  \
979
   || (MODE) == DFmode)
980
 
981
/* These are the modes that we allow for unscaled indexing.  */
982
#define MODE_OK_FOR_UNSCALED_INDEXING_P(MODE) \
983
  ((TARGET_64BIT && (MODE) == DImode)                                   \
984
   || (MODE) == SImode                                                  \
985
   || (MODE) == HImode                                                  \
986
   || (MODE) == QImode                                                  \
987
   || (MODE) == SFmode                                                  \
988
   || (MODE) == DFmode)
989
 
990
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
991
{                                                                       \
992
  if ((REG_P (X) && REG_OK_FOR_BASE_P (X))                              \
993
      || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC          \
994
           || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC)      \
995
          && REG_P (XEXP (X, 0))                                 \
996
          && REG_OK_FOR_BASE_P (XEXP (X, 0))))                           \
997
    goto ADDR;                                                          \
998
  else if (GET_CODE (X) == PLUS)                                        \
999
    {                                                                   \
1000
      rtx base = 0, index = 0;                                            \
1001
      if (REG_P (XEXP (X, 1))                                           \
1002
          && REG_OK_FOR_BASE_P (XEXP (X, 1)))                           \
1003
        base = XEXP (X, 1), index = XEXP (X, 0);                 \
1004
      else if (REG_P (XEXP (X, 0))                                       \
1005
               && REG_OK_FOR_BASE_P (XEXP (X, 0)))                       \
1006
        base = XEXP (X, 0), index = XEXP (X, 1);                 \
1007
      if (base                                                          \
1008
          && GET_CODE (index) == CONST_INT                              \
1009
          && ((INT_14_BITS (index)                                      \
1010
               && (((MODE) != DImode                                    \
1011
                    && (MODE) != SFmode                                 \
1012
                    && (MODE) != DFmode)                                \
1013
                   /* The base register for DImode loads and stores     \
1014
                      with long displacements must be aligned because   \
1015
                      the lower three bits in the displacement are      \
1016
                      assumed to be zero.  */                           \
1017
                   || ((MODE) == DImode                                 \
1018
                       && (!TARGET_64BIT                                \
1019
                           || (INTVAL (index) % 8) == 0))                \
1020
                   /* Similarly, the base register for SFmode/DFmode    \
1021
                      loads and stores with long displacements must     \
1022
                      be aligned.  */                                   \
1023
                   || (((MODE) == SFmode || (MODE) == DFmode)           \
1024
                       && INT14_OK_STRICT                               \
1025
                       && (INTVAL (index) % GET_MODE_SIZE (MODE)) == 0))) \
1026
               || INT_5_BITS (index)))                                  \
1027
        goto ADDR;                                                      \
1028
      if (!TARGET_DISABLE_INDEXING                                      \
1029
          /* Only accept the "canonical" INDEX+BASE operand order       \
1030
             on targets with non-equivalent space registers.  */        \
1031
          && (TARGET_NO_SPACE_REGS                                      \
1032
              ? (base && REG_P (index))                                 \
1033
              : (base == XEXP (X, 1) && REG_P (index)                   \
1034
                 && (reload_completed                                   \
1035
                     || (reload_in_progress && HARD_REGISTER_P (base))  \
1036
                     || REG_POINTER (base))                             \
1037
                 && (reload_completed                                   \
1038
                     || (reload_in_progress && HARD_REGISTER_P (index)) \
1039
                     || !REG_POINTER (index))))                         \
1040
          && MODE_OK_FOR_UNSCALED_INDEXING_P (MODE)                     \
1041
          && REG_OK_FOR_INDEX_P (index)                                 \
1042
          && borx_reg_operand (base, Pmode)                             \
1043
          && borx_reg_operand (index, Pmode))                           \
1044
        goto ADDR;                                                      \
1045
      if (!TARGET_DISABLE_INDEXING                                      \
1046
          && base                                                       \
1047
          && GET_CODE (index) == MULT                                   \
1048
          && MODE_OK_FOR_SCALED_INDEXING_P (MODE)                       \
1049
          && REG_P (XEXP (index, 0))                                     \
1050
          && GET_MODE (XEXP (index, 0)) == Pmode                 \
1051
          && REG_OK_FOR_INDEX_P (XEXP (index, 0))                        \
1052
          && GET_CODE (XEXP (index, 1)) == CONST_INT                    \
1053
          && INTVAL (XEXP (index, 1))                                   \
1054
             == (HOST_WIDE_INT) GET_MODE_SIZE (MODE)                    \
1055
          && borx_reg_operand (base, Pmode))                            \
1056
        goto ADDR;                                                      \
1057
    }                                                                   \
1058
  else if (GET_CODE (X) == LO_SUM                                       \
1059
           && GET_CODE (XEXP (X, 0)) == REG                              \
1060
           && REG_OK_FOR_BASE_P (XEXP (X, 0))                            \
1061
           && CONSTANT_P (XEXP (X, 1))                                  \
1062
           && (TARGET_SOFT_FLOAT                                        \
1063
               /* We can allow symbolic LO_SUM addresses for PA2.0.  */ \
1064
               || (TARGET_PA_20                                         \
1065
                   && !TARGET_ELF32                                     \
1066
                   && GET_CODE (XEXP (X, 1)) != CONST_INT)              \
1067
               || ((MODE) != SFmode                                     \
1068
                   && (MODE) != DFmode)))                               \
1069
    goto ADDR;                                                          \
1070
  else if (GET_CODE (X) == LO_SUM                                       \
1071
           && GET_CODE (XEXP (X, 0)) == SUBREG                           \
1072
           && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG         \
1073
           && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))               \
1074
           && CONSTANT_P (XEXP (X, 1))                                  \
1075
           && (TARGET_SOFT_FLOAT                                        \
1076
               /* We can allow symbolic LO_SUM addresses for PA2.0.  */ \
1077
               || (TARGET_PA_20                                         \
1078
                   && !TARGET_ELF32                                     \
1079
                   && GET_CODE (XEXP (X, 1)) != CONST_INT)              \
1080
               || ((MODE) != SFmode                                     \
1081
                   && (MODE) != DFmode)))                               \
1082
    goto ADDR;                                                          \
1083
  else if (GET_CODE (X) == CONST_INT && INT_5_BITS (X))                 \
1084
    goto ADDR;                                                          \
1085
  /* Needed for -fPIC */                                                \
1086
  else if (GET_CODE (X) == LO_SUM                                       \
1087
           && GET_CODE (XEXP (X, 0)) == REG                      \
1088
           && REG_OK_FOR_BASE_P (XEXP (X, 0))                            \
1089
           && GET_CODE (XEXP (X, 1)) == UNSPEC                          \
1090
           && (TARGET_SOFT_FLOAT                                        \
1091
               || (TARGET_PA_20 && !TARGET_ELF32)                       \
1092
               || ((MODE) != SFmode                                     \
1093
                   && (MODE) != DFmode)))                               \
1094
    goto ADDR;                                                          \
1095
}
1096
 
1097
/* Look for machine dependent ways to make the invalid address AD a
1098
   valid address.
1099
 
1100
   For the PA, transform:
1101
 
1102
        memory(X + <large int>)
1103
 
1104
   into:
1105
 
1106
        if (<large int> & mask) >= 16
1107
          Y = (<large int> & ~mask) + mask + 1  Round up.
1108
        else
1109
          Y = (<large int> & ~mask)             Round down.
1110
        Z = X + Y
1111
        memory (Z + (<large int> - Y));
1112
 
1113
   This makes reload inheritance and reload_cse work better since Z
1114
   can be reused.
1115
 
1116
   There may be more opportunities to improve code with this hook.  */
1117
#define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN)      \
1118
do {                                                                    \
1119
  long offset, newoffset, mask;                                         \
1120
  rtx new_rtx, temp = NULL_RTX;                                         \
1121
                                                                        \
1122
  mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT                           \
1123
          ? (INT14_OK_STRICT ? 0x3fff : 0x1f) : 0x3fff);                \
1124
                                                                        \
1125
  if (optimize && GET_CODE (AD) == PLUS)                                \
1126
    temp = simplify_binary_operation (PLUS, Pmode,                      \
1127
                                      XEXP (AD, 0), XEXP (AD, 1));       \
1128
                                                                        \
1129
  new_rtx = temp ? temp : AD;                                           \
1130
                                                                        \
1131
  if (optimize                                                          \
1132
      && GET_CODE (new_rtx) == PLUS                                             \
1133
      && GET_CODE (XEXP (new_rtx, 0)) == REG                             \
1134
      && GET_CODE (XEXP (new_rtx, 1)) == CONST_INT)                             \
1135
    {                                                                   \
1136
      offset = INTVAL (XEXP ((new_rtx), 1));                            \
1137
                                                                        \
1138
      /* Choose rounding direction.  Round up if we are >= halfway.  */ \
1139
      if ((offset & mask) >= ((mask + 1) / 2))                          \
1140
        newoffset = (offset & ~mask) + mask + 1;                        \
1141
      else                                                              \
1142
        newoffset = offset & ~mask;                                     \
1143
                                                                        \
1144
      /* Ensure that long displacements are aligned.  */                \
1145
      if (mask == 0x3fff                                                \
1146
          && (GET_MODE_CLASS (MODE) == MODE_FLOAT                       \
1147
              || (TARGET_64BIT && (MODE) == DImode)))                   \
1148
        newoffset &= ~(GET_MODE_SIZE (MODE) - 1);                       \
1149
                                                                        \
1150
      if (newoffset != 0 && VAL_14_BITS_P (newoffset))                   \
1151
        {                                                               \
1152
          temp = gen_rtx_PLUS (Pmode, XEXP (new_rtx, 0),                 \
1153
                               GEN_INT (newoffset));                    \
1154
          AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\
1155
          push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0,           \
1156
                       BASE_REG_CLASS, Pmode, VOIDmode, 0, 0,             \
1157
                       (OPNUM), (TYPE));                                \
1158
          goto WIN;                                                     \
1159
        }                                                               \
1160
    }                                                                   \
1161
} while (0)
1162
 
1163
 
1164
 
1165
#define TARGET_ASM_SELECT_SECTION  pa_select_section
1166
 
1167
/* Return a nonzero value if DECL has a section attribute.  */
1168
#define IN_NAMED_SECTION_P(DECL) \
1169
  ((TREE_CODE (DECL) == FUNCTION_DECL || TREE_CODE (DECL) == VAR_DECL) \
1170
   && DECL_SECTION_NAME (DECL) != NULL_TREE)
1171
 
1172
/* Define this macro if references to a symbol must be treated
1173
   differently depending on something about the variable or
1174
   function named by the symbol (such as what section it is in).
1175
 
1176
   The macro definition, if any, is executed immediately after the
1177
   rtl for DECL or other node is created.
1178
   The value of the rtl will be a `mem' whose address is a
1179
   `symbol_ref'.
1180
 
1181
   The usual thing for this macro to do is to a flag in the
1182
   `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1183
   name string in the `symbol_ref' (if one bit is not enough
1184
   information).
1185
 
1186
   On the HP-PA we use this to indicate if a symbol is in text or
1187
   data space.  Also, function labels need special treatment.  */
1188
 
1189
#define TEXT_SPACE_P(DECL)\
1190
  (TREE_CODE (DECL) == FUNCTION_DECL                                    \
1191
   || (TREE_CODE (DECL) == VAR_DECL                                     \
1192
       && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL)            \
1193
       && (! DECL_INITIAL (DECL) || ! pa_reloc_needed (DECL_INITIAL (DECL))) \
1194
       && !flag_pic)                                                    \
1195
   || CONSTANT_CLASS_P (DECL))
1196
 
1197
#define FUNCTION_NAME_P(NAME)  (*(NAME) == '@')
1198
 
1199
/* Specify the machine mode that this machine uses for the index in the
1200
   tablejump instruction.  For small tables, an element consists of a
1201
   ia-relative branch and its delay slot.  When -mbig-switch is specified,
1202
   we use a 32-bit absolute address for non-pic code, and a 32-bit offset
1203
   for both 32 and 64-bit pic code.  */
1204
#define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : DImode)
1205
 
1206
/* Jump tables must be 32-bit aligned, no matter the size of the element.  */
1207
#define ADDR_VEC_ALIGN(ADDR_VEC) 2
1208
 
1209
/* Define this as 1 if `char' should by default be signed; else as 0.  */
1210
#define DEFAULT_SIGNED_CHAR 1
1211
 
1212
/* Max number of bytes we can move from memory to memory
1213
   in one reasonably fast instruction.  */
1214
#define MOVE_MAX 8
1215
 
1216
/* Higher than the default as we prefer to use simple move insns
1217
   (better scheduling and delay slot filling) and because our
1218
   built-in block move is really a 2X unrolled loop.
1219
 
1220
   Believe it or not, this has to be big enough to allow for copying all
1221
   arguments passed in registers to avoid infinite recursion during argument
1222
   setup for a function call.  Why?  Consider how we copy the stack slots
1223
   reserved for parameters when they may be trashed by a call.  */
1224
#define MOVE_RATIO(speed) (TARGET_64BIT ? 8 : 4)
1225
 
1226
/* Define if operations between registers always perform the operation
1227
   on the full register even if a narrower mode is specified.  */
1228
#define WORD_REGISTER_OPERATIONS
1229
 
1230
/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1231
   will either zero-extend or sign-extend.  The value of this macro should
1232
   be the code that says which one of the two operations is implicitly
1233
   done, UNKNOWN if none.  */
1234
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1235
 
1236
/* Nonzero if access to memory by bytes is slow and undesirable.  */
1237
#define SLOW_BYTE_ACCESS 1
1238
 
1239
/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1240
   is done just by pretending it is already truncated.  */
1241
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1242
 
1243
/* Specify the machine mode that pointers have.
1244
   After generation of rtl, the compiler makes no further distinction
1245
   between pointers and any other objects of this machine mode.  */
1246
#define Pmode word_mode
1247
 
1248
/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1249
   return the mode to be used for the comparison.  For floating-point, CCFPmode
1250
   should be used.  CC_NOOVmode should be used when the first operand is a
1251
   PLUS, MINUS, or NEG.  CCmode should be used when no special processing is
1252
   needed.  */
1253
#define SELECT_CC_MODE(OP,X,Y) \
1254
  (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode)    \
1255
 
1256
/* A function address in a call instruction
1257
   is a byte address (for indexing purposes)
1258
   so give the MEM rtx a byte's mode.  */
1259
#define FUNCTION_MODE SImode
1260
 
1261
/* Define this if addresses of constant functions
1262
   shouldn't be put through pseudo regs where they can be cse'd.
1263
   Desirable on machines where ordinary constants are expensive
1264
   but a CALL with constant address is cheap.  */
1265
#define NO_FUNCTION_CSE
1266
 
1267
/* Define this to be nonzero if shift instructions ignore all but the low-order
1268
   few bits.  */
1269
#define SHIFT_COUNT_TRUNCATED 1
1270
 
1271
/* Adjust the cost of branches.  */
1272
#define BRANCH_COST(speed_p, predictable_p) (pa_cpu == PROCESSOR_8000 ? 2 : 1)
1273
 
1274
/* Handling the special cases is going to get too complicated for a macro,
1275
   just call `pa_adjust_insn_length' to do the real work.  */
1276
#define ADJUST_INSN_LENGTH(INSN, LENGTH)        \
1277
  LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1278
 
1279
/* Millicode insns are actually function calls with some special
1280
   constraints on arguments and register usage.
1281
 
1282
   Millicode calls always expect their arguments in the integer argument
1283
   registers, and always return their result in %r29 (ret1).  They
1284
   are expected to clobber their arguments, %r1, %r29, and the return
1285
   pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else.
1286
 
1287
   This macro tells reorg that the references to arguments and
1288
   millicode calls do not appear to happen until after the millicode call.
1289
   This allows reorg to put insns which set the argument registers into the
1290
   delay slot of the millicode call -- thus they act more like traditional
1291
   CALL_INSNs.
1292
 
1293
   Note we cannot consider side effects of the insn to be delayed because
1294
   the branch and link insn will clobber the return pointer.  If we happened
1295
   to use the return pointer in the delay slot of the call, then we lose.
1296
 
1297
   get_attr_type will try to recognize the given insn, so make sure to
1298
   filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1299
   in particular.  */
1300
#define INSN_REFERENCES_ARE_DELAYED(X) (pa_insn_refs_are_delayed (X))
1301
 
1302
 
1303
/* Control the assembler format that we output.  */
1304
 
1305
/* A C string constant describing how to begin a comment in the target
1306
   assembler language.  The compiler assumes that the comment will end at
1307
   the end of the line.  */
1308
 
1309
#define ASM_COMMENT_START ";"
1310
 
1311
/* Output to assembler file text saying following lines
1312
   may contain character constants, extra white space, comments, etc.  */
1313
 
1314
#define ASM_APP_ON ""
1315
 
1316
/* Output to assembler file text saying following lines
1317
   no longer contain unusual constructs.  */
1318
 
1319
#define ASM_APP_OFF ""
1320
 
1321
/* This is how to output the definition of a user-level label named NAME,
1322
   such as the label on a static function or variable NAME.  */
1323
 
1324
#define ASM_OUTPUT_LABEL(FILE,NAME) \
1325
  do {                                                  \
1326
    assemble_name ((FILE), (NAME));                     \
1327
    if (TARGET_GAS)                                     \
1328
      fputs (":\n", (FILE));                            \
1329
    else                                                \
1330
      fputc ('\n', (FILE));                             \
1331
  } while (0)
1332
 
1333
/* This is how to output a reference to a user-level label named NAME.
1334
   `assemble_name' uses this.  */
1335
 
1336
#define ASM_OUTPUT_LABELREF(FILE,NAME)  \
1337
  do {                                  \
1338
    const char *xname = (NAME);         \
1339
    if (FUNCTION_NAME_P (NAME))         \
1340
      xname += 1;                       \
1341
    if (xname[0] == '*')         \
1342
      xname += 1;                       \
1343
    else                                \
1344
      fputs (user_label_prefix, FILE);  \
1345
    fputs (xname, FILE);                \
1346
  } while (0)
1347
 
1348
/* This how we output the symbol_ref X.  */
1349
 
1350
#define ASM_OUTPUT_SYMBOL_REF(FILE,X) \
1351
  do {                                                 \
1352
    SYMBOL_REF_FLAGS (X) |= SYMBOL_FLAG_REFERENCED;    \
1353
    assemble_name (FILE, XSTR (X, 0));                 \
1354
  } while (0)
1355
 
1356
/* This is how to store into the string LABEL
1357
   the symbol_ref name of an internal numbered label where
1358
   PREFIX is the class of label and NUM is the number within the class.
1359
   This is suitable for output with `assemble_name'.  */
1360
 
1361
#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM)   \
1362
  sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM))
1363
 
1364
/* Output the definition of a compiler-generated label named NAME.  */
1365
 
1366
#define ASM_OUTPUT_INTERNAL_LABEL(FILE,NAME) \
1367
  do {                                                  \
1368
    assemble_name_raw ((FILE), (NAME));                 \
1369
    if (TARGET_GAS)                                     \
1370
      fputs (":\n", (FILE));                            \
1371
    else                                                \
1372
      fputc ('\n', (FILE));                             \
1373
  } while (0)
1374
 
1375
#define TARGET_ASM_GLOBALIZE_LABEL pa_globalize_label
1376
 
1377
#define ASM_OUTPUT_ASCII(FILE, P, SIZE)  \
1378
  pa_output_ascii ((FILE), (P), (SIZE))
1379
 
1380
/* Jump tables are always placed in the text section.  Technically, it
1381
   is possible to put them in the readonly data section when -mbig-switch
1382
   is specified.  This has the benefit of getting the table out of .text
1383
   and reducing branch lengths as a result.  The downside is that an
1384
   additional insn (addil) is needed to access the table when generating
1385
   PIC code.  The address difference table also has to use 32-bit
1386
   pc-relative relocations.  Currently, GAS does not support these
1387
   relocations, although it is easily modified to do this operation.
1388
   The table entries need to look like "$L1+(.+8-$L0)-$PIC_pcrel$0"
1389
   when using ELF GAS.  A simple difference can be used when using
1390
   SOM GAS or the HP assembler.  The final downside is GDB complains
1391
   about the nesting of the label for the table when debugging.  */
1392
 
1393
#define JUMP_TABLES_IN_TEXT_SECTION 1
1394
 
1395
/* This is how to output an element of a case-vector that is absolute.  */
1396
 
1397
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)  \
1398
  if (TARGET_BIG_SWITCH)                                                \
1399
    fprintf (FILE, "\t.word L$%04d\n", VALUE);                          \
1400
  else                                                                  \
1401
    fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1402
 
1403
/* This is how to output an element of a case-vector that is relative.
1404
   Since we always place jump tables in the text section, the difference
1405
   is absolute and requires no relocation.  */
1406
 
1407
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)  \
1408
  if (TARGET_BIG_SWITCH)                                                \
1409
    fprintf (FILE, "\t.word L$%04d-L$%04d\n", VALUE, REL);              \
1410
  else                                                                  \
1411
    fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1412
 
1413
/* This is how to output an assembler line that says to advance the
1414
   location counter to a multiple of 2**LOG bytes.  */
1415
 
1416
#define ASM_OUTPUT_ALIGN(FILE,LOG)      \
1417
    fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1418
 
1419
#define ASM_OUTPUT_SKIP(FILE,SIZE)  \
1420
  fprintf (FILE, "\t.blockz "HOST_WIDE_INT_PRINT_UNSIGNED"\n",          \
1421
           (unsigned HOST_WIDE_INT)(SIZE))
1422
 
1423
/* This says how to output an assembler line to define an uninitialized
1424
   global variable with size SIZE (in bytes) and alignment ALIGN (in bits).
1425
   This macro exists to properly support languages like C++ which do not
1426
   have common data.  */
1427
 
1428
#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN)           \
1429
  pa_asm_output_aligned_bss (FILE, NAME, SIZE, ALIGN)
1430
 
1431
/* This says how to output an assembler line to define a global common symbol
1432
   with size SIZE (in bytes) and alignment ALIGN (in bits).  */
1433
 
1434
#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN)              \
1435
  pa_asm_output_aligned_common (FILE, NAME, SIZE, ALIGN)
1436
 
1437
/* This says how to output an assembler line to define a local common symbol
1438
   with size SIZE (in bytes) and alignment ALIGN (in bits).  This macro
1439
   controls how the assembler definitions of uninitialized static variables
1440
   are output.  */
1441
 
1442
#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN)               \
1443
  pa_asm_output_aligned_local (FILE, NAME, SIZE, ALIGN)
1444
 
1445
/* All HP assemblers use "!" to separate logical lines.  */
1446
#define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '!')
1447
 
1448
/* Print operand X (an rtx) in assembler syntax to file FILE.
1449
   CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1450
   For `%' followed by punctuation, CODE is the punctuation and X is null.
1451
 
1452
   On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1453
   and an immediate zero should be represented as `r0'.
1454
 
1455
   Several % codes are defined:
1456
   O an operation
1457
   C compare conditions
1458
   N extract conditions
1459
   M modifier to handle preincrement addressing for memory refs.
1460
   F modifier to handle preincrement addressing for fp memory refs */
1461
 
1462
#define PRINT_OPERAND(FILE, X, CODE) pa_print_operand (FILE, X, CODE)
1463
 
1464
 
1465
/* Print a memory address as an operand to reference that memory location.  */
1466
 
1467
#define PRINT_OPERAND_ADDRESS(FILE, ADDR)  \
1468
{ rtx addr = ADDR;                                                      \
1469
  switch (GET_CODE (addr))                                              \
1470
    {                                                                   \
1471
    case REG:                                                           \
1472
      fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]);                \
1473
      break;                                                            \
1474
    case PLUS:                                                          \
1475
      gcc_assert (GET_CODE (XEXP (addr, 1)) == CONST_INT);              \
1476
      fprintf (FILE, "%d(%s)", (int)INTVAL (XEXP (addr, 1)),            \
1477
               reg_names [REGNO (XEXP (addr, 0))]);                      \
1478
      break;                                                            \
1479
    case LO_SUM:                                                        \
1480
      if (!symbolic_operand (XEXP (addr, 1), VOIDmode))                 \
1481
        fputs ("R'", FILE);                                             \
1482
      else if (flag_pic == 0)                                            \
1483
        fputs ("RR'", FILE);                                            \
1484
      else                                                              \
1485
        fputs ("RT'", FILE);                                            \
1486
      pa_output_global_address (FILE, XEXP (addr, 1), 0);                \
1487
      fputs ("(", FILE);                                                \
1488
      output_operand (XEXP (addr, 0), 0);                         \
1489
      fputs (")", FILE);                                                \
1490
      break;                                                            \
1491
    case CONST_INT:                                                     \
1492
      fprintf (FILE, HOST_WIDE_INT_PRINT_DEC "(%%r0)", INTVAL (addr));  \
1493
      break;                                                            \
1494
    default:                                                            \
1495
      output_addr_const (FILE, addr);                                   \
1496
    }}
1497
 
1498
 
1499
/* Find the return address associated with the frame given by
1500
   FRAMEADDR.  */
1501
#define RETURN_ADDR_RTX(COUNT, FRAMEADDR)                                \
1502
  (pa_return_addr_rtx (COUNT, FRAMEADDR))
1503
 
1504
/* Used to mask out junk bits from the return address, such as
1505
   processor state, interrupt status, condition codes and the like.  */
1506
#define MASK_RETURN_ADDR                                                \
1507
  /* The privilege level is in the two low order bits, mask em out      \
1508
     of the return address.  */                                         \
1509
  (GEN_INT (-4))
1510
 
1511
/* The number of Pmode words for the setjmp buffer.  */
1512
#define JMP_BUF_SIZE 50
1513
 
1514
/* We need a libcall to canonicalize function pointers on TARGET_ELF32.  */
1515
#define CANONICALIZE_FUNCPTR_FOR_COMPARE_LIBCALL \
1516
  "__canonicalize_funcptr_for_compare"
1517
 
1518
#ifdef HAVE_AS_TLS
1519
#undef TARGET_HAVE_TLS
1520
#define TARGET_HAVE_TLS true
1521
#endif

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