OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [pdp11/] [pdp11.h] - Blame information for rev 709

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 709 jeremybenn
/* Definitions of target machine for GNU compiler, for the pdp-11
2
   Copyright (C) 1994, 1995, 1996, 1998, 1999, 2000, 2001, 2002, 2004, 2005,
3
   2006, 2007, 2008, 2010, 2011 Free Software Foundation, Inc.
4
   Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at).
5
 
6
This file is part of GCC.
7
 
8
GCC is free software; you can redistribute it and/or modify
9
it under the terms of the GNU General Public License as published by
10
the Free Software Foundation; either version 3, or (at your option)
11
any later version.
12
 
13
GCC is distributed in the hope that it will be useful,
14
but WITHOUT ANY WARRANTY; without even the implied warranty of
15
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
GNU General Public License for more details.
17
 
18
You should have received a copy of the GNU General Public License
19
along with GCC; see the file COPYING3.  If not see
20
<http://www.gnu.org/licenses/>.  */
21
 
22
#define CONSTANT_POOL_BEFORE_FUNCTION   0
23
 
24
/* check whether load_fpu_reg or not */
25
#define LOAD_FPU_REG_P(x) ((x) >= AC0_REGNUM && (x) <= AC3_REGNUM)
26
#define NO_LOAD_FPU_REG_P(x) ((x) == AC4_REGNUM || (x) == AC5_REGNUM)
27
#define FPU_REG_P(x)    (LOAD_FPU_REG_P(x) || NO_LOAD_FPU_REG_P(x))
28
#define CPU_REG_P(x)    ((x) <= PC_REGNUM)
29
 
30
/* Names to predefine in the preprocessor for this target machine.  */
31
 
32
#define TARGET_CPU_CPP_BUILTINS()               \
33
  do                                            \
34
    {                                           \
35
      builtin_define_std ("pdp11");             \
36
    }                                           \
37
  while (0)
38
 
39
 
40
/* Generate DBX debugging information.  */
41
 
42
#define DBX_DEBUGGING_INFO
43
 
44
#define TARGET_40_PLUS          (TARGET_40 || TARGET_45)
45
#define TARGET_10               (! TARGET_40_PLUS)
46
 
47
#define TARGET_UNIX_ASM_DEFAULT 0
48
 
49
#define ASSEMBLER_DIALECT       (TARGET_UNIX_ASM ? 1 : 0)
50
 
51
 
52
 
53
/* TYPE SIZES */
54
#define SHORT_TYPE_SIZE         16
55
#define INT_TYPE_SIZE           (TARGET_INT16 ? 16 : 32)
56
#define LONG_TYPE_SIZE          32
57
#define LONG_LONG_TYPE_SIZE     64     
58
 
59
/* if we set FLOAT_TYPE_SIZE to 32, we could have the benefit
60
   of saving core for huge arrays - the definitions are
61
   already in md - but floats can never reside in
62
   an FPU register - we keep the FPU in double float mode
63
   all the time !! */
64
#define FLOAT_TYPE_SIZE         (TARGET_FLOAT32 ? 32 : 64)
65
#define DOUBLE_TYPE_SIZE        64
66
#define LONG_DOUBLE_TYPE_SIZE   64
67
 
68
/* machine types from ansi */
69
#define SIZE_TYPE "unsigned int"        /* definition of size_t */
70
#define WCHAR_TYPE "int"                /* or long int???? */
71
#define WCHAR_TYPE_SIZE 16
72
 
73
#define PTRDIFF_TYPE "int"
74
 
75
/* target machine storage layout */
76
 
77
/* Define this if most significant bit is lowest numbered
78
   in instructions that operate on numbered bit-fields.  */
79
#define BITS_BIG_ENDIAN 0
80
 
81
/* Define this if most significant byte of a word is the lowest numbered.  */
82
#define BYTES_BIG_ENDIAN 0
83
 
84
/* Define this if most significant word of a multiword number is first.  */
85
#define WORDS_BIG_ENDIAN 1
86
 
87
/* Define that floats are in VAX order, not high word first as for ints.  */
88
#define FLOAT_WORDS_BIG_ENDIAN 0
89
 
90
/* Width of a word, in units (bytes).
91
 
92
   UNITS OR BYTES - seems like units */
93
#define UNITS_PER_WORD 2
94
 
95
/* This machine doesn't use IEEE floats.  */
96
/* Because the pdp11 (at least Unix) convention for 32-bit ints is
97
   big endian, opposite for what you need for float, the vax float
98
   conversion routines aren't actually used directly.  But the underlying
99
   format is indeed the vax/pdp11 float format.  */
100
extern const struct real_format pdp11_f_format;
101
extern const struct real_format pdp11_d_format;
102
 
103
/* Maximum sized of reasonable data type
104
   DImode or Dfmode ...*/
105
#define MAX_FIXED_MODE_SIZE 64  
106
 
107
/* Allocation boundary (in *bits*) for storing pointers in memory.  */
108
#define POINTER_BOUNDARY 16
109
 
110
/* Allocation boundary (in *bits*) for storing arguments in argument list.  */
111
#define PARM_BOUNDARY 16
112
 
113
/* Boundary (in *bits*) on which stack pointer should be aligned.  */
114
#define STACK_BOUNDARY 16
115
 
116
/* Allocation boundary (in *bits*) for the code of a function.  */
117
#define FUNCTION_BOUNDARY 16
118
 
119
/* Alignment of field after `int : 0' in a structure.  */
120
#define EMPTY_FIELD_BOUNDARY 16
121
 
122
/* No data type wants to be aligned rounder than this.  */
123
#define BIGGEST_ALIGNMENT 16
124
 
125
/* Define this if move instructions will actually fail to work
126
   when given unaligned data.  */
127
#define STRICT_ALIGNMENT 1
128
 
129
/* Standard register usage.  */
130
 
131
/* Number of actual hardware registers.
132
   The hardware registers are assigned numbers for the compiler
133
   from 0 to just below FIRST_PSEUDO_REGISTER.
134
   All registers that the compiler knows about must be given numbers,
135
   even those that are not normally considered general registers.
136
 
137
   we have 8 integer registers, plus 6 float
138
   (don't use scratch float !) */
139
 
140
/* 1 for registers that have pervasive standard uses
141
   and are not available for the register allocator.
142
 
143
   On the pdp, these are:
144
   Reg 7        = pc;
145
   reg 6        = sp;
146
   reg 5        = fp;  not necessarily!
147
*/
148
 
149
#define FIXED_REGISTERS  \
150
{0, 0, 0, 0, 0, 0, 1, 1, \
151
 0, 0, 0, 0, 0, 0, 1, 1 }
152
 
153
 
154
 
155
/* 1 for registers not available across function calls.
156
   These must include the FIXED_REGISTERS and also any
157
   registers that can be used without being saved.
158
   The latter must include the registers where values are returned
159
   and the register where structure-value addresses are passed.
160
   Aside from that, you can include as many other registers as you like.  */
161
 
162
/* don't know about fp */
163
#define CALL_USED_REGISTERS  \
164
{1, 1, 0, 0, 0, 0, 1, 1, \
165
 0, 0, 0, 0, 0, 0, 1, 1 }
166
 
167
 
168
/* Return number of consecutive hard regs needed starting at reg REGNO
169
   to hold something of mode MODE.
170
   This is ordinarily the length in words of a value of mode MODE
171
   but can be less for certain modes in special long registers.
172
*/
173
 
174
#define HARD_REGNO_NREGS(REGNO, MODE)   \
175
((REGNO <= PC_REGNUM)?                                                  \
176
    ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)      \
177
    :1)
178
 
179
 
180
/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
181
   On the pdp, the cpu registers can hold any mode other than float
182
   (because otherwise we may end up being asked to move from CPU to FPU
183
   register, which isn't a valid operation on the PDP11).
184
   For CPU registers, check alignment.
185
 
186
   FPU accepts SF and DF but actually holds a DF - simplifies life!
187
*/
188
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
189
(((REGNO) <= PC_REGNUM)?                                \
190
  ((GET_MODE_BITSIZE(MODE) <= 16)                       \
191
   || (GET_MODE_BITSIZE(MODE) >= 32 &&                  \
192
       !((REGNO) & 1) && !FLOAT_MODE_P (MODE)))         \
193
  :FLOAT_MODE_P (MODE))
194
 
195
 
196
/* Value is 1 if it is a good idea to tie two pseudo registers
197
   when one has mode MODE1 and one has mode MODE2.
198
   If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
199
   for any hard reg, then this must be 0 for correct output.  */
200
#define MODES_TIEABLE_P(MODE1, MODE2) 0
201
 
202
/* Specify the registers used for certain standard purposes.
203
   The values of these macros are register numbers.  */
204
 
205
/* Register in which static-chain is passed to a function.  */
206
/* ??? - i don't want to give up a reg for this! */
207
#define STATIC_CHAIN_REGNUM 4
208
 
209
/* Define the classes of registers for register constraints in the
210
   machine description.  Also define ranges of constants.
211
 
212
   One of the classes must always be named ALL_REGS and include all hard regs.
213
   If there is more than one class, another class must be named NO_REGS
214
   and contain no registers.
215
 
216
   The name GENERAL_REGS must be the name of a class (or an alias for
217
   another name such as ALL_REGS).  This is the class of registers
218
   that is allowed by "g" or "r" in a register constraint.
219
   Also, registers outside this class are allocated only when
220
   instructions express preferences for them.
221
 
222
   The classes must be numbered in nondecreasing order; that is,
223
   a larger-numbered class must never be contained completely
224
   in a smaller-numbered class.
225
 
226
   For any two classes, it is very desirable that there be another
227
   class that represents their union.  */
228
 
229
/* The pdp has a couple of classes:
230
 
231
MUL_REGS are used for odd numbered regs, to use in 16-bit multiplication
232
         (even numbered do 32-bit multiply)
233
LMUL_REGS long multiply registers (even numbered regs )
234
          (don't need them, all 32-bit regs are even numbered!)
235
GENERAL_REGS is all cpu
236
LOAD_FPU_REGS is the first four cpu regs, they are easier to load
237
NO_LOAD_FPU_REGS is ac4 and ac5, currently - difficult to load them
238
FPU_REGS is all fpu regs
239
*/
240
 
241
enum reg_class { NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES };
242
 
243
#define N_REG_CLASSES (int) LIM_REG_CLASSES
244
 
245
/* have to allow this till cmpsi/tstsi are fixed in a better way !! */
246
#define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
247
 
248
/* Since GENERAL_REGS is the same class as ALL_REGS,
249
   don't give it a different class number; just make it an alias.  */
250
 
251
/* #define GENERAL_REGS ALL_REGS */
252
 
253
/* Give names of register classes as strings for dump file.  */
254
 
255
#define REG_CLASS_NAMES {"NO_REGS", "MUL_REGS", "GENERAL_REGS", "LOAD_FPU_REGS", "NO_LOAD_FPU_REGS", "FPU_REGS", "ALL_REGS" }
256
 
257
/* Define which registers fit in which classes.
258
   This is an initializer for a vector of HARD_REG_SET
259
   of length N_REG_CLASSES.  */
260
 
261
#define REG_CLASS_CONTENTS {{0}, {0x00aa}, {0xc0ff}, {0x0f00}, {0x3000}, {0x3f00}, {0xffff}}
262
 
263
/* The same information, inverted:
264
   Return the class number of the smallest class containing
265
   reg number REGNO.  This could be a conditional expression
266
   or could index an array.  */
267
 
268
#define REGNO_REG_CLASS(REGNO) pdp11_regno_reg_class (REGNO)
269
 
270
/* The class value for index registers, and the one for base regs.  */
271
#define INDEX_REG_CLASS GENERAL_REGS
272
#define BASE_REG_CLASS GENERAL_REGS
273
 
274
/* Hook for testing if memory is needed for moving between registers.  */
275
#define SECONDARY_MEMORY_NEEDED(class1, class2, m) \
276
  pdp11_secondary_memory_needed (class1, class2, m)
277
 
278
/* Return the maximum number of consecutive registers
279
   needed to represent mode MODE in a register of class CLASS.  */
280
#define CLASS_MAX_NREGS(CLASS, MODE)    \
281
((CLASS == GENERAL_REGS || CLASS == MUL_REGS)?                          \
282
  ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD):       \
283
  1                                                                     \
284
)
285
 
286
#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
287
  pdp11_cannot_change_mode_class (FROM, TO, CLASS)
288
 
289
/* Stack layout; function entry, exit and calling.  */
290
 
291
/* Define this if pushing a word on the stack
292
   makes the stack pointer a smaller address.  */
293
#define STACK_GROWS_DOWNWARD
294
 
295
/* Define this to nonzero if the nominal address of the stack frame
296
   is at the high-address end of the local variables;
297
   that is, each additional local variable allocated
298
   goes at a more negative offset in the frame.
299
*/
300
#define FRAME_GROWS_DOWNWARD 1
301
 
302
/* Offset within stack frame to start allocating local variables at.
303
   If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
304
   first local allocated.  Otherwise, it is the offset to the BEGINNING
305
   of the first local allocated.  */
306
#define STARTING_FRAME_OFFSET 0
307
 
308
/* If we generate an insn to push BYTES bytes,
309
   this says how many the stack pointer really advances by.
310
   On the pdp11, the stack is on an even boundary */
311
#define PUSH_ROUNDING(BYTES) ((BYTES + 1) & ~1)
312
 
313
/* current_first_parm_offset stores the # of registers pushed on the
314
   stack */
315
extern int current_first_parm_offset;
316
 
317
/* Offset of first parameter from the argument pointer register value.  */
318
#define FIRST_PARM_OFFSET(FNDECL) 0
319
 
320
/* Define how to find the value returned by a function.
321
   VALTYPE is the data type of the value (as a tree).
322
   If the precise function being called is known, FUNC is its FUNCTION_DECL;
323
   otherwise, FUNC is 0.  */
324
#define BASE_RETURN_VALUE_REG(MODE) \
325
 (FLOAT_MODE_P (MODE) ? AC0_REGNUM : RETVAL_REGNUM)
326
 
327
/* 1 if N is a possible register number for function argument passing.
328
   - not used on pdp */
329
 
330
#define FUNCTION_ARG_REGNO_P(N) 0
331
 
332
/* Define a data type for recording info about an argument list
333
   during the scan of that argument list.  This data type should
334
   hold all necessary information about the function itself
335
   and about the args processed so far, enough to enable macros
336
   such as FUNCTION_ARG to determine where the next arg should go.
337
 
338
*/
339
 
340
#define CUMULATIVE_ARGS int
341
 
342
/* Initialize a variable CUM of type CUMULATIVE_ARGS
343
   for a call to a function whose data type is FNTYPE.
344
   For a library call, FNTYPE is 0.
345
 
346
   ...., the offset normally starts at 0, but starts at 1 word
347
   when the function gets a structure-value-address as an
348
   invisible first argument.  */
349
 
350
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
351
 ((CUM) = 0)
352
 
353
/* Output assembler code to FILE to increment profiler label # LABELNO
354
   for profiling a function entry.  */
355
 
356
#define FUNCTION_PROFILER(FILE, LABELNO)  \
357
   gcc_unreachable ();
358
 
359
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
360
   the stack pointer does not matter.  The value is tested only in
361
   functions that have frame pointers.
362
   No definition is equivalent to always zero.  */
363
 
364
extern int may_call_alloca;
365
 
366
#define EXIT_IGNORE_STACK       1
367
 
368
/* Definitions for register eliminations.
369
 
370
   This is an array of structures.  Each structure initializes one pair
371
   of eliminable registers.  The "from" register number is given first,
372
   followed by "to".  Eliminations of the same "from" register are listed
373
   in order of preference.
374
 
375
   There are two registers that can always be eliminated on the pdp11.
376
   The frame pointer and the arg pointer can be replaced by either the
377
   hard frame pointer or to the stack pointer, depending upon the
378
   circumstances.  The hard frame pointer is not used before reload and
379
   so it is not eligible for elimination.  */
380
 
381
#define ELIMINABLE_REGS                                 \
382
{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},           \
383
 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},      \
384
 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},         \
385
 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}    \
386
 
387
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
388
  ((OFFSET) = pdp11_initial_elimination_offset ((FROM), (TO)))
389
 
390
 
391
/* Addressing modes, and classification of registers for them.  */
392
 
393
#define HAVE_POST_INCREMENT 1
394
 
395
#define HAVE_PRE_DECREMENT 1
396
 
397
/* Macros to check register numbers against specific register classes.  */
398
 
399
/* These assume that REGNO is a hard or pseudo reg number.
400
   They give nonzero only if REGNO is a hard reg of the suitable class
401
   or a pseudo reg currently allocated to a suitable hard reg.
402
   Since they use reg_renumber, they are safe only once reg_renumber
403
   has been allocated, which happens in local-alloc.c.  */
404
 
405
#define REGNO_OK_FOR_BASE_P(REGNO)  \
406
  ((REGNO) <= PC_REGNUM || (unsigned) reg_renumber[REGNO] <= PC_REGNUM || \
407
   (REGNO) == ARG_POINTER_REGNUM || (REGNO) == FRAME_POINTER_REGNUM)
408
 
409
#define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P (REGNO)
410
 
411
/* Now macros that check whether X is a register and also,
412
   strictly, whether it is in a specified class.
413
*/
414
 
415
 
416
 
417
/* Maximum number of registers that can appear in a valid memory address.  */
418
 
419
#define MAX_REGS_PER_ADDRESS 1
420
 
421
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
422
   and check its validity for a certain class.
423
   We have two alternate definitions for each of them.
424
   The usual definition accepts all pseudo regs; the other rejects
425
   them unless they have been allocated suitable hard regs.
426
   The symbol REG_OK_STRICT causes the latter definition to be used.
427
 
428
   Most source files want to accept pseudo regs in the hope that
429
   they will get allocated to the class that the insn wants them to be in.
430
   Source files for reload pass need to be strict.
431
   After reload, it makes no difference, since pseudo regs have
432
   been eliminated by then.  */
433
 
434
#ifndef REG_OK_STRICT
435
 
436
/* Nonzero if X is a hard reg that can be used as an index
437
   or if it is a pseudo reg.  */
438
#define REG_OK_FOR_INDEX_P(X) (1)
439
/* Nonzero if X is a hard reg that can be used as a base reg
440
   or if it is a pseudo reg.  */
441
#define REG_OK_FOR_BASE_P(X) (1)
442
 
443
#else
444
 
445
/* Nonzero if X is a hard reg that can be used as an index.  */
446
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
447
/* Nonzero if X is a hard reg that can be used as a base reg.  */
448
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
449
 
450
#endif
451
 
452
/* Specify the machine mode that this machine uses
453
   for the index in the tablejump instruction.  */
454
#define CASE_VECTOR_MODE HImode
455
 
456
/* Define this if a raw index is all that is needed for a
457
   `tablejump' insn.  */
458
#define CASE_TAKES_INDEX_RAW
459
 
460
/* Define this as 1 if `char' should by default be signed; else as 0.  */
461
#define DEFAULT_SIGNED_CHAR 1
462
 
463
/* Max number of bytes we can move from memory to memory
464
   in one reasonably fast instruction.
465
*/
466
 
467
#define MOVE_MAX 2
468
 
469
/* Nonzero if access to memory by byte is slow and undesirable. -
470
*/
471
#define SLOW_BYTE_ACCESS 0
472
 
473
/* Do not break .stabs pseudos into continuations.  */
474
#define DBX_CONTIN_LENGTH 0
475
 
476
/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
477
   is done just by pretending it is already truncated.  */
478
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
479
 
480
/* Give a comparison code (EQ, NE etc) and the first operand of a COMPARE,
481
   return the mode to be used for the comparison.  For floating-point, CCFPmode
482
   should be used.  */
483
 
484
#define SELECT_CC_MODE(OP,X,Y)  \
485
(GET_MODE_CLASS(GET_MODE(X)) == MODE_FLOAT? CCFPmode : CCmode)
486
 
487
/* Specify the machine mode that pointers have.
488
   After generation of rtl, the compiler makes no further distinction
489
   between pointers and any other objects of this machine mode.  */
490
#define Pmode HImode
491
 
492
/* A function address in a call instruction
493
   is a word address (for indexing purposes)
494
   so give the MEM rtx a word's mode.  */
495
#define FUNCTION_MODE HImode
496
 
497
/* Define this if addresses of constant functions
498
   shouldn't be put through pseudo regs where they can be cse'd.
499
   Desirable on machines where ordinary constants are expensive
500
   but a CALL with constant address is cheap.  */
501
/* #define NO_FUNCTION_CSE */
502
 
503
 
504
/* Tell emit-rtl.c how to initialize special values on a per-function base.  */
505
extern rtx cc0_reg_rtx;
506
 
507
#define CC_STATUS_MDEP rtx
508
 
509
#define CC_STATUS_MDEP_INIT (cc_status.mdep = 0)
510
 
511
/* Tell final.c how to eliminate redundant test instructions.  */
512
 
513
/* Here we define machine-dependent flags and fields in cc_status
514
   (see `conditions.h').  */
515
 
516
#define CC_IN_FPU 04000 
517
 
518
/* Do UPDATE_CC if EXP is a set, used in
519
   NOTICE_UPDATE_CC
520
 
521
   floats only do compare correctly, else nullify ...
522
 
523
   get cc0 out soon ...
524
*/
525
 
526
/* Store in cc_status the expressions
527
   that the condition codes will describe
528
   after execution of an instruction whose pattern is EXP.
529
   Do not alter them if the instruction would not alter the cc's.  */
530
 
531
#define NOTICE_UPDATE_CC(EXP, INSN) \
532
{ if (GET_CODE (EXP) == SET)                                    \
533
    {                                                           \
534
      notice_update_cc_on_set(EXP, INSN);                       \
535
    }                                                           \
536
  else if (GET_CODE (EXP) == PARALLEL                           \
537
           && GET_CODE (XVECEXP (EXP, 0, 0)) == SET)              \
538
    {                                                           \
539
      notice_update_cc_on_set(XVECEXP (EXP, 0, 0), INSN); \
540
    }                                                           \
541
  else if (GET_CODE (EXP) == CALL)                              \
542
    { /* all bets are off */ CC_STATUS_INIT; }                  \
543
  if (cc_status.value1 && GET_CODE (cc_status.value1) == REG    \
544
      && cc_status.value2                                       \
545
      && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \
546
    {                                                           \
547
      printf ("here!\n");                                       \
548
      cc_status.value2 = 0;                                      \
549
    }                                                           \
550
}
551
 
552
/* Control the assembler format that we output.  */
553
 
554
/* Output to assembler file text saying following lines
555
   may contain character constants, extra white space, comments, etc.  */
556
 
557
#define ASM_APP_ON ""
558
 
559
/* Output to assembler file text saying following lines
560
   no longer contain unusual constructs.  */
561
 
562
#define ASM_APP_OFF ""
563
 
564
/* Output before read-only data.  */
565
 
566
#define TEXT_SECTION_ASM_OP "\t.text\n"
567
 
568
/* Output before writable data.  */
569
 
570
#define DATA_SECTION_ASM_OP "\t.data\n"
571
 
572
/* How to refer to registers in assembler output.
573
   This sequence is indexed by compiler's hard-register-number (see above).  */
574
 
575
#define REGISTER_NAMES \
576
{"r0", "r1", "r2", "r3", "r4", "r5", "sp", "pc",     \
577
 "ac0", "ac1", "ac2", "ac3", "ac4", "ac5", "fp", "ap" }
578
 
579
/* Globalizing directive for a label.  */
580
#define GLOBAL_ASM_OP "\t.globl "
581
 
582
/* The prefix to add to user-visible assembler symbols.  */
583
 
584
#define USER_LABEL_PREFIX "_"
585
 
586
/* This is how to store into the string LABEL
587
   the symbol_ref name of an internal numbered label where
588
   PREFIX is the class of label and NUM is the number within the class.
589
   This is suitable for output with `assemble_name'.  */
590
 
591
#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM)   \
592
  sprintf (LABEL, "*%s_%lu", PREFIX, (unsigned long)(NUM))
593
 
594
#define ASM_OUTPUT_ASCII(FILE, P, SIZE)  \
595
  output_ascii (FILE, P, SIZE)
596
 
597
/* This is how to output an element of a case-vector that is absolute.  */
598
 
599
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)  \
600
  fprintf (FILE, "\t%sL_%d\n", TARGET_UNIX_ASM ? "" : ".word ", VALUE)
601
 
602
/* This is how to output an element of a case-vector that is relative.
603
   Don't define this if it is not supported.  */
604
 
605
/* #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) */
606
 
607
/* This is how to output an assembler line
608
   that says to advance the location counter
609
   to a multiple of 2**LOG bytes.
610
 
611
   who needs this????
612
*/
613
 
614
#define ASM_OUTPUT_ALIGN(FILE,LOG)      \
615
  switch (LOG)                          \
616
    {                                   \
617
      case 0:                            \
618
        break;                          \
619
      case 1:                           \
620
        fprintf (FILE, "\t.even\n");    \
621
        break;                          \
622
      default:                          \
623
        gcc_unreachable ();             \
624
    }
625
 
626
#define ASM_OUTPUT_SKIP(FILE,SIZE)  \
627
  fprintf (FILE, "\t.=.+ %#ho\n", (unsigned short)(SIZE))
628
 
629
/* This says how to output an assembler line
630
   to define a global common symbol.  */
631
 
632
#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN)  \
633
    pdp11_asm_output_var (FILE, NAME, SIZE, ALIGN, true)
634
 
635
 
636
/* This says how to output an assembler line
637
   to define a local common symbol.  */
638
 
639
#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
640
    pdp11_asm_output_var (FILE, NAME, SIZE, ALIGN, false)
641
 
642
/* Print a memory address as an operand to reference that memory location.  */
643
 
644
#define PRINT_OPERAND_ADDRESS(FILE, ADDR)  \
645
 print_operand_address (FILE, ADDR)
646
 
647
#define ASM_OUTPUT_REG_PUSH(FILE,REGNO)                 \
648
(                                                       \
649
  fprintf (FILE, "\tmov %s, -(sp)\n", reg_names[REGNO]) \
650
)
651
 
652
#define ASM_OUTPUT_REG_POP(FILE,REGNO)                          \
653
(                                                               \
654
  fprintf (FILE, "\tmov (sp)+, %s\n", reg_names[REGNO])         \
655
)
656
 
657
#define TRAMPOLINE_SIZE 8
658
#define TRAMPOLINE_ALIGNMENT 16
659
 
660
/* there is no point in avoiding branches on a pdp,
661
   since branches are really cheap - I just want to find out
662
   how much difference the BRANCH_COST macro makes in code */
663
#define BRANCH_COST(speed_p, predictable_p) (TARGET_BRANCH_CHEAP ? 0 : 1)
664
 
665
 
666
#define COMPARE_FLAG_MODE HImode
667
 
668
#define TARGET_HAVE_NAMED_SECTIONS false

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.