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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [rl78/] [predicates.md] - Blame information for rev 717

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1 709 jeremybenn
;;  Machine Description for Renesas RL78 processors
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;;  Copyright (C) 2011 Free Software Foundation, Inc.
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;;  Contributed by Red Hat.
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;; This file is part of GCC.
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 3, or (at your option)
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;; any later version.
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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;; GNU General Public License for more details.
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3.  If not see
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;; .
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(define_predicate "rl78_any_operand"
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  (ior (match_operand 0 "general_operand")
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       (match_code "mem,const_int,const_double,reg"))
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)
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(define_predicate "rl78_nonfar_operand"
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  (and (match_operand 0 "general_operand")
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       (not (match_test "rl78_far_p (op)")))
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)
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(define_predicate "rl78_nonfar_nonimm_operand"
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  (and (match_operand 0 "nonimmediate_operand")
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       (not (match_test "rl78_far_p (op)")))
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)
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(define_predicate "ubyte_operand"
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  (and (match_code "const_int")
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       (match_test "IN_RANGE (INTVAL (op), 0, 255)")))
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(define_predicate "rl78_24_operand"
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  (and (match_code "const_int")
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       (match_test "INTVAL (op) == 2 || INTVAL (op) == 4")))
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(define_predicate "uword_operand"
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  (ior (match_code "const")
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       (and (match_code "const_int")
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            (match_test "IN_RANGE (INTVAL (op), 0, 65536)"))))
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(define_predicate "rl78_cmp_operator_real"
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  (match_code "eq,ne,gtu,ltu,geu,leu"))
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(define_predicate "rl78_cmp_operator"
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  (match_code "eq,ne,gtu,ltu,geu,leu,gt,lt,ge,le"))
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(define_predicate "rl78_ax_operand"
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  (and (match_code "reg")
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       (match_test "REGNO (op) == AX_REG || REGNO (op) >= FIRST_PSEUDO_REGISTER")))
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(define_predicate "rl78_addw_operand"
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  (and (match_code "reg")
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       (match_test "REGNO (op) == AX_REG || REGNO (op) == SP_REG || REGNO (op) >= FIRST_PSEUDO_REGISTER")))

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