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;;  Machine Description for Renesas RL78 processors

;;  Copyright (C) 2011 Free Software Foundation, Inc.

;;  Contributed by Red Hat.

;; This file is part of GCC.

;; GCC is free software; you can redistribute it and/or modify

;; it under the terms of the GNU General Public License as published by

;; the Free Software Foundation; either version 3, or (at your option)

;; any later version.

;; GCC is distributed in the hope that it will be useful,

;; but WITHOUT ANY WARRANTY; without even the implied warranty of

;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

;; GNU General Public License for more details.

;; You should have received a copy of the GNU General Public License

;; along with GCC; see the file COPYING3.  If not see

;; .

;;---------- Moving ------------------------

(define_expand "movqi"

  [(set (match_operand:QI 0 "nonimmediate_operand")

        (match_operand:QI 1 "general_operand"))]

  ""

  {

    if (MEM_P (operand0) && MEM_P (operand1))

      operands[1] = copy_to_mode_reg (QImode, operand1);

    if (rl78_far_p (operand0) && rl78_far_p (operand1))

      operands[1] = copy_to_mode_reg (QImode, operand1);

    /* FIXME: Not sure how GCC can generate (SUBREG (SYMBOL_REF)),

       but it does.  Since this makes no sense, reject it here.  */

    if (GET_CODE (operand1) == SUBREG

        && GET_CODE (XEXP (operand1, 0)) == SYMBOL_REF)

      FAIL;

    if (CONST_INT_P (operand1) && ! IN_RANGE (INTVAL (operand1), (-1 << 8) + 1, (1 << 8) - 1))

      gcc_unreachable();

  }

)

(define_expand "movhi"

  [(set (match_operand:HI 0 "nonimmediate_operand")

        (match_operand:HI 1 "general_operand"))]

  ""

  {

    if (MEM_P (operand0) && MEM_P (operand1))

      operands[1] = copy_to_mode_reg (HImode, operand1);

    if (rl78_far_p (operand0) && rl78_far_p (operand1))

      operands[1] = copy_to_mode_reg (HImode, operand1);

    /* FIXME: Not sure how GCC can generate (SUBREG (SYMBOL_REF)),

       but it does.  Since this makes no sense, reject it here.  */

    if (GET_CODE (operand1) == SUBREG

        && GET_CODE (XEXP (operand1, 0)) == SYMBOL_REF)

      FAIL;

  }

)

(define_expand "movsi"

  [(set (match_operand:SI 0 "nonimmediate_operand")

        (match_operand:SI 1 "general_operand"))]

  ""

  {

    rl78_expand_movsi (operands);

    DONE;

  }

)

;;---------- Conversions ------------------------

(define_expand "zero_extendqihi2"

  [(set (match_operand:HI                 0 "nonimmediate_operand")

        (zero_extend:HI (match_operand:QI 1 "general_operand")))]

  ""

  "if (rl78_force_nonfar_2 (operands, gen_zero_extendqihi2))

     DONE;"

  )

(define_expand "extendqihi2"

  [(set (match_operand:HI                 0 "nonimmediate_operand")

        (sign_extend:HI (match_operand:QI 1 "general_operand")))]

  ""

  "if (rl78_force_nonfar_2 (operands, gen_extendqihi2))

     DONE;"

  )

;;---------- Arithmetic ------------------------

(define_expand "add3"

  [(set (match_operand:QHI           0 "nonimmediate_operand")

        (plus:QHI (match_operand:QHI 1 "general_operand")

                  (match_operand:QHI 2 "general_operand")))

   ]

  ""

  "if (rl78_force_nonfar_3 (operands, gen_add3))

     DONE;"

)

(define_expand "sub3"

  [(set (match_operand:QHI            0 "nonimmediate_operand")

        (minus:QHI (match_operand:QHI 1 "general_operand")

                   (match_operand:QHI 2 "general_operand")))

   ]

  ""

  "if (rl78_force_nonfar_3 (operands, gen_sub3))

     DONE;"

)

(define_expand "neg2"

  [(set (match_operand:QHI            0 "nonimmediate_operand")

        (minus:QHI (const_int 0)

                   (match_operand:QHI 1 "general_operand")))

   ]

  ""

  "if (rl78_force_nonfar_2 (operands, gen_neg2))

     DONE;"

)

(define_expand "umulqihi3"

  [(set (match_operand:HI 0 "register_operand")

        (mult:HI (zero_extend:HI (match_operand:QI 1 "register_operand"))

                 (zero_extend:HI (match_operand:QI 2 "register_operand"))))]

  ""

  ""

)

(define_expand "andqi3"

  [(set (match_operand:QI         0 "nonimmediate_operand")

        (and:QI (match_operand:QI 1 "general_operand")

                (match_operand:QI 2 "general_operand")))

   ]

  ""

  "if (rl78_force_nonfar_3 (operands, gen_andqi3))

     DONE;"

)

(define_expand "iorqi3"

  [(set (match_operand:QI         0 "nonimmediate_operand")

        (ior:QI (match_operand:QI 1 "general_operand")

                (match_operand:QI 2 "general_operand")))

   ]

  ""

  "if (rl78_force_nonfar_3 (operands, gen_iorqi3))

     DONE;"

)

(define_expand "xorqi3"

  [(set (match_operand:QI         0 "nonimmediate_operand")

        (xor:QI (match_operand:QI 1 "general_operand")

                (match_operand:QI 2 "general_operand")))

   ]

  ""

  "if (rl78_force_nonfar_3 (operands, gen_xorqi3))

     DONE;"

)

(define_expand "one_cmplqi2"

  [(set (match_operand:QI         0 "nonimmediate_operand")

        (xor:QI (match_operand:QI 1 "general_operand")

                (const_int 255)))

   ]

  ""

  "if (rl78_force_nonfar_2 (operands, gen_one_cmplqi2))

     DONE;"

)

;;---------- Shifts ------------------------

(define_expand "ashl3"

  [(set (match_operand:QHI             0 "nonimmediate_operand")

        (ashift:QHI (match_operand:QHI 1 "general_operand")

                    (match_operand:QI  2 "general_operand")))

   ]

  ""

  "if (rl78_force_nonfar_3 (operands, gen_ashl3))

     DONE;"

)

(define_expand "ashr3"

  [(set (match_operand:QHI               0 "nonimmediate_operand")

        (ashiftrt:QHI (match_operand:QHI 1 "general_operand")

                      (match_operand:QI  2 "general_operand")))

   ]

  ""

  "if (rl78_force_nonfar_3 (operands, gen_ashr3))

     DONE;"

)

(define_expand "lshr3"

  [(set (match_operand:QHI               0 "nonimmediate_operand")

        (lshiftrt:QHI (match_operand:QHI 1 "general_operand")

                      (match_operand:QI  2 "general_operand")))

   ]

  ""

  "if (rl78_force_nonfar_3 (operands, gen_lshr3))

     DONE;"

)

(define_expand "ashrsi3"

  [(set (match_operand:SI               0 "register_operand")

        (ashiftrt:SI (match_operand:SI  1 "register_operand")

                      (match_operand:SI 2 "immediate_operand")))

   ]

  ""

  "if (GET_CODE (operands[2]) != CONST_INT)

     FAIL;"

)

;;---------- Branching ------------------------

(define_expand "indirect_jump"

  [(set (pc)

        (match_operand:HI 0 "nonimmediate_operand"))]

  ""

  ""

)

(define_expand "call"

  [(call (match_operand:HI 0 "memory_operand")

         (match_operand 1 ""))]

  ""

  ""

)

(define_expand "call_value"

  [(set (match_operand          0 "register_operand")

        (call (match_operand:HI 1 "memory_operand")

              (match_operand    2 "")))]

  ""

  ""

)

(define_expand "cbranchqi4"

  [(set (pc) (if_then_else

              (match_operator                    0 "rl78_cmp_operator"

                              [(match_operand:QI 1 "general_operand")

                               (match_operand:QI 2 "general_operand")])

              (label_ref (match_operand 3 "" ""))

              (pc)))]

  ""

  "rl78_expand_compare (operands);"

)

(define_expand "cbranchhi4"

  [(set (pc) (if_then_else

              (match_operator                    0 "rl78_cmp_operator"

                              [(match_operand:HI 1 "general_operand")

                               (match_operand:HI 2 "general_operand")])

              (label_ref (match_operand 3 "" ""))

              (pc)))]

  ""

  "rl78_expand_compare (operands);"

)