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1 709 jeremybenn 
;;  Machine Description for Renesas RL78 processors
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;;  Copyright (C) 2011 Free Software Foundation, Inc.
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;;  Contributed by Red Hat.
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;; This file is part of GCC.
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 3, or (at your option)
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;; any later version.
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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;; GNU General Public License for more details.
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3.  If not see
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;; .
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(define_constants
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  [
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   (AX_REG 0)
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   (X_REG 0)
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   (A_REG 1)
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   (BC_REG 2)
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   (C_REG 2)
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   (B_REG 3)
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   (DE_REG 4)
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   (E_REG 4)
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   (D_REG 5)
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   (HL_REG 6)
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   (L_REG 6)
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   (H_REG 7)
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   (FP_REG 22)
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   (SP_REG 32)
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   (CC_REG 33)
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   (ES_REG 35)
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   (CS_REG 36)
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   (UNS_PROLOG  1)
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   (UNS_EPILOG  1)
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   (UNS_RETI    2)
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   (UNS_RETB    3)
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   (UNS_SET_RB  10)
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   (UNS_TRAMPOLINE_INIT         20)
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   (UNS_TRAMPOLINE_UNINIT       21)
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   (UNS_NONLOCAL_GOTO           22)
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   ])
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(define_insn "nop"
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  [(const_int 0)]
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  ""
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  "nop"
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  )
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(define_mode_iterator QHI [QI HI])
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(include "predicates.md")
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(include "constraints.md")
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(include "rl78-expand.md")
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(include "rl78-virt.md")
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(include "rl78-real.md")
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;; Function Prologue/Epilogue Instructions
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(define_expand "prologue"
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  [(const_int 0)]
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  ""
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  "rl78_expand_prologue (); DONE;"
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)
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(define_expand "epilogue"
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  [(const_int 0)]
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  ""
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  "rl78_expand_epilogue (); DONE;"
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)
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(define_expand "sibcall_epilogue"
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  [(return)]
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  ""
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  "FAIL;"
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)
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(define_insn "rl78_return"
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  [(return)]
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  ""
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  "ret"
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)
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(define_insn "interrupt_return"
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  [(unspec_volatile [(return)] UNS_RETI) ]
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  ""
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  "reti"
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)
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(define_insn "brk_interrupt_return"
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  [(unspec_volatile [(return)] UNS_RETB) ]
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  ""
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  "retb"
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)
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(define_expand "eh_return"
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  [(match_operand:HI 0 "" "")]
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  ""
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  "rl78_expand_eh_epilogue (operands[0]);
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   emit_barrier ();
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   DONE;"
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)
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;; These are used only by prologue/epilogue so it's "safe" to pass
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;; virtual registers.
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(define_insn "push"
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  [(set (reg:HI SP_REG)
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        (plus:HI (reg:HI SP_REG)
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                  (const_int -2)))
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   (set (mem:HI (reg:HI SP_REG))
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        (match_operand:HI 0 "register_operand" "ABDT,vZint"))]
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  ""
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  "@
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   push\t%v0
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   push\t%v0 ; %0"
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)
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(define_insn "pop"
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  [(set (match_operand:HI 0 "register_operand" "=ABDT,vZint")
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        (mem:HI (reg:HI SP_REG)))
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   (set (reg:HI SP_REG)
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        (plus:HI (reg:HI SP_REG)
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                    (const_int 2)))]
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  ""
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  "@
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   pop\t%v0
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   pop\t%v0 ; %0"
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)
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(define_insn "sel_rb"
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  [(unspec_volatile [(match_operand 0 "immediate_operand" "")] UNS_SET_RB)]
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  ""
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  "sel\trb%u0"
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  )
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(define_insn "trampoline_init"
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  [(set (match_operand 0 "register_operand" "=Z08W")
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        (unspec_volatile [(match_operand 1 "register_operand" "Z08W")
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                          (match_operand 2 "register_operand" "Z10W")
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                          ] UNS_TRAMPOLINE_INIT))
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   ]
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  ""
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  "call !!___trampoline_init ; %0 <= %1 %2"
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  )
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(define_insn "trampoline_uninit"
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  [(unspec_volatile [(const_int 0)] UNS_TRAMPOLINE_UNINIT)
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   ]
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  ""
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  "call !!___trampoline_uninit"
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  )
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;; GCC restores $fp *before* using it to access values on the *old*
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;; frame.  So, we do it ourselves, to ensure this is not the case.
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;; Note that while %1 is usually a label_ref, we allow for a
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;; non-immediate as well.
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(define_expand "nonlocal_goto"
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  [(set (pc)
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        (unspec_volatile [(match_operand 0 "" "") ;; fp (ignore)
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                          (match_operand 1 "" "vi") ;; target
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                          (match_operand 2 "" "vi") ;; sp
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                          (match_operand 3 "" "vi") ;; ?
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                          ] UNS_NONLOCAL_GOTO))
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   ]
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  ""
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  "emit_jump_insn (gen_nonlocal_goto_insn (operands[0], operands[1], operands[2], operands[3]));
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   emit_barrier ();
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   DONE;"
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  )
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(define_insn "nonlocal_goto_insn"
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  [(set (pc)
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        (unspec_volatile [(match_operand 0 "" "") ;; fp (ignore)
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                          (match_operand 1 "" "vi") ;; target
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                          (match_operand 2 "" "vi") ;; sp
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                          (match_operand 3 "" "vi") ;; ?
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                          ] UNS_NONLOCAL_GOTO))
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   ]
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  ""
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  "; nonlocal goto
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        movw    ax, %3
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        movw    r22, ax
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        movw    ax, %2
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        movw    sp, ax
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        movw    ax, %1
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        br      ax
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"
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  )
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;;======================================================================
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;;
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;; "macro" insns - cases where inline chunks of code are more
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;; efficient than anything else.
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(define_expand "addsi3"
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  [(set (match_operand:SI          0 "register_operand" "=&v")
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        (plus:SI (match_operand:SI 1 "nonmemory_operand" "vi")
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                 (match_operand    2 "nonmemory_operand" "vi")))
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   ]
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  ""
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  "if (!nonmemory_operand (operands[1], SImode))
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     operands[1] = force_reg (SImode, operands[1]);
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   if (!nonmemory_operand (operands[1], SImode))
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     operands[2] = force_reg (SImode, operands[2]);"
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)
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(define_insn "addsi3_internal"
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  [(set (match_operand:SI          0 "register_operand" "=&v")
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        (plus:SI (match_operand:SI 1 "nonmemory_operand" "vi")
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                 (match_operand:SI 2 "nonmemory_operand" "vi")))
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   ]
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  ""
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  "; addSI macro %0 = %1 + %2
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        movw    ax, %h1
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        addw    ax, %h2
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        movw    %h0, ax
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        movw    ax,%H1
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        sknc
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        incw    ax
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        addw    ax,%H2
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        movw    %H0,ax
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        ; end of addSI macro"
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  [(set_attr "valloc" "macax")]
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)
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(define_expand "mulsi3"
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  [(set (match_operand:SI          0 "register_operand" "=&v")
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        (mult:SI (match_operand:SI 1 "nonmemory_operand" "vi")
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                 (match_operand:SI 2 "nonmemory_operand" "vi")))
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   ]
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  "! RL78_MUL_NONE"
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  ""
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)
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;; 0xFFFF0 is MACR(L).  0xFFFF2 is MACR(H) but we don't care about it
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;; because we're only using the lower 16 bits (which is the upper 16
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;; bits of the result).
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(define_insn "mulsi3_rl78"
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  [(set (match_operand:SI          0 "register_operand" "=&v")
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        (mult:SI (match_operand:SI 1 "nonmemory_operand" "vi")
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                 (match_operand:SI 2 "nonmemory_operand" "vi")))
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   ]
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  "RL78_MUL_RL78"
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  "; mulsi macro %0 = %1 * %2
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        movw    ax, %h1
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        movw    bc, %h2
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        MULHU   ; bcax = bc * ax
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        movw    %h0, ax
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        movw    ax, bc
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        movw    0xffff0, ax
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        movw    ax, %H1
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        movw    bc, %h2
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        MACHU   ; MACR += bc * ax
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        movw    ax, %h1
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        movw    bc, %H2
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        MACHU   ; MACR += bc * ax
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        movw    ax, 0xffff0
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        movw    %H0, ax
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        ; end of mulsi macro"
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  [(set_attr "valloc" "macax")]
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  )
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;; 0xFFFF0 is MDAL.  0xFFFF2 is MDAH.
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;; 0xFFFF4 is MDBL.  0xFFFF6 is MDBH.
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;; 0xF00E0 is MDCL.  0xF00E2 is MDCH.
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;; 0xF00E8 is MDUC.
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;; Warning: this matches the documentation, not the silicon.
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(define_insn "mulsi3_g13"
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  [(set (match_operand:SI          0 "register_operand" "=&v")
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        (mult:SI (match_operand:SI 1 "nonmemory_operand" "vi")
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                 (match_operand:SI 2 "nonmemory_operand" "vi")))
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   ]
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  "RL78_MUL_G13"
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  "; mulsi macro %0 = %1 * %2
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        mov     a, #0x00
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        mov     !0xf00e8, a     ; MDUC
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        movw    ax, %h1
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        movw    0xffff0, ax     ; MDAL
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        movw    ax, %h2
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        movw    0xffff2, ax     ; MDAH
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        nop     ; mdb = mdal * mdah
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        movw    ax, 0xffff4     ; MDBL
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        movw    %h0, ax
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        mov     a, #0x40
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        mov     !0xf00e8, a     ; MDUC
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        movw    ax, 0xffff6     ; MDBH
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        movw    !0xf00e0, ax    ; MDCL
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        movw    ax, #0
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        movw    !0xf00e2, ax    ; MDCL
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        movw    ax, %H1
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        movw    0xffff0, ax     ; MDAL
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        movw    ax, %h2
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        movw    0xffff2, ax     ; MDAH
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        nop     ; mdc += mdal * mdah
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        mov     a, #0x40
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        mov     !0xf00e8, a     ; MDUC
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        movw    ax, %h1
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        movw    0xffff0, ax     ; MDAL
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        movw    ax, %H2
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        movw    0xffff2, ax     ; MDAH
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        nop     ; mdc += mdal * mdah
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        movw    ax, !0xf00e0    ; MDCL
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        movw    %H0, ax
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        ; end of mulsi macro"
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  [(set_attr "valloc" "macax")]
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  )

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