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https://opencores.org/ocsvn/openrisc/openrisc/trunk
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jeremybenn |
/* Enable IBM PowerPC 476 support.
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Copyright (C) 2011 Free Software Foundation, Inc.
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Contributed by Peter Bergner (bergner@vnet.ibm.com)
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published
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by the Free Software Foundation; either version 3, or (at your
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option) any later version.
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GCC is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#undef TARGET_LINK_STACK
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#define TARGET_LINK_STACK (rs6000_link_stack)
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#undef SET_TARGET_LINK_STACK
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#define SET_TARGET_LINK_STACK(X) do { TARGET_LINK_STACK = (X); } while (0)
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#undef TARGET_ASM_CODE_END
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#define TARGET_ASM_CODE_END rs6000_code_end
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