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709 |
jeremybenn |
/* Subroutines for the C front end on the POWER and PowerPC architectures.
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Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
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Free Software Foundation, Inc.
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Contributed by Zack Weinberg <zack@codesourcery.com>
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and Paolo Bonzini <bonzini@gnu.org>
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published
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by the Free Software Foundation; either version 3, or (at your
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option) any later version.
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GCC is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#include "config.h"
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#include "system.h"
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#include "coretypes.h"
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#include "tm.h"
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#include "cpplib.h"
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#include "tree.h"
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#include "c-family/c-common.h"
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#include "c-family/c-pragma.h"
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#include "diagnostic-core.h"
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#include "tm_p.h"
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#include "target.h"
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#include "langhooks.h"
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/* Handle the machine specific pragma longcall. Its syntax is
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# pragma longcall ( TOGGLE )
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where TOGGLE is either 0 or 1.
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rs6000_default_long_calls is set to the value of TOGGLE, changing
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whether or not new function declarations receive a longcall
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attribute by default. */
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#define SYNTAX_ERROR(gmsgid) do { \
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warning (OPT_Wpragmas, gmsgid); \
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warning (OPT_Wpragmas, "ignoring malformed #pragma longcall"); \
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return; \
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} while (0)
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void
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rs6000_pragma_longcall (cpp_reader *pfile ATTRIBUTE_UNUSED)
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{
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tree x, n;
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/* If we get here, generic code has already scanned the directive
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leader and the word "longcall". */
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if (pragma_lex (&x) != CPP_OPEN_PAREN)
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SYNTAX_ERROR ("missing open paren");
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if (pragma_lex (&n) != CPP_NUMBER)
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SYNTAX_ERROR ("missing number");
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if (pragma_lex (&x) != CPP_CLOSE_PAREN)
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SYNTAX_ERROR ("missing close paren");
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if (n != integer_zero_node && n != integer_one_node)
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SYNTAX_ERROR ("number must be 0 or 1");
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if (pragma_lex (&x) != CPP_EOF)
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warning (OPT_Wpragmas, "junk at end of #pragma longcall");
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rs6000_default_long_calls = (n == integer_one_node);
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}
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/* Handle defining many CPP flags based on TARGET_xxx. As a general
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policy, rather than trying to guess what flags a user might want a
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#define for, it's better to define a flag for everything. */
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#define builtin_define(TXT) cpp_define (pfile, TXT)
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#define builtin_assert(TXT) cpp_assert (pfile, TXT)
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/* Keep the AltiVec keywords handy for fast comparisons. */
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static GTY(()) tree __vector_keyword;
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static GTY(()) tree vector_keyword;
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static GTY(()) tree __pixel_keyword;
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static GTY(()) tree pixel_keyword;
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static GTY(()) tree __bool_keyword;
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static GTY(()) tree bool_keyword;
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static GTY(()) tree _Bool_keyword;
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/* Preserved across calls. */
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static tree expand_bool_pixel;
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static cpp_hashnode *
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altivec_categorize_keyword (const cpp_token *tok)
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{
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if (tok->type == CPP_NAME)
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{
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cpp_hashnode *ident = tok->val.node.node;
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if (ident == C_CPP_HASHNODE (vector_keyword))
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return C_CPP_HASHNODE (__vector_keyword);
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if (ident == C_CPP_HASHNODE (pixel_keyword))
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return C_CPP_HASHNODE (__pixel_keyword);
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if (ident == C_CPP_HASHNODE (bool_keyword))
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return C_CPP_HASHNODE (__bool_keyword);
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if (ident == C_CPP_HASHNODE (_Bool_keyword))
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return C_CPP_HASHNODE (__bool_keyword);
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return ident;
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}
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return 0;
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}
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static void
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init_vector_keywords (void)
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{
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/* Keywords without two leading underscores are context-sensitive,
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and hence implemented as conditional macros, controlled by the
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rs6000_macro_to_expand() function below. */
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__vector_keyword = get_identifier ("__vector");
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C_CPP_HASHNODE (__vector_keyword)->flags |= NODE_CONDITIONAL;
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__pixel_keyword = get_identifier ("__pixel");
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C_CPP_HASHNODE (__pixel_keyword)->flags |= NODE_CONDITIONAL;
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__bool_keyword = get_identifier ("__bool");
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C_CPP_HASHNODE (__bool_keyword)->flags |= NODE_CONDITIONAL;
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vector_keyword = get_identifier ("vector");
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C_CPP_HASHNODE (vector_keyword)->flags |= NODE_CONDITIONAL;
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pixel_keyword = get_identifier ("pixel");
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C_CPP_HASHNODE (pixel_keyword)->flags |= NODE_CONDITIONAL;
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bool_keyword = get_identifier ("bool");
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C_CPP_HASHNODE (bool_keyword)->flags |= NODE_CONDITIONAL;
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_Bool_keyword = get_identifier ("_Bool");
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C_CPP_HASHNODE (_Bool_keyword)->flags |= NODE_CONDITIONAL;
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}
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/* Called to decide whether a conditional macro should be expanded.
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Since we have exactly one such macro (i.e, 'vector'), we do not
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need to examine the 'tok' parameter. */
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static cpp_hashnode *
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rs6000_macro_to_expand (cpp_reader *pfile, const cpp_token *tok)
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{
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cpp_hashnode *expand_this = tok->val.node.node;
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cpp_hashnode *ident;
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/* If the current machine does not have altivec, don't look for the
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keywords. */
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if (!TARGET_ALTIVEC)
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return NULL;
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ident = altivec_categorize_keyword (tok);
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if (ident != expand_this)
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expand_this = NULL;
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if (ident == C_CPP_HASHNODE (__vector_keyword))
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{
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int idx = 0;
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do
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tok = cpp_peek_token (pfile, idx++);
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while (tok->type == CPP_PADDING);
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ident = altivec_categorize_keyword (tok);
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if (ident == C_CPP_HASHNODE (__pixel_keyword))
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{
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expand_this = C_CPP_HASHNODE (__vector_keyword);
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expand_bool_pixel = __pixel_keyword;
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}
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else if (ident == C_CPP_HASHNODE (__bool_keyword))
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{
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expand_this = C_CPP_HASHNODE (__vector_keyword);
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expand_bool_pixel = __bool_keyword;
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}
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/* The boost libraries have code with Iterator::vector vector in it. If
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we allow the normal handling, this module will be called recursively,
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and the vector will be skipped.; */
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else if (ident && (ident != C_CPP_HASHNODE (__vector_keyword)))
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{
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enum rid rid_code = (enum rid)(ident->rid_code);
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if (ident->type == NT_MACRO)
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{
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do
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(void) cpp_get_token (pfile);
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while (--idx > 0);
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do
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tok = cpp_peek_token (pfile, idx++);
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while (tok->type == CPP_PADDING);
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ident = altivec_categorize_keyword (tok);
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if (ident == C_CPP_HASHNODE (__pixel_keyword))
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{
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expand_this = C_CPP_HASHNODE (__vector_keyword);
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expand_bool_pixel = __pixel_keyword;
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rid_code = RID_MAX;
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}
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else if (ident == C_CPP_HASHNODE (__bool_keyword))
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{
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expand_this = C_CPP_HASHNODE (__vector_keyword);
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expand_bool_pixel = __bool_keyword;
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rid_code = RID_MAX;
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}
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else if (ident)
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rid_code = (enum rid)(ident->rid_code);
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}
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if (rid_code == RID_UNSIGNED || rid_code == RID_LONG
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|| rid_code == RID_SHORT || rid_code == RID_SIGNED
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|| rid_code == RID_INT || rid_code == RID_CHAR
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|| rid_code == RID_FLOAT
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|| (rid_code == RID_DOUBLE && TARGET_VSX))
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{
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expand_this = C_CPP_HASHNODE (__vector_keyword);
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/* If the next keyword is bool or pixel, it
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will need to be expanded as well. */
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do
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tok = cpp_peek_token (pfile, idx++);
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while (tok->type == CPP_PADDING);
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ident = altivec_categorize_keyword (tok);
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if (ident == C_CPP_HASHNODE (__pixel_keyword))
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expand_bool_pixel = __pixel_keyword;
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else if (ident == C_CPP_HASHNODE (__bool_keyword))
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expand_bool_pixel = __bool_keyword;
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else
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{
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/* Try two tokens down, too. */
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do
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tok = cpp_peek_token (pfile, idx++);
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while (tok->type == CPP_PADDING);
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ident = altivec_categorize_keyword (tok);
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if (ident == C_CPP_HASHNODE (__pixel_keyword))
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expand_bool_pixel = __pixel_keyword;
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else if (ident == C_CPP_HASHNODE (__bool_keyword))
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expand_bool_pixel = __bool_keyword;
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}
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}
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}
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}
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else if (expand_bool_pixel && ident == C_CPP_HASHNODE (__pixel_keyword))
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{
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expand_this = C_CPP_HASHNODE (__pixel_keyword);
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expand_bool_pixel = 0;
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}
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else if (expand_bool_pixel && ident == C_CPP_HASHNODE (__bool_keyword))
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{
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expand_this = C_CPP_HASHNODE (__bool_keyword);
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expand_bool_pixel = 0;
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}
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return expand_this;
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}
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/* Define or undefine a single macro. */
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static void
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rs6000_define_or_undefine_macro (bool define_p, const char *name)
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{
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if (TARGET_DEBUG_BUILTIN || TARGET_DEBUG_TARGET)
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fprintf (stderr, "#%s %s\n", (define_p) ? "define" : "undef", name);
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if (define_p)
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cpp_define (parse_in, name);
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else
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cpp_undef (parse_in, name);
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}
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/* Define or undefine macros based on the current target. If the user does
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#pragma GCC target, we need to adjust the macros dynamically. Note, some of
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the options needed for builtins have been moved to separate variables, so
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have both the target flags and the builtin flags as arguments. */
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void
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rs6000_target_modify_macros (bool define_p, int flags, unsigned bu_mask)
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{
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if (TARGET_DEBUG_BUILTIN || TARGET_DEBUG_TARGET)
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fprintf (stderr, "rs6000_target_modify_macros (%s, 0x%x, 0x%x)\n",
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(define_p) ? "define" : "undef",
|
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(unsigned) flags, bu_mask);
|
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/* target_flags based options. */
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if ((flags & MASK_POWER2) != 0)
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rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR2");
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else if ((flags & MASK_POWER) != 0)
|
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rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR");
|
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if ((flags & MASK_POWERPC) != 0)
|
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rs6000_define_or_undefine_macro (define_p, "_ARCH_PPC");
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if ((flags & MASK_PPC_GPOPT) != 0)
|
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rs6000_define_or_undefine_macro (define_p, "_ARCH_PPCSQ");
|
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if ((flags & MASK_PPC_GFXOPT) != 0)
|
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rs6000_define_or_undefine_macro (define_p, "_ARCH_PPCGR");
|
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if ((flags & MASK_POWERPC64) != 0)
|
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rs6000_define_or_undefine_macro (define_p, "_ARCH_PPC64");
|
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if ((flags & MASK_MFCRF) != 0)
|
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rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR4");
|
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if ((flags & MASK_POPCNTB) != 0)
|
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rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5");
|
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if ((flags & MASK_FPRND) != 0)
|
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rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5X");
|
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if ((flags & MASK_CMPB) != 0)
|
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rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6");
|
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if ((flags & MASK_MFPGPR) != 0)
|
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rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6X");
|
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if ((flags & MASK_POPCNTD) != 0)
|
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rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7");
|
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if ((flags & MASK_SOFT_FLOAT) != 0)
|
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rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
|
323 |
|
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if ((flags & MASK_RECIP_PRECISION) != 0)
|
324 |
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rs6000_define_or_undefine_macro (define_p, "__RECIP_PRECISION__");
|
325 |
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if ((flags & MASK_ALTIVEC) != 0)
|
326 |
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{
|
327 |
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const char *vec_str = (define_p) ? "__VEC__=10206" : "__VEC__";
|
328 |
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rs6000_define_or_undefine_macro (define_p, "__ALTIVEC__");
|
329 |
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rs6000_define_or_undefine_macro (define_p, vec_str);
|
330 |
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|
331 |
|
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/* Define this when supporting context-sensitive keywords. */
|
332 |
|
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if (!flag_iso)
|
333 |
|
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rs6000_define_or_undefine_macro (define_p, "__APPLE_ALTIVEC__");
|
334 |
|
|
}
|
335 |
|
|
if ((flags & MASK_VSX) != 0)
|
336 |
|
|
rs6000_define_or_undefine_macro (define_p, "__VSX__");
|
337 |
|
|
|
338 |
|
|
/* options from the builtin masks. */
|
339 |
|
|
if ((bu_mask & RS6000_BTM_SPE) != 0)
|
340 |
|
|
rs6000_define_or_undefine_macro (define_p, "__SPE__");
|
341 |
|
|
if ((bu_mask & RS6000_BTM_PAIRED) != 0)
|
342 |
|
|
rs6000_define_or_undefine_macro (define_p, "__PAIRED__");
|
343 |
|
|
if ((bu_mask & RS6000_BTM_CELL) != 0)
|
344 |
|
|
rs6000_define_or_undefine_macro (define_p, "__PPU__");
|
345 |
|
|
}
|
346 |
|
|
|
347 |
|
|
void
|
348 |
|
|
rs6000_cpu_cpp_builtins (cpp_reader *pfile)
|
349 |
|
|
{
|
350 |
|
|
/* Define all of the common macros. */
|
351 |
|
|
rs6000_target_modify_macros (true, target_flags,
|
352 |
|
|
rs6000_builtin_mask_calculate ());
|
353 |
|
|
|
354 |
|
|
/* _ARCH_COM does not fit in the framework of target_modify_macros, so handle
|
355 |
|
|
it specially. */
|
356 |
|
|
if (! TARGET_POWER && ! TARGET_POWER2 && ! TARGET_POWERPC)
|
357 |
|
|
builtin_define ("_ARCH_COM");
|
358 |
|
|
if (TARGET_FRE)
|
359 |
|
|
builtin_define ("__RECIP__");
|
360 |
|
|
if (TARGET_FRES)
|
361 |
|
|
builtin_define ("__RECIPF__");
|
362 |
|
|
if (TARGET_FRSQRTE)
|
363 |
|
|
builtin_define ("__RSQRTE__");
|
364 |
|
|
if (TARGET_FRSQRTES)
|
365 |
|
|
builtin_define ("__RSQRTEF__");
|
366 |
|
|
|
367 |
|
|
if (TARGET_EXTRA_BUILTINS)
|
368 |
|
|
{
|
369 |
|
|
/* Define the AltiVec syntactic elements. */
|
370 |
|
|
builtin_define ("__vector=__attribute__((altivec(vector__)))");
|
371 |
|
|
builtin_define ("__pixel=__attribute__((altivec(pixel__))) unsigned short");
|
372 |
|
|
builtin_define ("__bool=__attribute__((altivec(bool__))) unsigned");
|
373 |
|
|
|
374 |
|
|
if (!flag_iso)
|
375 |
|
|
{
|
376 |
|
|
builtin_define ("vector=vector");
|
377 |
|
|
builtin_define ("pixel=pixel");
|
378 |
|
|
builtin_define ("bool=bool");
|
379 |
|
|
builtin_define ("_Bool=_Bool");
|
380 |
|
|
init_vector_keywords ();
|
381 |
|
|
|
382 |
|
|
/* Enable context-sensitive macros. */
|
383 |
|
|
cpp_get_callbacks (pfile)->macro_to_expand = rs6000_macro_to_expand;
|
384 |
|
|
}
|
385 |
|
|
}
|
386 |
|
|
if ((!(TARGET_HARD_FLOAT && (TARGET_FPRS || TARGET_E500_DOUBLE)))
|
387 |
|
|
||(TARGET_HARD_FLOAT && TARGET_FPRS && !TARGET_DOUBLE_FLOAT))
|
388 |
|
|
builtin_define ("_SOFT_DOUBLE");
|
389 |
|
|
/* Used by lwarx/stwcx. errata work-around. */
|
390 |
|
|
if (rs6000_cpu == PROCESSOR_PPC405)
|
391 |
|
|
builtin_define ("__PPC405__");
|
392 |
|
|
/* Used by libstdc++. */
|
393 |
|
|
if (TARGET_NO_LWSYNC)
|
394 |
|
|
builtin_define ("__NO_LWSYNC__");
|
395 |
|
|
|
396 |
|
|
if (TARGET_EXTRA_BUILTINS)
|
397 |
|
|
{
|
398 |
|
|
/* For the VSX builtin functions identical to Altivec functions, just map
|
399 |
|
|
the altivec builtin into the vsx version (the altivec functions
|
400 |
|
|
generate VSX code if -mvsx). */
|
401 |
|
|
builtin_define ("__builtin_vsx_xxland=__builtin_vec_and");
|
402 |
|
|
builtin_define ("__builtin_vsx_xxlandc=__builtin_vec_andc");
|
403 |
|
|
builtin_define ("__builtin_vsx_xxlnor=__builtin_vec_nor");
|
404 |
|
|
builtin_define ("__builtin_vsx_xxlor=__builtin_vec_or");
|
405 |
|
|
builtin_define ("__builtin_vsx_xxlxor=__builtin_vec_xor");
|
406 |
|
|
builtin_define ("__builtin_vsx_xxsel=__builtin_vec_sel");
|
407 |
|
|
builtin_define ("__builtin_vsx_vperm=__builtin_vec_perm");
|
408 |
|
|
|
409 |
|
|
/* Also map the a and m versions of the multiply/add instructions to the
|
410 |
|
|
builtin for people blindly going off the instruction manual. */
|
411 |
|
|
builtin_define ("__builtin_vsx_xvmaddadp=__builtin_vsx_xvmadddp");
|
412 |
|
|
builtin_define ("__builtin_vsx_xvmaddmdp=__builtin_vsx_xvmadddp");
|
413 |
|
|
builtin_define ("__builtin_vsx_xvmaddasp=__builtin_vsx_xvmaddsp");
|
414 |
|
|
builtin_define ("__builtin_vsx_xvmaddmsp=__builtin_vsx_xvmaddsp");
|
415 |
|
|
builtin_define ("__builtin_vsx_xvmsubadp=__builtin_vsx_xvmsubdp");
|
416 |
|
|
builtin_define ("__builtin_vsx_xvmsubmdp=__builtin_vsx_xvmsubdp");
|
417 |
|
|
builtin_define ("__builtin_vsx_xvmsubasp=__builtin_vsx_xvmsubsp");
|
418 |
|
|
builtin_define ("__builtin_vsx_xvmsubmsp=__builtin_vsx_xvmsubsp");
|
419 |
|
|
builtin_define ("__builtin_vsx_xvnmaddadp=__builtin_vsx_xvnmadddp");
|
420 |
|
|
builtin_define ("__builtin_vsx_xvnmaddmdp=__builtin_vsx_xvnmadddp");
|
421 |
|
|
builtin_define ("__builtin_vsx_xvnmaddasp=__builtin_vsx_xvnmaddsp");
|
422 |
|
|
builtin_define ("__builtin_vsx_xvnmaddmsp=__builtin_vsx_xvnmaddsp");
|
423 |
|
|
builtin_define ("__builtin_vsx_xvnmsubadp=__builtin_vsx_xvnmsubdp");
|
424 |
|
|
builtin_define ("__builtin_vsx_xvnmsubmdp=__builtin_vsx_xvnmsubdp");
|
425 |
|
|
builtin_define ("__builtin_vsx_xvnmsubasp=__builtin_vsx_xvnmsubsp");
|
426 |
|
|
builtin_define ("__builtin_vsx_xvnmsubmsp=__builtin_vsx_xvnmsubsp");
|
427 |
|
|
}
|
428 |
|
|
|
429 |
|
|
/* Tell users they can use __builtin_bswap{16,64}. */
|
430 |
|
|
builtin_define ("__HAVE_BSWAP__");
|
431 |
|
|
|
432 |
|
|
/* May be overridden by target configuration. */
|
433 |
|
|
RS6000_CPU_CPP_ENDIAN_BUILTINS();
|
434 |
|
|
|
435 |
|
|
if (TARGET_LONG_DOUBLE_128)
|
436 |
|
|
{
|
437 |
|
|
builtin_define ("__LONG_DOUBLE_128__");
|
438 |
|
|
builtin_define ("__LONGDOUBLE128");
|
439 |
|
|
}
|
440 |
|
|
|
441 |
|
|
switch (TARGET_CMODEL)
|
442 |
|
|
{
|
443 |
|
|
/* Deliberately omit __CMODEL_SMALL__ since that was the default
|
444 |
|
|
before --mcmodel support was added. */
|
445 |
|
|
case CMODEL_MEDIUM:
|
446 |
|
|
builtin_define ("__CMODEL_MEDIUM__");
|
447 |
|
|
break;
|
448 |
|
|
case CMODEL_LARGE:
|
449 |
|
|
builtin_define ("__CMODEL_LARGE__");
|
450 |
|
|
break;
|
451 |
|
|
default:
|
452 |
|
|
break;
|
453 |
|
|
}
|
454 |
|
|
|
455 |
|
|
switch (rs6000_current_abi)
|
456 |
|
|
{
|
457 |
|
|
case ABI_V4:
|
458 |
|
|
builtin_define ("_CALL_SYSV");
|
459 |
|
|
break;
|
460 |
|
|
case ABI_AIX:
|
461 |
|
|
builtin_define ("_CALL_AIXDESC");
|
462 |
|
|
builtin_define ("_CALL_AIX");
|
463 |
|
|
break;
|
464 |
|
|
case ABI_DARWIN:
|
465 |
|
|
builtin_define ("_CALL_DARWIN");
|
466 |
|
|
break;
|
467 |
|
|
default:
|
468 |
|
|
break;
|
469 |
|
|
}
|
470 |
|
|
|
471 |
|
|
/* Let the compiled code know if 'f' class registers will not be available. */
|
472 |
|
|
if (TARGET_SOFT_FLOAT || !TARGET_FPRS)
|
473 |
|
|
builtin_define ("__NO_FPRS__");
|
474 |
|
|
|
475 |
|
|
/* Generate defines for Xilinx FPU. */
|
476 |
|
|
if (rs6000_xilinx_fpu)
|
477 |
|
|
{
|
478 |
|
|
builtin_define ("_XFPU");
|
479 |
|
|
if (rs6000_single_float && ! rs6000_double_float)
|
480 |
|
|
{
|
481 |
|
|
if (rs6000_simple_fpu)
|
482 |
|
|
builtin_define ("_XFPU_SP_LITE");
|
483 |
|
|
else
|
484 |
|
|
builtin_define ("_XFPU_SP_FULL");
|
485 |
|
|
}
|
486 |
|
|
if (rs6000_double_float)
|
487 |
|
|
{
|
488 |
|
|
if (rs6000_simple_fpu)
|
489 |
|
|
builtin_define ("_XFPU_DP_LITE");
|
490 |
|
|
else
|
491 |
|
|
builtin_define ("_XFPU_DP_FULL");
|
492 |
|
|
}
|
493 |
|
|
}
|
494 |
|
|
}
|
495 |
|
|
|
496 |
|
|
|
497 |
|
|
struct altivec_builtin_types
|
498 |
|
|
{
|
499 |
|
|
enum rs6000_builtins code;
|
500 |
|
|
enum rs6000_builtins overloaded_code;
|
501 |
|
|
signed char ret_type;
|
502 |
|
|
signed char op1;
|
503 |
|
|
signed char op2;
|
504 |
|
|
signed char op3;
|
505 |
|
|
};
|
506 |
|
|
|
507 |
|
|
const struct altivec_builtin_types altivec_overloaded_builtins[] = {
|
508 |
|
|
/* Unary AltiVec/VSX builtins. */
|
509 |
|
|
{ ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V16QI,
|
510 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
|
511 |
|
|
{ ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V8HI,
|
512 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
|
513 |
|
|
{ ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V4SI,
|
514 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
|
515 |
|
|
{ ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V4SF,
|
516 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
|
517 |
|
|
{ ALTIVEC_BUILTIN_VEC_ABS, VSX_BUILTIN_XVABSDP,
|
518 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
|
519 |
|
|
{ ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V16QI,
|
520 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
|
521 |
|
|
{ ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V8HI,
|
522 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
|
523 |
|
|
{ ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V4SI,
|
524 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
|
525 |
|
|
{ ALTIVEC_BUILTIN_VEC_CEIL, ALTIVEC_BUILTIN_VRFIP,
|
526 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
|
527 |
|
|
{ ALTIVEC_BUILTIN_VEC_CEIL, VSX_BUILTIN_XVRDPIP,
|
528 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
|
529 |
|
|
{ ALTIVEC_BUILTIN_VEC_EXPTE, ALTIVEC_BUILTIN_VEXPTEFP,
|
530 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
|
531 |
|
|
{ ALTIVEC_BUILTIN_VEC_FLOOR, VSX_BUILTIN_XVRDPIM,
|
532 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
|
533 |
|
|
{ ALTIVEC_BUILTIN_VEC_FLOOR, ALTIVEC_BUILTIN_VRFIM,
|
534 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
|
535 |
|
|
{ ALTIVEC_BUILTIN_VEC_LOGE, ALTIVEC_BUILTIN_VLOGEFP,
|
536 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
|
537 |
|
|
{ ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
|
538 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SI, 0, 0 },
|
539 |
|
|
{ ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
|
540 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, 0, 0 },
|
541 |
|
|
{ ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
|
542 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V4SI, 0, 0 },
|
543 |
|
|
{ ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
|
544 |
|
|
RS6000_BTI_void, RS6000_BTI_V8HI, 0, 0 },
|
545 |
|
|
{ ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
|
546 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, 0, 0 },
|
547 |
|
|
{ ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
|
548 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V8HI, 0, 0 },
|
549 |
|
|
{ ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
|
550 |
|
|
RS6000_BTI_void, RS6000_BTI_pixel_V8HI, 0, 0 },
|
551 |
|
|
{ ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
|
552 |
|
|
RS6000_BTI_void, RS6000_BTI_V16QI, 0, 0 },
|
553 |
|
|
{ ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
|
554 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, 0, 0 },
|
555 |
|
|
{ ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR,
|
556 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V16QI, 0, 0 },
|
557 |
|
|
{ ALTIVEC_BUILTIN_VEC_RE, ALTIVEC_BUILTIN_VREFP,
|
558 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
|
559 |
|
|
{ ALTIVEC_BUILTIN_VEC_RE, VSX_BUILTIN_XVREDP,
|
560 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
|
561 |
|
|
{ ALTIVEC_BUILTIN_VEC_ROUND, ALTIVEC_BUILTIN_VRFIN,
|
562 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
|
563 |
|
|
{ ALTIVEC_BUILTIN_VEC_RECIP, ALTIVEC_BUILTIN_VRECIPFP,
|
564 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
565 |
|
|
{ ALTIVEC_BUILTIN_VEC_RECIP, VSX_BUILTIN_RECIP_V2DF,
|
566 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
567 |
|
|
{ ALTIVEC_BUILTIN_VEC_RSQRT, ALTIVEC_BUILTIN_VRSQRTFP,
|
568 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
|
569 |
|
|
{ ALTIVEC_BUILTIN_VEC_RSQRT, VSX_BUILTIN_RSQRT_2DF,
|
570 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
|
571 |
|
|
{ ALTIVEC_BUILTIN_VEC_RSQRTE, ALTIVEC_BUILTIN_VRSQRTEFP,
|
572 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
|
573 |
|
|
{ ALTIVEC_BUILTIN_VEC_RSQRTE, VSX_BUILTIN_XVRSQRTEDP,
|
574 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
|
575 |
|
|
{ ALTIVEC_BUILTIN_VEC_TRUNC, ALTIVEC_BUILTIN_VRFIZ,
|
576 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
|
577 |
|
|
{ ALTIVEC_BUILTIN_VEC_TRUNC, VSX_BUILTIN_XVRDPIZ,
|
578 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
|
579 |
|
|
{ ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSB,
|
580 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },
|
581 |
|
|
{ ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSB,
|
582 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
|
583 |
|
|
{ ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH,
|
584 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },
|
585 |
|
|
{ ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH,
|
586 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
|
587 |
|
|
{ ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHPX,
|
588 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 },
|
589 |
|
|
{ ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH,
|
590 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },
|
591 |
|
|
{ ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH,
|
592 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
|
593 |
|
|
{ ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX,
|
594 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 },
|
595 |
|
|
{ ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX,
|
596 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 },
|
597 |
|
|
{ ALTIVEC_BUILTIN_VEC_VUPKHSB, ALTIVEC_BUILTIN_VUPKHSB,
|
598 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },
|
599 |
|
|
{ ALTIVEC_BUILTIN_VEC_VUPKHSB, ALTIVEC_BUILTIN_VUPKHSB,
|
600 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
|
601 |
|
|
{ ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSB,
|
602 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },
|
603 |
|
|
{ ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSB,
|
604 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
|
605 |
|
|
{ ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLPX,
|
606 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 },
|
607 |
|
|
{ ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH,
|
608 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },
|
609 |
|
|
{ ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH,
|
610 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
|
611 |
|
|
{ ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX,
|
612 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 },
|
613 |
|
|
{ ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX,
|
614 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 },
|
615 |
|
|
{ ALTIVEC_BUILTIN_VEC_VUPKLSH, ALTIVEC_BUILTIN_VUPKLSH,
|
616 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },
|
617 |
|
|
{ ALTIVEC_BUILTIN_VEC_VUPKLSH, ALTIVEC_BUILTIN_VUPKLSH,
|
618 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
|
619 |
|
|
{ ALTIVEC_BUILTIN_VEC_VUPKLSB, ALTIVEC_BUILTIN_VUPKLSB,
|
620 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },
|
621 |
|
|
{ ALTIVEC_BUILTIN_VEC_VUPKLSB, ALTIVEC_BUILTIN_VUPKLSB,
|
622 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
|
623 |
|
|
|
624 |
|
|
/* Binary AltiVec/VSX builtins. */
|
625 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
|
626 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
|
627 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
|
628 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
629 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
|
630 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
631 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
|
632 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
633 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
|
634 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
635 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
|
636 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
637 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,
|
638 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
|
639 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,
|
640 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
641 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,
|
642 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
643 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,
|
644 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
645 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,
|
646 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
647 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,
|
648 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
649 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,
|
650 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
|
651 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,
|
652 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
653 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,
|
654 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
655 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,
|
656 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
657 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,
|
658 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
659 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,
|
660 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
661 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDFP,
|
662 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
663 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADD, VSX_BUILTIN_XVADDDP,
|
664 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
665 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDFP, ALTIVEC_BUILTIN_VADDFP,
|
666 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
667 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
|
668 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
669 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
|
670 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
671 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
|
672 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 },
|
673 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
|
674 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
675 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
|
676 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
|
677 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
|
678 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
679 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
|
680 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
681 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
|
682 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
683 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
|
684 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
685 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
|
686 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
687 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
|
688 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 },
|
689 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
|
690 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
691 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
|
692 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
|
693 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
|
694 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
695 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
|
696 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
697 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
|
698 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
699 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
|
700 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
701 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
|
702 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
703 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
|
704 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
|
705 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
|
706 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
707 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
|
708 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
|
709 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
|
710 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
711 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
|
712 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
713 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
|
714 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
715 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADDC, ALTIVEC_BUILTIN_VADDCUW,
|
716 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
717 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS,
|
718 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
719 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS,
|
720 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
721 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS,
|
722 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
723 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS,
|
724 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
|
725 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS,
|
726 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
727 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS,
|
728 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
729 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS,
|
730 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
731 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS,
|
732 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
733 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS,
|
734 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
735 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS,
|
736 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
|
737 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS,
|
738 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
739 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS,
|
740 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
741 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS,
|
742 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
743 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS,
|
744 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
745 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS,
|
746 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
747 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS,
|
748 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
|
749 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS,
|
750 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
751 |
|
|
{ ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS,
|
752 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
753 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS,
|
754 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
755 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS,
|
756 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
|
757 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS,
|
758 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
759 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS,
|
760 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
761 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS,
|
762 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 },
|
763 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS,
|
764 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
765 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS,
|
766 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
767 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS,
|
768 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
769 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS,
|
770 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
771 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS,
|
772 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
|
773 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS,
|
774 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
775 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS,
|
776 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
777 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS,
|
778 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 },
|
779 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS,
|
780 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
781 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS,
|
782 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
783 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS,
|
784 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
785 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS,
|
786 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
787 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS,
|
788 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
|
789 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS,
|
790 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
791 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS,
|
792 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
793 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS,
|
794 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
|
795 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS,
|
796 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
797 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS,
|
798 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
799 |
|
|
{ ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS,
|
800 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
801 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
802 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
803 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
804 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 },
|
805 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
806 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 },
|
807 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
808 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
809 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
810 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 },
|
811 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
812 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 },
|
813 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
814 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
815 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
816 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
|
817 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
818 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
819 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
820 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
821 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
822 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
823 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
824 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
825 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
826 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
827 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
828 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
829 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
830 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
|
831 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
832 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
833 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
834 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
835 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
836 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
837 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
838 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
839 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
840 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
841 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
842 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
|
843 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
844 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
845 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
846 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
847 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
848 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
849 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
850 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
851 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
852 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
853 |
|
|
{ ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND,
|
854 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
855 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
856 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
857 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
858 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 },
|
859 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
860 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 },
|
861 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
862 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
863 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
864 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 },
|
865 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
866 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 },
|
867 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
868 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
869 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
870 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
|
871 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
872 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
873 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
874 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
875 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
876 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
877 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
878 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
879 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
880 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
881 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
882 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
883 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
884 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
|
885 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
886 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
887 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
888 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
889 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
890 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
891 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
892 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
893 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
894 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
895 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
896 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
|
897 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
898 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
899 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
900 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
901 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
902 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
903 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
904 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
905 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
906 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
907 |
|
|
{ ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC,
|
908 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
909 |
|
|
{ ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGUB,
|
910 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
911 |
|
|
{ ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGSB,
|
912 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
913 |
|
|
{ ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGUH,
|
914 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
915 |
|
|
{ ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGSH,
|
916 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
917 |
|
|
{ ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGUW,
|
918 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
919 |
|
|
{ ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGSW,
|
920 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
921 |
|
|
{ ALTIVEC_BUILTIN_VEC_VAVGSW, ALTIVEC_BUILTIN_VAVGSW,
|
922 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
923 |
|
|
{ ALTIVEC_BUILTIN_VEC_VAVGUW, ALTIVEC_BUILTIN_VAVGUW,
|
924 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
925 |
|
|
{ ALTIVEC_BUILTIN_VEC_VAVGSH, ALTIVEC_BUILTIN_VAVGSH,
|
926 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
927 |
|
|
{ ALTIVEC_BUILTIN_VEC_VAVGUH, ALTIVEC_BUILTIN_VAVGUH,
|
928 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
929 |
|
|
{ ALTIVEC_BUILTIN_VEC_VAVGSB, ALTIVEC_BUILTIN_VAVGSB,
|
930 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
931 |
|
|
{ ALTIVEC_BUILTIN_VEC_VAVGUB, ALTIVEC_BUILTIN_VAVGUB,
|
932 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
933 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPB, ALTIVEC_BUILTIN_VCMPBFP,
|
934 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
935 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUB,
|
936 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
937 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUB,
|
938 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
939 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUH,
|
940 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
941 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUH,
|
942 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
943 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUW,
|
944 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
945 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUW,
|
946 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
947 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQFP,
|
948 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
949 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPEQ, VSX_BUILTIN_XVCMPEQDP,
|
950 |
|
|
RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
951 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQFP, ALTIVEC_BUILTIN_VCMPEQFP,
|
952 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
953 |
|
|
|
954 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW,
|
955 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
956 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW,
|
957 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
958 |
|
|
|
959 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH,
|
960 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
961 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH,
|
962 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
963 |
|
|
|
964 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB,
|
965 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
966 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB,
|
967 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
968 |
|
|
|
969 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPGE, ALTIVEC_BUILTIN_VCMPGEFP,
|
970 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
971 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_XVCMPGEDP,
|
972 |
|
|
RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
973 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUB,
|
974 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
975 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSB,
|
976 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
977 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUH,
|
978 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
979 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSH,
|
980 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
981 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUW,
|
982 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
983 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSW,
|
984 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
985 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTFP,
|
986 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
987 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPGT, VSX_BUILTIN_XVCMPGTDP,
|
988 |
|
|
RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
989 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGTFP, ALTIVEC_BUILTIN_VCMPGTFP,
|
990 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
991 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGTSW, ALTIVEC_BUILTIN_VCMPGTSW,
|
992 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
993 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGTSW, ALTIVEC_BUILTIN_VCMPGTSW,
|
994 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
995 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGTUW, ALTIVEC_BUILTIN_VCMPGTUW,
|
996 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
997 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGTUW, ALTIVEC_BUILTIN_VCMPGTUW,
|
998 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
999 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGTSH, ALTIVEC_BUILTIN_VCMPGTSH,
|
1000 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1001 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGTSH, ALTIVEC_BUILTIN_VCMPGTSH,
|
1002 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1003 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGTUH, ALTIVEC_BUILTIN_VCMPGTUH,
|
1004 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1005 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGTUH, ALTIVEC_BUILTIN_VCMPGTUH,
|
1006 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1007 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGTSB, ALTIVEC_BUILTIN_VCMPGTSB,
|
1008 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
1009 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGTSB, ALTIVEC_BUILTIN_VCMPGTSB,
|
1010 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
1011 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGTUB, ALTIVEC_BUILTIN_VCMPGTUB,
|
1012 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1013 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGTUB, ALTIVEC_BUILTIN_VCMPGTUB,
|
1014 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1015 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPLE, ALTIVEC_BUILTIN_VCMPGEFP,
|
1016 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
1017 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_XVCMPGEDP,
|
1018 |
|
|
RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
1019 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTUB,
|
1020 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1021 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSB,
|
1022 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
1023 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTUH,
|
1024 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1025 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSH,
|
1026 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1027 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTUW,
|
1028 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1029 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSW,
|
1030 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
1031 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTFP,
|
1032 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
1033 |
|
|
{ ALTIVEC_BUILTIN_VEC_CMPLT, VSX_BUILTIN_XVCMPGTDP,
|
1034 |
|
|
RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
1035 |
|
|
{ ALTIVEC_BUILTIN_VEC_COPYSIGN, VSX_BUILTIN_CPSGNDP,
|
1036 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
1037 |
|
|
{ ALTIVEC_BUILTIN_VEC_COPYSIGN, ALTIVEC_BUILTIN_COPYSIGN_V4SF,
|
1038 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
1039 |
|
|
{ ALTIVEC_BUILTIN_VEC_CTF, ALTIVEC_BUILTIN_VCFUX,
|
1040 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 },
|
1041 |
|
|
{ ALTIVEC_BUILTIN_VEC_CTF, ALTIVEC_BUILTIN_VCFSX,
|
1042 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 },
|
1043 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCFSX, ALTIVEC_BUILTIN_VCFSX,
|
1044 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 },
|
1045 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCFUX, ALTIVEC_BUILTIN_VCFUX,
|
1046 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 },
|
1047 |
|
|
{ ALTIVEC_BUILTIN_VEC_CTS, ALTIVEC_BUILTIN_VCTSXS,
|
1048 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 },
|
1049 |
|
|
{ ALTIVEC_BUILTIN_VEC_CTU, ALTIVEC_BUILTIN_VCTUXS,
|
1050 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 },
|
1051 |
|
|
{ VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_XVDIVSP,
|
1052 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
1053 |
|
|
{ VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_XVDIVDP,
|
1054 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
1055 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1056 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 },
|
1057 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1058 |
|
|
RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 },
|
1059 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1060 |
|
|
RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
|
1061 |
|
|
~RS6000_BTI_unsigned_V2DI, 0 },
|
1062 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1063 |
|
|
RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 },
|
1064 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1065 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },
|
1066 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1067 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
|
1068 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1069 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 },
|
1070 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1071 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },
|
1072 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1073 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
|
1074 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1075 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },
|
1076 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1077 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 },
|
1078 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1079 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
|
1080 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1081 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 },
|
1082 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1083 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 },
|
1084 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1085 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 },
|
1086 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1087 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },
|
1088 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1089 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
|
1090 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1091 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 },
|
1092 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1093 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
|
1094 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1095 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 },
|
1096 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1097 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },
|
1098 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1099 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
|
1100 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1101 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 },
|
1102 |
|
|
{ ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX,
|
1103 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
|
1104 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEBX,
|
1105 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
|
1106 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEBX,
|
1107 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
|
1108 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEHX,
|
1109 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
|
1110 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEHX,
|
1111 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
|
1112 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX,
|
1113 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
|
1114 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX,
|
1115 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
|
1116 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX,
|
1117 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
|
1118 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX,
|
1119 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },
|
1120 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX,
|
1121 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 },
|
1122 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX,
|
1123 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
|
1124 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX,
|
1125 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
|
1126 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX,
|
1127 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
|
1128 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX,
|
1129 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },
|
1130 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX,
|
1131 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 },
|
1132 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVEHX, ALTIVEC_BUILTIN_LVEHX,
|
1133 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
|
1134 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVEHX, ALTIVEC_BUILTIN_LVEHX,
|
1135 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
|
1136 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVEBX, ALTIVEC_BUILTIN_LVEBX,
|
1137 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
|
1138 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVEBX, ALTIVEC_BUILTIN_LVEBX,
|
1139 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
|
1140 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1141 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },
|
1142 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1143 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
|
1144 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1145 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 },
|
1146 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1147 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },
|
1148 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1149 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
|
1150 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1151 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },
|
1152 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1153 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 },
|
1154 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1155 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
|
1156 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1157 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 },
|
1158 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1159 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 },
|
1160 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1161 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 },
|
1162 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1163 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },
|
1164 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1165 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
|
1166 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1167 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 },
|
1168 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1169 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
|
1170 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1171 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 },
|
1172 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1173 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },
|
1174 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1175 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
|
1176 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1177 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI,
|
1178 |
|
|
~RS6000_BTI_unsigned_V16QI, 0 },
|
1179 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1180 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
|
1181 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1182 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 },
|
1183 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1184 |
|
|
RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 },
|
1185 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1186 |
|
|
RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
|
1187 |
|
|
~RS6000_BTI_unsigned_V2DI, 0 },
|
1188 |
|
|
{ ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL,
|
1189 |
|
|
RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 },
|
1190 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
|
1191 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
|
1192 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
|
1193 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
|
1194 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
|
1195 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
|
1196 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
|
1197 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
|
1198 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
|
1199 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
|
1200 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
|
1201 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
|
1202 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
|
1203 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 },
|
1204 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
|
1205 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },
|
1206 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
|
1207 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
|
1208 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
|
1209 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 },
|
1210 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
|
1211 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 },
|
1212 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
|
1213 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 },
|
1214 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
|
1215 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 },
|
1216 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
|
1217 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI,
|
1218 |
|
|
~RS6000_BTI_unsigned_long_long, 0 },
|
1219 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
|
1220 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
|
1221 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
|
1222 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
|
1223 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
|
1224 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
|
1225 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
|
1226 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
|
1227 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
|
1228 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
|
1229 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
|
1230 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
|
1231 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
|
1232 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 },
|
1233 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
|
1234 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },
|
1235 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
|
1236 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
|
1237 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
|
1238 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 },
|
1239 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
|
1240 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 },
|
1241 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
|
1242 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 },
|
1243 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
|
1244 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 },
|
1245 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
|
1246 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI,
|
1247 |
|
|
~RS6000_BTI_unsigned_long_long, 0 },
|
1248 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
|
1249 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },
|
1250 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
|
1251 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
|
1252 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
|
1253 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 },
|
1254 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
|
1255 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },
|
1256 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
|
1257 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
|
1258 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
|
1259 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 },
|
1260 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
|
1261 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
|
1262 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
|
1263 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 },
|
1264 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
|
1265 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 },
|
1266 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
|
1267 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },
|
1268 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
|
1269 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
|
1270 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
|
1271 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 },
|
1272 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
|
1273 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
|
1274 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
|
1275 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 },
|
1276 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
|
1277 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },
|
1278 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
|
1279 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
|
1280 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
|
1281 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 },
|
1282 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX,
|
1283 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
|
1284 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
|
1285 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },
|
1286 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
|
1287 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
|
1288 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
|
1289 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 },
|
1290 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
|
1291 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },
|
1292 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
|
1293 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
|
1294 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
|
1295 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 },
|
1296 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
|
1297 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
|
1298 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
|
1299 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 },
|
1300 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
|
1301 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 },
|
1302 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
|
1303 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },
|
1304 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
|
1305 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
|
1306 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
|
1307 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 },
|
1308 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
|
1309 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
|
1310 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
|
1311 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 },
|
1312 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
|
1313 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },
|
1314 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
|
1315 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
|
1316 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
|
1317 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 },
|
1318 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL,
|
1319 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
|
1320 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
|
1321 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },
|
1322 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
|
1323 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
|
1324 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
|
1325 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 },
|
1326 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
|
1327 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },
|
1328 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
|
1329 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
|
1330 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
|
1331 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 },
|
1332 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
|
1333 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
|
1334 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
|
1335 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 },
|
1336 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
|
1337 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 },
|
1338 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
|
1339 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },
|
1340 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
|
1341 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
|
1342 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
|
1343 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 },
|
1344 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
|
1345 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
|
1346 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
|
1347 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 },
|
1348 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
|
1349 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },
|
1350 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
|
1351 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
|
1352 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
|
1353 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 },
|
1354 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX,
|
1355 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
|
1356 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
|
1357 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },
|
1358 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
|
1359 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
|
1360 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
|
1361 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 },
|
1362 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
|
1363 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },
|
1364 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
|
1365 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
|
1366 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
|
1367 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 },
|
1368 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
|
1369 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
|
1370 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
|
1371 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 },
|
1372 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
|
1373 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 },
|
1374 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
|
1375 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },
|
1376 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
|
1377 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
|
1378 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
|
1379 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 },
|
1380 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
|
1381 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
|
1382 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
|
1383 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 },
|
1384 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
|
1385 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },
|
1386 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
|
1387 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
|
1388 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
|
1389 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 },
|
1390 |
|
|
{ ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
|
1391 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
|
1392 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB,
|
1393 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1394 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB,
|
1395 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
1396 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB,
|
1397 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1398 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB,
|
1399 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
|
1400 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB,
|
1401 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
1402 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB,
|
1403 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
1404 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH,
|
1405 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1406 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH,
|
1407 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
1408 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH,
|
1409 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1410 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH,
|
1411 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
|
1412 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH,
|
1413 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
1414 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH,
|
1415 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1416 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW,
|
1417 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1418 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW,
|
1419 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
1420 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW,
|
1421 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1422 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW,
|
1423 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
|
1424 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW,
|
1425 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
1426 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW,
|
1427 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
1428 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXFP,
|
1429 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
1430 |
|
|
{ ALTIVEC_BUILTIN_VEC_MAX, VSX_BUILTIN_XVMAXDP,
|
1431 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
1432 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXFP, ALTIVEC_BUILTIN_VMAXFP,
|
1433 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
1434 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXSW, ALTIVEC_BUILTIN_VMAXSW,
|
1435 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
1436 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXSW, ALTIVEC_BUILTIN_VMAXSW,
|
1437 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
|
1438 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXSW, ALTIVEC_BUILTIN_VMAXSW,
|
1439 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
1440 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW,
|
1441 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1442 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW,
|
1443 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 },
|
1444 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW,
|
1445 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1446 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW,
|
1447 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1448 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW,
|
1449 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
1450 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXSH, ALTIVEC_BUILTIN_VMAXSH,
|
1451 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1452 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXSH, ALTIVEC_BUILTIN_VMAXSH,
|
1453 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
|
1454 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXSH, ALTIVEC_BUILTIN_VMAXSH,
|
1455 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
1456 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH,
|
1457 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1458 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH,
|
1459 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 },
|
1460 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH,
|
1461 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1462 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH,
|
1463 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1464 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH,
|
1465 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
1466 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXSB, ALTIVEC_BUILTIN_VMAXSB,
|
1467 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
1468 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXSB, ALTIVEC_BUILTIN_VMAXSB,
|
1469 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
|
1470 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXSB, ALTIVEC_BUILTIN_VMAXSB,
|
1471 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
1472 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB,
|
1473 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1474 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB,
|
1475 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
|
1476 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB,
|
1477 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1478 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB,
|
1479 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1480 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB,
|
1481 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
1482 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHB,
|
1483 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
1484 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHB,
|
1485 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
1486 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHB,
|
1487 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1488 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH,
|
1489 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
1490 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH,
|
1491 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 },
|
1492 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH,
|
1493 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1494 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH,
|
1495 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1496 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW,
|
1497 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
1498 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW,
|
1499 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
1500 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW,
|
1501 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
1502 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW,
|
1503 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1504 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DF,
|
1505 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
1506 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI,
|
1507 |
|
|
RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
|
1508 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW,
|
1509 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
1510 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW,
|
1511 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
1512 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW,
|
1513 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1514 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW,
|
1515 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
1516 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH,
|
1517 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
1518 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH,
|
1519 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 },
|
1520 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH,
|
1521 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1522 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH,
|
1523 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1524 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGHB, ALTIVEC_BUILTIN_VMRGHB,
|
1525 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
1526 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGHB, ALTIVEC_BUILTIN_VMRGHB,
|
1527 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1528 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGHB, ALTIVEC_BUILTIN_VMRGHB,
|
1529 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
1530 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLB,
|
1531 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
1532 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLB,
|
1533 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
1534 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLB,
|
1535 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1536 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH,
|
1537 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
1538 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH,
|
1539 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 },
|
1540 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH,
|
1541 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1542 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH,
|
1543 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1544 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW,
|
1545 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
1546 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW,
|
1547 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
1548 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW,
|
1549 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
1550 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW,
|
1551 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1552 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DF,
|
1553 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
1554 |
|
|
{ ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI,
|
1555 |
|
|
RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
|
1556 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW,
|
1557 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
1558 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW,
|
1559 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
1560 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW,
|
1561 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1562 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW,
|
1563 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
1564 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH,
|
1565 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
1566 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH,
|
1567 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 },
|
1568 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH,
|
1569 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1570 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH,
|
1571 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1572 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGLB, ALTIVEC_BUILTIN_VMRGLB,
|
1573 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
1574 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGLB, ALTIVEC_BUILTIN_VMRGLB,
|
1575 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1576 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMRGLB, ALTIVEC_BUILTIN_VMRGLB,
|
1577 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
1578 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB,
|
1579 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1580 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB,
|
1581 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
1582 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB,
|
1583 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1584 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB,
|
1585 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
|
1586 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB,
|
1587 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
1588 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB,
|
1589 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
1590 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH,
|
1591 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1592 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH,
|
1593 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
1594 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH,
|
1595 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1596 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH,
|
1597 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
|
1598 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH,
|
1599 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
1600 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH,
|
1601 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1602 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW,
|
1603 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1604 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW,
|
1605 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
1606 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW,
|
1607 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1608 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW,
|
1609 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
|
1610 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW,
|
1611 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
1612 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW,
|
1613 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
1614 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINFP,
|
1615 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
1616 |
|
|
{ ALTIVEC_BUILTIN_VEC_MIN, VSX_BUILTIN_XVMINDP,
|
1617 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
1618 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINFP, ALTIVEC_BUILTIN_VMINFP,
|
1619 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
1620 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINSW, ALTIVEC_BUILTIN_VMINSW,
|
1621 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
1622 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINSW, ALTIVEC_BUILTIN_VMINSW,
|
1623 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
|
1624 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINSW, ALTIVEC_BUILTIN_VMINSW,
|
1625 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
1626 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW,
|
1627 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1628 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW,
|
1629 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 },
|
1630 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW,
|
1631 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1632 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW,
|
1633 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1634 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW,
|
1635 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
1636 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINSH, ALTIVEC_BUILTIN_VMINSH,
|
1637 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1638 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINSH, ALTIVEC_BUILTIN_VMINSH,
|
1639 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
|
1640 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINSH, ALTIVEC_BUILTIN_VMINSH,
|
1641 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
1642 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINSB, ALTIVEC_BUILTIN_VMINSB,
|
1643 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
|
1644 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINSB, ALTIVEC_BUILTIN_VMINSB,
|
1645 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
1646 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINSB, ALTIVEC_BUILTIN_VMINSB,
|
1647 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
1648 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH,
|
1649 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1650 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH,
|
1651 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 },
|
1652 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH,
|
1653 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1654 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH,
|
1655 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1656 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH,
|
1657 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
1658 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB,
|
1659 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1660 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB,
|
1661 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
|
1662 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB,
|
1663 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1664 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB,
|
1665 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1666 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB,
|
1667 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
1668 |
|
|
{ VSX_BUILTIN_VEC_MUL, VSX_BUILTIN_XVMULSP,
|
1669 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
1670 |
|
|
{ VSX_BUILTIN_VEC_MUL, VSX_BUILTIN_XVMULDP,
|
1671 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
1672 |
|
|
{ ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULEUB,
|
1673 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1674 |
|
|
{ ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESB,
|
1675 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
1676 |
|
|
{ ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULEUH,
|
1677 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1678 |
|
|
{ ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESH,
|
1679 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1680 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMULEUB, ALTIVEC_BUILTIN_VMULEUB,
|
1681 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1682 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMULESB, ALTIVEC_BUILTIN_VMULESB,
|
1683 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
1684 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMULEUH, ALTIVEC_BUILTIN_VMULEUH,
|
1685 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1686 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMULESH, ALTIVEC_BUILTIN_VMULESH,
|
1687 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1688 |
|
|
{ ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUB,
|
1689 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1690 |
|
|
{ ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSB,
|
1691 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
1692 |
|
|
{ ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUH,
|
1693 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1694 |
|
|
{ ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSH,
|
1695 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1696 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMULOSH, ALTIVEC_BUILTIN_VMULOSH,
|
1697 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1698 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMULOUH, ALTIVEC_BUILTIN_VMULOUH,
|
1699 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1700 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMULOSB, ALTIVEC_BUILTIN_VMULOSB,
|
1701 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
1702 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMULOUB, ALTIVEC_BUILTIN_VMULOUB,
|
1703 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1704 |
|
|
{ ALTIVEC_BUILTIN_VEC_NEARBYINT, VSX_BUILTIN_XVRDPI,
|
1705 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
|
1706 |
|
|
{ ALTIVEC_BUILTIN_VEC_NEARBYINT, VSX_BUILTIN_XVRSPI,
|
1707 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
|
1708 |
|
|
{ ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR,
|
1709 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
1710 |
|
|
{ ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR,
|
1711 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
1712 |
|
|
{ ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR,
|
1713 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
1714 |
|
|
{ ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR,
|
1715 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1716 |
|
|
{ ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR,
|
1717 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
1718 |
|
|
{ ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR,
|
1719 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1720 |
|
|
{ ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR,
|
1721 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1722 |
|
|
{ ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR,
|
1723 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
1724 |
|
|
{ ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR,
|
1725 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
1726 |
|
|
{ ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR,
|
1727 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1728 |
|
|
{ ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR,
|
1729 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
1730 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1731 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
1732 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1733 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 },
|
1734 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1735 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 },
|
1736 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1737 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
1738 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1739 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 },
|
1740 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1741 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 },
|
1742 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1743 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
1744 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1745 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
|
1746 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1747 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
1748 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1749 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
1750 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1751 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1752 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1753 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
1754 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1755 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1756 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1757 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
1758 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1759 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
|
1760 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1761 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
1762 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1763 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1764 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1765 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1766 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1767 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
1768 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1769 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1770 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1771 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
|
1772 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1773 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
1774 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1775 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
1776 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1777 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
1778 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1779 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1780 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1781 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
1782 |
|
|
{ ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR,
|
1783 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1784 |
|
|
{ ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUHUM,
|
1785 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1786 |
|
|
{ ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUHUM,
|
1787 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1788 |
|
|
{ ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUHUM,
|
1789 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
1790 |
|
|
{ ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM,
|
1791 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
1792 |
|
|
{ ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM,
|
1793 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1794 |
|
|
{ ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM,
|
1795 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
1796 |
|
|
{ ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM,
|
1797 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
1798 |
|
|
{ ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM,
|
1799 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1800 |
|
|
{ ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM,
|
1801 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
1802 |
|
|
{ ALTIVEC_BUILTIN_VEC_VPKUHUM, ALTIVEC_BUILTIN_VPKUHUM,
|
1803 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1804 |
|
|
{ ALTIVEC_BUILTIN_VEC_VPKUHUM, ALTIVEC_BUILTIN_VPKUHUM,
|
1805 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1806 |
|
|
{ ALTIVEC_BUILTIN_VEC_VPKUHUM, ALTIVEC_BUILTIN_VPKUHUM,
|
1807 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
1808 |
|
|
{ ALTIVEC_BUILTIN_VEC_PACKPX, ALTIVEC_BUILTIN_VPKPX,
|
1809 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1810 |
|
|
{ ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKUHUS,
|
1811 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1812 |
|
|
{ ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKSHSS,
|
1813 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1814 |
|
|
{ ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKUWUS,
|
1815 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1816 |
|
|
{ ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKSWSS,
|
1817 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
1818 |
|
|
{ ALTIVEC_BUILTIN_VEC_VPKSWSS, ALTIVEC_BUILTIN_VPKSWSS,
|
1819 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
1820 |
|
|
{ ALTIVEC_BUILTIN_VEC_VPKUWUS, ALTIVEC_BUILTIN_VPKUWUS,
|
1821 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1822 |
|
|
{ ALTIVEC_BUILTIN_VEC_VPKSHSS, ALTIVEC_BUILTIN_VPKSHSS,
|
1823 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1824 |
|
|
{ ALTIVEC_BUILTIN_VEC_VPKUHUS, ALTIVEC_BUILTIN_VPKUHUS,
|
1825 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1826 |
|
|
{ ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKUHUS,
|
1827 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1828 |
|
|
{ ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKSHUS,
|
1829 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1830 |
|
|
{ ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKUWUS,
|
1831 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1832 |
|
|
{ ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKSWUS,
|
1833 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
1834 |
|
|
{ ALTIVEC_BUILTIN_VEC_VPKSWUS, ALTIVEC_BUILTIN_VPKSWUS,
|
1835 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
1836 |
|
|
{ ALTIVEC_BUILTIN_VEC_VPKSHUS, ALTIVEC_BUILTIN_VPKSHUS,
|
1837 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
1838 |
|
|
{ ALTIVEC_BUILTIN_VEC_RINT, VSX_BUILTIN_XVRDPIC,
|
1839 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
|
1840 |
|
|
{ ALTIVEC_BUILTIN_VEC_RINT, VSX_BUILTIN_XVRSPIC,
|
1841 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
|
1842 |
|
|
{ ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLB,
|
1843 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1844 |
|
|
{ ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLB,
|
1845 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1846 |
|
|
{ ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLH,
|
1847 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1848 |
|
|
{ ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLH,
|
1849 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1850 |
|
|
{ ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLW,
|
1851 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1852 |
|
|
{ ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLW,
|
1853 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1854 |
|
|
{ ALTIVEC_BUILTIN_VEC_VRLW, ALTIVEC_BUILTIN_VRLW,
|
1855 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1856 |
|
|
{ ALTIVEC_BUILTIN_VEC_VRLW, ALTIVEC_BUILTIN_VRLW,
|
1857 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1858 |
|
|
{ ALTIVEC_BUILTIN_VEC_VRLH, ALTIVEC_BUILTIN_VRLH,
|
1859 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1860 |
|
|
{ ALTIVEC_BUILTIN_VEC_VRLH, ALTIVEC_BUILTIN_VRLH,
|
1861 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1862 |
|
|
{ ALTIVEC_BUILTIN_VEC_VRLB, ALTIVEC_BUILTIN_VRLB,
|
1863 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1864 |
|
|
{ ALTIVEC_BUILTIN_VEC_VRLB, ALTIVEC_BUILTIN_VRLB,
|
1865 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1866 |
|
|
{ ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLB,
|
1867 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1868 |
|
|
{ ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLB,
|
1869 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1870 |
|
|
{ ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLH,
|
1871 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1872 |
|
|
{ ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLH,
|
1873 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1874 |
|
|
{ ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLW,
|
1875 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1876 |
|
|
{ ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLW,
|
1877 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1878 |
|
|
{ ALTIVEC_BUILTIN_VEC_SQRT, VSX_BUILTIN_XVSQRTDP,
|
1879 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
|
1880 |
|
|
{ ALTIVEC_BUILTIN_VEC_SQRT, VSX_BUILTIN_XVSQRTSP,
|
1881 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
|
1882 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSLW, ALTIVEC_BUILTIN_VSLW,
|
1883 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1884 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSLW, ALTIVEC_BUILTIN_VSLW,
|
1885 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1886 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSLH, ALTIVEC_BUILTIN_VSLH,
|
1887 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1888 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSLH, ALTIVEC_BUILTIN_VSLH,
|
1889 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1890 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSLB, ALTIVEC_BUILTIN_VSLB,
|
1891 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1892 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSLB, ALTIVEC_BUILTIN_VSLB,
|
1893 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1894 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1895 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1896 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1897 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V8HI, 0 },
|
1898 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1899 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
|
1900 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1901 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1902 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1903 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0 },
|
1904 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1905 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
|
1906 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1907 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
1908 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1909 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V8HI, 0 },
|
1910 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1911 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
|
1912 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1913 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
|
1914 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1915 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1916 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1917 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
|
1918 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1919 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
|
1920 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1921 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1922 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1923 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
|
1924 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1925 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
|
1926 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1927 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1928 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1929 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
|
1930 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1931 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
|
1932 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1933 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
1934 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1935 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
|
1936 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1937 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
|
1938 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1939 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V8HI, 0 },
|
1940 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1941 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1942 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1943 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
|
1944 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1945 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, 0 },
|
1946 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1947 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1948 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1949 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
|
1950 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1951 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V8HI, 0 },
|
1952 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
|
1953 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1954 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
|
1955 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V16QI, 0 },
|
1956 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
|
1957 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V16QI, 0 },
|
1958 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
|
1959 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V16QI, 0 },
|
1960 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
|
1961 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
|
1962 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
|
1963 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V16QI, 0 },
|
1964 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
|
1965 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
|
1966 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
|
1967 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0 },
|
1968 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
|
1969 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
|
1970 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
|
1971 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V16QI, 0 },
|
1972 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
|
1973 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
|
1974 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
|
1975 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_V16QI, 0 },
|
1976 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
|
1977 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
|
1978 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
|
1979 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
1980 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
|
1981 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1982 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
|
1983 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
|
1984 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
|
1985 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
1986 |
|
|
{ ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB,
|
1987 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI, 0 },
|
1988 |
|
|
{ ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB,
|
1989 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, 0 },
|
1990 |
|
|
{ ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB,
|
1991 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, 0 },
|
1992 |
|
|
{ ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH,
|
1993 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI, 0 },
|
1994 |
|
|
{ ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH,
|
1995 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, 0 },
|
1996 |
|
|
{ ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH,
|
1997 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, 0 },
|
1998 |
|
|
{ ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH,
|
1999 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, 0 },
|
2000 |
|
|
{ ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW,
|
2001 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 },
|
2002 |
|
|
{ ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW,
|
2003 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 },
|
2004 |
|
|
{ ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW,
|
2005 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 },
|
2006 |
|
|
{ ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW,
|
2007 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, 0 },
|
2008 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW,
|
2009 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 },
|
2010 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW,
|
2011 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 },
|
2012 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW,
|
2013 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 },
|
2014 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW,
|
2015 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, 0 },
|
2016 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH,
|
2017 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI, 0 },
|
2018 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH,
|
2019 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, 0 },
|
2020 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH,
|
2021 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, 0 },
|
2022 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH,
|
2023 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, 0 },
|
2024 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSPLTB, ALTIVEC_BUILTIN_VSPLTB,
|
2025 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI, 0 },
|
2026 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSPLTB, ALTIVEC_BUILTIN_VSPLTB,
|
2027 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, 0 },
|
2028 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSPLTB, ALTIVEC_BUILTIN_VSPLTB,
|
2029 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, 0 },
|
2030 |
|
|
{ ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRB,
|
2031 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2032 |
|
|
{ ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRB,
|
2033 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2034 |
|
|
{ ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRH,
|
2035 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2036 |
|
|
{ ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRH,
|
2037 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2038 |
|
|
{ ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRW,
|
2039 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2040 |
|
|
{ ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRW,
|
2041 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2042 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSRW, ALTIVEC_BUILTIN_VSRW,
|
2043 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2044 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSRW, ALTIVEC_BUILTIN_VSRW,
|
2045 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2046 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSRH, ALTIVEC_BUILTIN_VSRH,
|
2047 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2048 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSRH, ALTIVEC_BUILTIN_VSRH,
|
2049 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2050 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSRB, ALTIVEC_BUILTIN_VSRB,
|
2051 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2052 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSRB, ALTIVEC_BUILTIN_VSRB,
|
2053 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2054 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAB,
|
2055 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2056 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAB,
|
2057 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2058 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAH,
|
2059 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2060 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAH,
|
2061 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2062 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAW,
|
2063 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2064 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAW,
|
2065 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2066 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW,
|
2067 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2068 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW,
|
2069 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2070 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSRAH, ALTIVEC_BUILTIN_VSRAH,
|
2071 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2072 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSRAH, ALTIVEC_BUILTIN_VSRAH,
|
2073 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2074 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSRAB, ALTIVEC_BUILTIN_VSRAB,
|
2075 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2076 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSRAB, ALTIVEC_BUILTIN_VSRAB,
|
2077 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2078 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2079 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2080 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2081 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V8HI, 0 },
|
2082 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2083 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
|
2084 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2085 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2086 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2087 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0 },
|
2088 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2089 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
|
2090 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2091 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2092 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2093 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V8HI, 0 },
|
2094 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2095 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
|
2096 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2097 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
|
2098 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2099 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2100 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2101 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
|
2102 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2103 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
|
2104 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2105 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2106 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2107 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
|
2108 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2109 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
|
2110 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2111 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2112 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2113 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
|
2114 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2115 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
|
2116 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2117 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2118 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2119 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
|
2120 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2121 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
|
2122 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2123 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V8HI, 0 },
|
2124 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2125 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2126 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2127 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
|
2128 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2129 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, 0 },
|
2130 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2131 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2132 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2133 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
|
2134 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2135 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V8HI, 0 },
|
2136 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
|
2137 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2138 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
|
2139 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V16QI, 0 },
|
2140 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
|
2141 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V16QI, 0 },
|
2142 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
|
2143 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V16QI, 0 },
|
2144 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
|
2145 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
|
2146 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
|
2147 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V16QI, 0 },
|
2148 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
|
2149 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
|
2150 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
|
2151 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0 },
|
2152 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
|
2153 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
|
2154 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
|
2155 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V16QI, 0 },
|
2156 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
|
2157 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
|
2158 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
|
2159 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_V16QI, 0 },
|
2160 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
|
2161 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
|
2162 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
|
2163 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
2164 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
|
2165 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2166 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
|
2167 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
|
2168 |
|
|
{ ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
|
2169 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2170 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM,
|
2171 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
|
2172 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM,
|
2173 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
2174 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM,
|
2175 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
2176 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM,
|
2177 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2178 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM,
|
2179 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
2180 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM,
|
2181 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2182 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM,
|
2183 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
|
2184 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM,
|
2185 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
2186 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM,
|
2187 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
2188 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM,
|
2189 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2190 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM,
|
2191 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
2192 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM,
|
2193 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2194 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM,
|
2195 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
|
2196 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM,
|
2197 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
2198 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM,
|
2199 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
2200 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM,
|
2201 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2202 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM,
|
2203 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
2204 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM,
|
2205 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2206 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBFP,
|
2207 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
2208 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUB, VSX_BUILTIN_XVSUBDP,
|
2209 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
2210 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBFP, ALTIVEC_BUILTIN_VSUBFP,
|
2211 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
2212 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM,
|
2213 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
|
2214 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM,
|
2215 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
2216 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM,
|
2217 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2218 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM,
|
2219 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
2220 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM,
|
2221 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
2222 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM,
|
2223 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2224 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM,
|
2225 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 },
|
2226 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM,
|
2227 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2228 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM,
|
2229 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
2230 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM,
|
2231 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2232 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM,
|
2233 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 },
|
2234 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM,
|
2235 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2236 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM,
|
2237 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
|
2238 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM,
|
2239 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
2240 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM,
|
2241 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2242 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM,
|
2243 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
2244 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM,
|
2245 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
2246 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM,
|
2247 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2248 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM,
|
2249 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
|
2250 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM,
|
2251 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2252 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM,
|
2253 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
|
2254 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM,
|
2255 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
2256 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM,
|
2257 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2258 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM,
|
2259 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
2260 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUBC, ALTIVEC_BUILTIN_VSUBCUW,
|
2261 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2262 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS,
|
2263 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2264 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS,
|
2265 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
2266 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS,
|
2267 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2268 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS,
|
2269 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
|
2270 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS,
|
2271 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
2272 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS,
|
2273 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
2274 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS,
|
2275 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2276 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS,
|
2277 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
2278 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS,
|
2279 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2280 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS,
|
2281 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
|
2282 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS,
|
2283 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
2284 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS,
|
2285 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
2286 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS,
|
2287 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2288 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS,
|
2289 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
2290 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS,
|
2291 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2292 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS,
|
2293 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
|
2294 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS,
|
2295 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
2296 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS,
|
2297 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
2298 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBSWS, ALTIVEC_BUILTIN_VSUBSWS,
|
2299 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
2300 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBSWS, ALTIVEC_BUILTIN_VSUBSWS,
|
2301 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
|
2302 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBSWS, ALTIVEC_BUILTIN_VSUBSWS,
|
2303 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
2304 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS,
|
2305 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2306 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS,
|
2307 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 },
|
2308 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS,
|
2309 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2310 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS,
|
2311 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2312 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS,
|
2313 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
2314 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBSHS, ALTIVEC_BUILTIN_VSUBSHS,
|
2315 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
2316 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBSHS, ALTIVEC_BUILTIN_VSUBSHS,
|
2317 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
|
2318 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBSHS, ALTIVEC_BUILTIN_VSUBSHS,
|
2319 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
2320 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS,
|
2321 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2322 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS,
|
2323 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 },
|
2324 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS,
|
2325 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2326 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS,
|
2327 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2328 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS,
|
2329 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
2330 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBSBS, ALTIVEC_BUILTIN_VSUBSBS,
|
2331 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
2332 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBSBS, ALTIVEC_BUILTIN_VSUBSBS,
|
2333 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
|
2334 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBSBS, ALTIVEC_BUILTIN_VSUBSBS,
|
2335 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
2336 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS,
|
2337 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2338 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS,
|
2339 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
|
2340 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS,
|
2341 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2342 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS,
|
2343 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2344 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS,
|
2345 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
2346 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUM4S, ALTIVEC_BUILTIN_VSUM4UBS,
|
2347 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
|
2348 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUM4S, ALTIVEC_BUILTIN_VSUM4SBS,
|
2349 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_V4SI, 0 },
|
2350 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUM4S, ALTIVEC_BUILTIN_VSUM4SHS,
|
2351 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V4SI, 0 },
|
2352 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUM4SHS, ALTIVEC_BUILTIN_VSUM4SHS,
|
2353 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V4SI, 0 },
|
2354 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUM4SBS, ALTIVEC_BUILTIN_VSUM4SBS,
|
2355 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_V4SI, 0 },
|
2356 |
|
|
{ ALTIVEC_BUILTIN_VEC_VSUM4UBS, ALTIVEC_BUILTIN_VSUM4UBS,
|
2357 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
|
2358 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUM2S, ALTIVEC_BUILTIN_VSUM2SWS,
|
2359 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
2360 |
|
|
{ ALTIVEC_BUILTIN_VEC_SUMS, ALTIVEC_BUILTIN_VSUMSWS,
|
2361 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
2362 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2363 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
2364 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2365 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 },
|
2366 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2367 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 },
|
2368 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2369 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
|
2370 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2371 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 },
|
2372 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2373 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 },
|
2374 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2375 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
2376 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2377 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
|
2378 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2379 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
2380 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2381 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
2382 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2383 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2384 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2385 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
|
2386 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2387 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
2388 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2389 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
2390 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2391 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
|
2392 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2393 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
2394 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2395 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
2396 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2397 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2398 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2399 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
|
2400 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2401 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
2402 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2403 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
|
2404 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2405 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
2406 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2407 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
2408 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2409 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
2410 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2411 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2412 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2413 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
|
2414 |
|
|
{ ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR,
|
2415 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
2416 |
|
|
|
2417 |
|
|
/* Ternary AltiVec/VSX builtins. */
|
2418 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2419 |
|
|
RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2420 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2421 |
|
|
RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2422 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2423 |
|
|
RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2424 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2425 |
|
|
RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2426 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2427 |
|
|
RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2428 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2429 |
|
|
RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2430 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2431 |
|
|
RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2432 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2433 |
|
|
RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2434 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2435 |
|
|
RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2436 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2437 |
|
|
RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2438 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2439 |
|
|
RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2440 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2441 |
|
|
RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2442 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2443 |
|
|
RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2444 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2445 |
|
|
RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2446 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2447 |
|
|
RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2448 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2449 |
|
|
RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2450 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2451 |
|
|
RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2452 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2453 |
|
|
RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2454 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2455 |
|
|
RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2456 |
|
|
{ ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST,
|
2457 |
|
|
RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2458 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2459 |
|
|
RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2460 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2461 |
|
|
RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2462 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2463 |
|
|
RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2464 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2465 |
|
|
RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2466 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2467 |
|
|
RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2468 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2469 |
|
|
RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2470 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2471 |
|
|
RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2472 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2473 |
|
|
RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2474 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2475 |
|
|
RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2476 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2477 |
|
|
RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2478 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2479 |
|
|
RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2480 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2481 |
|
|
RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2482 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2483 |
|
|
RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2484 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2485 |
|
|
RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2486 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2487 |
|
|
RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2488 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2489 |
|
|
RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2490 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2491 |
|
|
RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2492 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2493 |
|
|
RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2494 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2495 |
|
|
RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2496 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST,
|
2497 |
|
|
RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2498 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2499 |
|
|
RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2500 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2501 |
|
|
RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2502 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2503 |
|
|
RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2504 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2505 |
|
|
RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2506 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2507 |
|
|
RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2508 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2509 |
|
|
RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2510 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2511 |
|
|
RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2512 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2513 |
|
|
RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2514 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2515 |
|
|
RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2516 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2517 |
|
|
RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2518 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2519 |
|
|
RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2520 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2521 |
|
|
RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2522 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2523 |
|
|
RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2524 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2525 |
|
|
RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2526 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2527 |
|
|
RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2528 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2529 |
|
|
RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2530 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2531 |
|
|
RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2532 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2533 |
|
|
RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2534 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2535 |
|
|
RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2536 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT,
|
2537 |
|
|
RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2538 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2539 |
|
|
RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2540 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2541 |
|
|
RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2542 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2543 |
|
|
RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2544 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2545 |
|
|
RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2546 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2547 |
|
|
RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2548 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2549 |
|
|
RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2550 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2551 |
|
|
RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2552 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2553 |
|
|
RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2554 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2555 |
|
|
RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2556 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2557 |
|
|
RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2558 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2559 |
|
|
RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2560 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2561 |
|
|
RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2562 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2563 |
|
|
RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2564 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2565 |
|
|
RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2566 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2567 |
|
|
RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2568 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2569 |
|
|
RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2570 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2571 |
|
|
RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2572 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2573 |
|
|
RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2574 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2575 |
|
|
RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2576 |
|
|
{ ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT,
|
2577 |
|
|
RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI },
|
2578 |
|
|
{ ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMADDFP,
|
2579 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
|
2580 |
|
|
{ ALTIVEC_BUILTIN_VEC_MADD, VSX_BUILTIN_XVMADDDP,
|
2581 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
|
2582 |
|
|
{ ALTIVEC_BUILTIN_VEC_MADDS, ALTIVEC_BUILTIN_VMHADDSHS,
|
2583 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
|
2584 |
|
|
{ ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM,
|
2585 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
|
2586 |
|
|
{ ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM,
|
2587 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
|
2588 |
|
|
{ ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM,
|
2589 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
|
2590 |
|
|
{ ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM,
|
2591 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
|
2592 |
|
|
{ ALTIVEC_BUILTIN_VEC_MRADDS, ALTIVEC_BUILTIN_VMHRADDSHS,
|
2593 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
|
2594 |
|
|
{ VSX_BUILTIN_VEC_MSUB, VSX_BUILTIN_XVMSUBSP,
|
2595 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
|
2596 |
|
|
{ VSX_BUILTIN_VEC_MSUB, VSX_BUILTIN_XVMSUBDP,
|
2597 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
|
2598 |
|
|
{ ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUBM,
|
2599 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI },
|
2600 |
|
|
{ ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMMBM,
|
2601 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V4SI },
|
2602 |
|
|
{ ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUHM,
|
2603 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI },
|
2604 |
|
|
{ ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMSHM,
|
2605 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI },
|
2606 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMSUMSHM, ALTIVEC_BUILTIN_VMSUMSHM,
|
2607 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI },
|
2608 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMSUMUHM, ALTIVEC_BUILTIN_VMSUMUHM,
|
2609 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI },
|
2610 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMSUMMBM, ALTIVEC_BUILTIN_VMSUMMBM,
|
2611 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V4SI },
|
2612 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMSUMUBM, ALTIVEC_BUILTIN_VMSUMUBM,
|
2613 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI },
|
2614 |
|
|
{ ALTIVEC_BUILTIN_VEC_MSUMS, ALTIVEC_BUILTIN_VMSUMUHS,
|
2615 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI },
|
2616 |
|
|
{ ALTIVEC_BUILTIN_VEC_MSUMS, ALTIVEC_BUILTIN_VMSUMSHS,
|
2617 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI },
|
2618 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMSUMSHS, ALTIVEC_BUILTIN_VMSUMSHS,
|
2619 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI },
|
2620 |
|
|
{ ALTIVEC_BUILTIN_VEC_VMSUMUHS, ALTIVEC_BUILTIN_VMSUMUHS,
|
2621 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI },
|
2622 |
|
|
{ VSX_BUILTIN_VEC_NMADD, VSX_BUILTIN_XVNMADDSP,
|
2623 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
|
2624 |
|
|
{ VSX_BUILTIN_VEC_NMADD, VSX_BUILTIN_XVNMADDDP,
|
2625 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
|
2626 |
|
|
{ ALTIVEC_BUILTIN_VEC_NMSUB, ALTIVEC_BUILTIN_VNMSUBFP,
|
2627 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
|
2628 |
|
|
{ ALTIVEC_BUILTIN_VEC_NMSUB, VSX_BUILTIN_XVNMSUBDP,
|
2629 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
|
2630 |
|
|
{ ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DF,
|
2631 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V16QI },
|
2632 |
|
|
{ ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DI,
|
2633 |
|
|
RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI },
|
2634 |
|
|
{ ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SF,
|
2635 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V16QI },
|
2636 |
|
|
{ ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SI,
|
2637 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI },
|
2638 |
|
|
{ ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SI,
|
2639 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI },
|
2640 |
|
|
{ ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SI,
|
2641 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V16QI },
|
2642 |
|
|
{ ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI,
|
2643 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI },
|
2644 |
|
|
{ ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI,
|
2645 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI },
|
2646 |
|
|
{ ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI,
|
2647 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V16QI },
|
2648 |
|
|
{ ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI,
|
2649 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI },
|
2650 |
|
|
{ ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI,
|
2651 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI },
|
2652 |
|
|
{ ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI,
|
2653 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
|
2654 |
|
|
{ ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI,
|
2655 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
|
2656 |
|
|
{ ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI,
|
2657 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI },
|
2658 |
|
|
{ ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI,
|
2659 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI },
|
2660 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF,
|
2661 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI },
|
2662 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF,
|
2663 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI },
|
2664 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF,
|
2665 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DI },
|
2666 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF,
|
2667 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
|
2668 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI,
|
2669 |
|
|
RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI },
|
2670 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI,
|
2671 |
|
|
RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI },
|
2672 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI,
|
2673 |
|
|
RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI },
|
2674 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SF,
|
2675 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI },
|
2676 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SF,
|
2677 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI },
|
2678 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI,
|
2679 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
|
2680 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI,
|
2681 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SI },
|
2682 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI,
|
2683 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI },
|
2684 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI,
|
2685 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI },
|
2686 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI,
|
2687 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI },
|
2688 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI,
|
2689 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI },
|
2690 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI,
|
2691 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI },
|
2692 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI,
|
2693 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI },
|
2694 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI,
|
2695 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI },
|
2696 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI,
|
2697 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI },
|
2698 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI,
|
2699 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI },
|
2700 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI,
|
2701 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
|
2702 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI,
|
2703 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI },
|
2704 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI,
|
2705 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI },
|
2706 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI,
|
2707 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI },
|
2708 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI,
|
2709 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI },
|
2710 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI,
|
2711 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI },
|
2712 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI,
|
2713 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
|
2714 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI,
|
2715 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI },
|
2716 |
|
|
{ ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI,
|
2717 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI },
|
2718 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SF,
|
2719 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_NOT_OPAQUE },
|
2720 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SI,
|
2721 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_NOT_OPAQUE },
|
2722 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SI,
|
2723 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_NOT_OPAQUE },
|
2724 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SI,
|
2725 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_NOT_OPAQUE },
|
2726 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI,
|
2727 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_NOT_OPAQUE },
|
2728 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI,
|
2729 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_NOT_OPAQUE },
|
2730 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI,
|
2731 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_NOT_OPAQUE },
|
2732 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI,
|
2733 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_NOT_OPAQUE },
|
2734 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI,
|
2735 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_NOT_OPAQUE },
|
2736 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI,
|
2737 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_NOT_OPAQUE },
|
2738 |
|
|
{ ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI,
|
2739 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_NOT_OPAQUE },
|
2740 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2741 |
|
|
RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF },
|
2742 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2743 |
|
|
RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI },
|
2744 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2745 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
|
2746 |
|
|
~RS6000_BTI_unsigned_V2DI },
|
2747 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2748 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI,
|
2749 |
|
|
~RS6000_BTI_bool_V2DI },
|
2750 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2751 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },
|
2752 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2753 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
|
2754 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2755 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },
|
2756 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2757 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
|
2758 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2759 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI },
|
2760 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2761 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
|
2762 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2763 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI },
|
2764 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2765 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
|
2766 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2767 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
|
2768 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2769 |
|
|
RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },
|
2770 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2771 |
|
|
RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
|
2772 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2773 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI },
|
2774 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2775 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
|
2776 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2777 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI },
|
2778 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2779 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
|
2780 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2781 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
|
2782 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2783 |
|
|
RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },
|
2784 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2785 |
|
|
RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
|
2786 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2787 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI },
|
2788 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2789 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
|
2790 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2791 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI },
|
2792 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2793 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
|
2794 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2795 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
|
2796 |
|
|
{ ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX,
|
2797 |
|
|
RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI },
|
2798 |
|
|
{ ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX,
|
2799 |
|
|
RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
|
2800 |
|
|
{ ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX,
|
2801 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
|
2802 |
|
|
{ ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX,
|
2803 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
|
2804 |
|
|
{ ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX,
|
2805 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
|
2806 |
|
|
{ ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX,
|
2807 |
|
|
RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
|
2808 |
|
|
{ ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX,
|
2809 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
|
2810 |
|
|
{ ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX,
|
2811 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
|
2812 |
|
|
{ ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX,
|
2813 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
|
2814 |
|
|
{ ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX,
|
2815 |
|
|
RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
|
2816 |
|
|
{ ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX,
|
2817 |
|
|
RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
|
2818 |
|
|
{ ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX,
|
2819 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
|
2820 |
|
|
{ ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX,
|
2821 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
|
2822 |
|
|
{ ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX,
|
2823 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
|
2824 |
|
|
{ ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX,
|
2825 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
|
2826 |
|
|
{ ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX,
|
2827 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
|
2828 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX,
|
2829 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
|
2830 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX,
|
2831 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
|
2832 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX,
|
2833 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
|
2834 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX,
|
2835 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
|
2836 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX,
|
2837 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
|
2838 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX,
|
2839 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_void },
|
2840 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX,
|
2841 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_void },
|
2842 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX,
|
2843 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_void },
|
2844 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX,
|
2845 |
|
|
RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
|
2846 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX,
|
2847 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
|
2848 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX,
|
2849 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
|
2850 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX,
|
2851 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
|
2852 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX,
|
2853 |
|
|
RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_void },
|
2854 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX,
|
2855 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_void },
|
2856 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX,
|
2857 |
|
|
RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
|
2858 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX,
|
2859 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
|
2860 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX,
|
2861 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
|
2862 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX,
|
2863 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
|
2864 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX,
|
2865 |
|
|
RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_void },
|
2866 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX,
|
2867 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_void },
|
2868 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2869 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },
|
2870 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2871 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
|
2872 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2873 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },
|
2874 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2875 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
|
2876 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2877 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI },
|
2878 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2879 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
|
2880 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2881 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI },
|
2882 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2883 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
|
2884 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2885 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
|
2886 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2887 |
|
|
RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },
|
2888 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2889 |
|
|
RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
|
2890 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2891 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI },
|
2892 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2893 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
|
2894 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2895 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI },
|
2896 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2897 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
|
2898 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2899 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
|
2900 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2901 |
|
|
RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },
|
2902 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2903 |
|
|
RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
|
2904 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2905 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI },
|
2906 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2907 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
|
2908 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2909 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI },
|
2910 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2911 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
|
2912 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2913 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
|
2914 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2915 |
|
|
RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI },
|
2916 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2917 |
|
|
RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF },
|
2918 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2919 |
|
|
RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double },
|
2920 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2921 |
|
|
RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI },
|
2922 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2923 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
|
2924 |
|
|
~RS6000_BTI_unsigned_V2DI },
|
2925 |
|
|
{ ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL,
|
2926 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI,
|
2927 |
|
|
~RS6000_BTI_bool_V2DI },
|
2928 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
|
2929 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },
|
2930 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
|
2931 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
|
2932 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
|
2933 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI },
|
2934 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
|
2935 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },
|
2936 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
|
2937 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
|
2938 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
|
2939 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI },
|
2940 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
|
2941 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
|
2942 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
|
2943 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI },
|
2944 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
|
2945 |
|
|
RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI },
|
2946 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
|
2947 |
|
|
RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },
|
2948 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
|
2949 |
|
|
RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
|
2950 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
|
2951 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI },
|
2952 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
|
2953 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
|
2954 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
|
2955 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI },
|
2956 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
|
2957 |
|
|
RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },
|
2958 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
|
2959 |
|
|
RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
|
2960 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
|
2961 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI },
|
2962 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX,
|
2963 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
|
2964 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
|
2965 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },
|
2966 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
|
2967 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
|
2968 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
|
2969 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI },
|
2970 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
|
2971 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },
|
2972 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
|
2973 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
|
2974 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
|
2975 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI },
|
2976 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
|
2977 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
|
2978 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
|
2979 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI },
|
2980 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
|
2981 |
|
|
RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI },
|
2982 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
|
2983 |
|
|
RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },
|
2984 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
|
2985 |
|
|
RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
|
2986 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
|
2987 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI },
|
2988 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
|
2989 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
|
2990 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
|
2991 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI },
|
2992 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
|
2993 |
|
|
RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },
|
2994 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
|
2995 |
|
|
RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
|
2996 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
|
2997 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI },
|
2998 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL,
|
2999 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
|
3000 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
|
3001 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },
|
3002 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
|
3003 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
|
3004 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
|
3005 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI },
|
3006 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
|
3007 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },
|
3008 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
|
3009 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
|
3010 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
|
3011 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI },
|
3012 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
|
3013 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
|
3014 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
|
3015 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI },
|
3016 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
|
3017 |
|
|
RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI },
|
3018 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
|
3019 |
|
|
RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },
|
3020 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
|
3021 |
|
|
RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
|
3022 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
|
3023 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI },
|
3024 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
|
3025 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
|
3026 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
|
3027 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI },
|
3028 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
|
3029 |
|
|
RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },
|
3030 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
|
3031 |
|
|
RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
|
3032 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
|
3033 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI },
|
3034 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX,
|
3035 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
|
3036 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
|
3037 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },
|
3038 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
|
3039 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
|
3040 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
|
3041 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI },
|
3042 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
|
3043 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },
|
3044 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
|
3045 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
|
3046 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
|
3047 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI },
|
3048 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
|
3049 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI },
|
3050 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
|
3051 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI },
|
3052 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
|
3053 |
|
|
RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI },
|
3054 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
|
3055 |
|
|
RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },
|
3056 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
|
3057 |
|
|
RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
|
3058 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
|
3059 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI },
|
3060 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
|
3061 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI },
|
3062 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
|
3063 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI },
|
3064 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
|
3065 |
|
|
RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },
|
3066 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
|
3067 |
|
|
RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
|
3068 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
|
3069 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI },
|
3070 |
|
|
{ ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL,
|
3071 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI },
|
3072 |
|
|
{ VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_16QI,
|
3073 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_NOT_OPAQUE },
|
3074 |
|
|
{ VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_16QI,
|
3075 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
|
3076 |
|
|
RS6000_BTI_NOT_OPAQUE },
|
3077 |
|
|
{ VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_8HI,
|
3078 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_NOT_OPAQUE },
|
3079 |
|
|
{ VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_8HI,
|
3080 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
|
3081 |
|
|
RS6000_BTI_NOT_OPAQUE },
|
3082 |
|
|
{ VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_4SI,
|
3083 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_NOT_OPAQUE },
|
3084 |
|
|
{ VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_4SI,
|
3085 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
|
3086 |
|
|
RS6000_BTI_NOT_OPAQUE },
|
3087 |
|
|
{ VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_2DI,
|
3088 |
|
|
RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_NOT_OPAQUE },
|
3089 |
|
|
{ VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_2DI,
|
3090 |
|
|
RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
|
3091 |
|
|
RS6000_BTI_NOT_OPAQUE },
|
3092 |
|
|
{ VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_4SF,
|
3093 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_NOT_OPAQUE },
|
3094 |
|
|
{ VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_2DF,
|
3095 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_NOT_OPAQUE },
|
3096 |
|
|
{ VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_2DF,
|
3097 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_NOT_OPAQUE },
|
3098 |
|
|
{ VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_2DI,
|
3099 |
|
|
RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_NOT_OPAQUE },
|
3100 |
|
|
{ VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_2DI,
|
3101 |
|
|
RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
|
3102 |
|
|
RS6000_BTI_NOT_OPAQUE },
|
3103 |
|
|
{ VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_4SF,
|
3104 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_NOT_OPAQUE },
|
3105 |
|
|
{ VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_4SI,
|
3106 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_NOT_OPAQUE },
|
3107 |
|
|
{ VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_4SI,
|
3108 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
|
3109 |
|
|
RS6000_BTI_NOT_OPAQUE },
|
3110 |
|
|
{ VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_8HI,
|
3111 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_NOT_OPAQUE },
|
3112 |
|
|
{ VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_8HI,
|
3113 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
|
3114 |
|
|
RS6000_BTI_NOT_OPAQUE },
|
3115 |
|
|
{ VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_16QI,
|
3116 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_NOT_OPAQUE },
|
3117 |
|
|
{ VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_16QI,
|
3118 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
|
3119 |
|
|
RS6000_BTI_NOT_OPAQUE },
|
3120 |
|
|
|
3121 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DF,
|
3122 |
|
|
RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 },
|
3123 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI,
|
3124 |
|
|
RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 },
|
3125 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI,
|
3126 |
|
|
RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
|
3127 |
|
|
~RS6000_BTI_unsigned_V2DI, 0 },
|
3128 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI,
|
3129 |
|
|
RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 },
|
3130 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SF,
|
3131 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 },
|
3132 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SF,
|
3133 |
|
|
RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 },
|
3134 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI,
|
3135 |
|
|
RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 },
|
3136 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI,
|
3137 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },
|
3138 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI,
|
3139 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
|
3140 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI,
|
3141 |
|
|
RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },
|
3142 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI,
|
3143 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI,
|
3144 |
|
|
~RS6000_BTI_unsigned_V4SI, 0 },
|
3145 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI,
|
3146 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
|
3147 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI,
|
3148 |
|
|
RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI,
|
3149 |
|
|
~RS6000_BTI_unsigned_long, 0 },
|
3150 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI,
|
3151 |
|
|
RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 },
|
3152 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI,
|
3153 |
|
|
RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 },
|
3154 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI,
|
3155 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 },
|
3156 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI,
|
3157 |
|
|
RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 },
|
3158 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI,
|
3159 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI,
|
3160 |
|
|
~RS6000_BTI_unsigned_V8HI, 0 },
|
3161 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI,
|
3162 |
|
|
RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
|
3163 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI,
|
3164 |
|
|
RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 },
|
3165 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI,
|
3166 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 },
|
3167 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI,
|
3168 |
|
|
RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
|
3169 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI,
|
3170 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI,
|
3171 |
|
|
~RS6000_BTI_unsigned_V16QI, 0 },
|
3172 |
|
|
{ VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI,
|
3173 |
|
|
RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
|
3174 |
|
|
|
3175 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DF,
|
3176 |
|
|
RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF },
|
3177 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI,
|
3178 |
|
|
RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI },
|
3179 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI,
|
3180 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
|
3181 |
|
|
~RS6000_BTI_unsigned_V2DI },
|
3182 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI,
|
3183 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI,
|
3184 |
|
|
~RS6000_BTI_bool_V2DI },
|
3185 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SF,
|
3186 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF },
|
3187 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SF,
|
3188 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float },
|
3189 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI,
|
3190 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI },
|
3191 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI,
|
3192 |
|
|
RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI },
|
3193 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI,
|
3194 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI,
|
3195 |
|
|
~RS6000_BTI_unsigned_V4SI },
|
3196 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI,
|
3197 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI,
|
3198 |
|
|
~RS6000_BTI_UINTSI },
|
3199 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI,
|
3200 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI,
|
3201 |
|
|
~RS6000_BTI_bool_V4SI },
|
3202 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI,
|
3203 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI,
|
3204 |
|
|
~RS6000_BTI_UINTSI },
|
3205 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI,
|
3206 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI,
|
3207 |
|
|
~RS6000_BTI_INTSI },
|
3208 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI,
|
3209 |
|
|
RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI },
|
3210 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI,
|
3211 |
|
|
RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI },
|
3212 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI,
|
3213 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI,
|
3214 |
|
|
~RS6000_BTI_unsigned_V8HI },
|
3215 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI,
|
3216 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI,
|
3217 |
|
|
~RS6000_BTI_UINTHI },
|
3218 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI,
|
3219 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI,
|
3220 |
|
|
~RS6000_BTI_bool_V8HI },
|
3221 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI,
|
3222 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI,
|
3223 |
|
|
~RS6000_BTI_UINTHI },
|
3224 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI,
|
3225 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI,
|
3226 |
|
|
~RS6000_BTI_INTHI },
|
3227 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI,
|
3228 |
|
|
RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI },
|
3229 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI,
|
3230 |
|
|
RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI },
|
3231 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI,
|
3232 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI,
|
3233 |
|
|
~RS6000_BTI_unsigned_V16QI },
|
3234 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI,
|
3235 |
|
|
RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI,
|
3236 |
|
|
~RS6000_BTI_UINTQI },
|
3237 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI,
|
3238 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI,
|
3239 |
|
|
~RS6000_BTI_bool_V16QI },
|
3240 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI,
|
3241 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI,
|
3242 |
|
|
~RS6000_BTI_UINTQI },
|
3243 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI,
|
3244 |
|
|
RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI,
|
3245 |
|
|
~RS6000_BTI_INTQI },
|
3246 |
|
|
{ VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI,
|
3247 |
|
|
RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI,
|
3248 |
|
|
~RS6000_BTI_pixel_V8HI },
|
3249 |
|
|
|
3250 |
|
|
/* Predicates. */
|
3251 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
|
3252 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI },
|
3253 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
|
3254 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI },
|
3255 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
|
3256 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
|
3257 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
|
3258 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI },
|
3259 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
|
3260 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI },
|
3261 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
|
3262 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI },
|
3263 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
|
3264 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI },
|
3265 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
|
3266 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI },
|
3267 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
|
3268 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
|
3269 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
|
3270 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
|
3271 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
|
3272 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI },
|
3273 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
|
3274 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI },
|
3275 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
|
3276 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI },
|
3277 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
|
3278 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI },
|
3279 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
|
3280 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI },
|
3281 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
|
3282 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI },
|
3283 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
|
3284 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI },
|
3285 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
|
3286 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI },
|
3287 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTFP_P,
|
3288 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
|
3289 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGT_P, VSX_BUILTIN_XVCMPGTDP_P,
|
3290 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
|
3291 |
|
|
|
3292 |
|
|
|
3293 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
|
3294 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI },
|
3295 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
|
3296 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI },
|
3297 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
|
3298 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
|
3299 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
|
3300 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI },
|
3301 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
|
3302 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI },
|
3303 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
|
3304 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI },
|
3305 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
|
3306 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI },
|
3307 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
|
3308 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI },
|
3309 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
|
3310 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI },
|
3311 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
|
3312 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
|
3313 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
|
3314 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
|
3315 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
|
3316 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI },
|
3317 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
|
3318 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI },
|
3319 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
|
3320 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI },
|
3321 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
|
3322 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI },
|
3323 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
|
3324 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI },
|
3325 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
|
3326 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI },
|
3327 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
|
3328 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI },
|
3329 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
|
3330 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI },
|
3331 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
|
3332 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI },
|
3333 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
|
3334 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI },
|
3335 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
|
3336 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI },
|
3337 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQFP_P,
|
3338 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
|
3339 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPEQ_P, VSX_BUILTIN_XVCMPEQDP_P,
|
3340 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
|
3341 |
|
|
|
3342 |
|
|
|
3343 |
|
|
/* cmpge is the same as cmpgt for all cases except floating point.
|
3344 |
|
|
There is further code to deal with this special case in
|
3345 |
|
|
altivec_build_resolved_builtin. */
|
3346 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
|
3347 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI },
|
3348 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
|
3349 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI },
|
3350 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
|
3351 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
|
3352 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
|
3353 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI },
|
3354 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
|
3355 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI },
|
3356 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
|
3357 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI },
|
3358 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
|
3359 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI },
|
3360 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
|
3361 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI },
|
3362 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
|
3363 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
|
3364 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
|
3365 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
|
3366 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
|
3367 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI },
|
3368 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
|
3369 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI },
|
3370 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
|
3371 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI },
|
3372 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
|
3373 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI },
|
3374 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
|
3375 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI },
|
3376 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
|
3377 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI },
|
3378 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
|
3379 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI },
|
3380 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
|
3381 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI },
|
3382 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGEFP_P,
|
3383 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
|
3384 |
|
|
{ ALTIVEC_BUILTIN_VEC_VCMPGE_P, VSX_BUILTIN_XVCMPGEDP_P,
|
3385 |
|
|
RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
|
3386 |
|
|
|
3387 |
|
|
{ (enum rs6000_builtins) 0, (enum rs6000_builtins) 0, 0, 0, 0, 0 }
|
3388 |
|
|
};
|
3389 |
|
|
|
3390 |
|
|
|
3391 |
|
|
/* Convert a type stored into a struct altivec_builtin_types as ID,
|
3392 |
|
|
into a tree. The types are in rs6000_builtin_types: negative values
|
3393 |
|
|
create a pointer type for the type associated to ~ID. Note it is
|
3394 |
|
|
a logical NOT, rather than a negation, otherwise you cannot represent
|
3395 |
|
|
a pointer type for ID 0. */
|
3396 |
|
|
|
3397 |
|
|
static inline tree
|
3398 |
|
|
rs6000_builtin_type (int id)
|
3399 |
|
|
{
|
3400 |
|
|
tree t;
|
3401 |
|
|
t = rs6000_builtin_types[id < 0 ? ~id : id];
|
3402 |
|
|
return id < 0 ? build_pointer_type (t) : t;
|
3403 |
|
|
}
|
3404 |
|
|
|
3405 |
|
|
/* Check whether the type of an argument, T, is compatible with a
|
3406 |
|
|
type ID stored into a struct altivec_builtin_types. Integer
|
3407 |
|
|
types are considered compatible; otherwise, the language hook
|
3408 |
|
|
lang_hooks.types_compatible_p makes the decision. */
|
3409 |
|
|
|
3410 |
|
|
static inline bool
|
3411 |
|
|
rs6000_builtin_type_compatible (tree t, int id)
|
3412 |
|
|
{
|
3413 |
|
|
tree builtin_type;
|
3414 |
|
|
builtin_type = rs6000_builtin_type (id);
|
3415 |
|
|
if (t == error_mark_node)
|
3416 |
|
|
return false;
|
3417 |
|
|
if (INTEGRAL_TYPE_P (t) && INTEGRAL_TYPE_P (builtin_type))
|
3418 |
|
|
return true;
|
3419 |
|
|
else
|
3420 |
|
|
return lang_hooks.types_compatible_p (t, builtin_type);
|
3421 |
|
|
}
|
3422 |
|
|
|
3423 |
|
|
|
3424 |
|
|
/* Build a tree for a function call to an Altivec non-overloaded builtin.
|
3425 |
|
|
The overloaded builtin that matched the types and args is described
|
3426 |
|
|
by DESC. The N arguments are given in ARGS, respectively.
|
3427 |
|
|
|
3428 |
|
|
Actually the only thing it does is calling fold_convert on ARGS, with
|
3429 |
|
|
a small exception for vec_{all,any}_{ge,le} predicates. */
|
3430 |
|
|
|
3431 |
|
|
static tree
|
3432 |
|
|
altivec_build_resolved_builtin (tree *args, int n,
|
3433 |
|
|
const struct altivec_builtin_types *desc)
|
3434 |
|
|
{
|
3435 |
|
|
tree impl_fndecl = rs6000_builtin_decls[desc->overloaded_code];
|
3436 |
|
|
tree ret_type = rs6000_builtin_type (desc->ret_type);
|
3437 |
|
|
tree argtypes = TYPE_ARG_TYPES (TREE_TYPE (impl_fndecl));
|
3438 |
|
|
tree arg_type[3];
|
3439 |
|
|
tree call;
|
3440 |
|
|
|
3441 |
|
|
int i;
|
3442 |
|
|
for (i = 0; i < n; i++)
|
3443 |
|
|
arg_type[i] = TREE_VALUE (argtypes), argtypes = TREE_CHAIN (argtypes);
|
3444 |
|
|
|
3445 |
|
|
/* The AltiVec overloading implementation is overall gross, but this
|
3446 |
|
|
is particularly disgusting. The vec_{all,any}_{ge,le} builtins
|
3447 |
|
|
are completely different for floating-point vs. integer vector
|
3448 |
|
|
types, because the former has vcmpgefp, but the latter should use
|
3449 |
|
|
vcmpgtXX.
|
3450 |
|
|
|
3451 |
|
|
In practice, the second and third arguments are swapped, and the
|
3452 |
|
|
condition (LT vs. EQ, which is recognizable by bit 1 of the first
|
3453 |
|
|
argument) is reversed. Patch the arguments here before building
|
3454 |
|
|
the resolved CALL_EXPR. */
|
3455 |
|
|
if (desc->code == ALTIVEC_BUILTIN_VEC_VCMPGE_P
|
3456 |
|
|
&& desc->overloaded_code != ALTIVEC_BUILTIN_VCMPGEFP_P)
|
3457 |
|
|
{
|
3458 |
|
|
tree t;
|
3459 |
|
|
t = args[2], args[2] = args[1], args[1] = t;
|
3460 |
|
|
t = arg_type[2], arg_type[2] = arg_type[1], arg_type[1] = t;
|
3461 |
|
|
|
3462 |
|
|
args[0] = fold_build2 (BIT_XOR_EXPR, TREE_TYPE (args[0]), args[0],
|
3463 |
|
|
build_int_cst (NULL_TREE, 2));
|
3464 |
|
|
}
|
3465 |
|
|
|
3466 |
|
|
switch (n)
|
3467 |
|
|
{
|
3468 |
|
|
case 0:
|
3469 |
|
|
call = build_call_expr (impl_fndecl, 0);
|
3470 |
|
|
break;
|
3471 |
|
|
case 1:
|
3472 |
|
|
call = build_call_expr (impl_fndecl, 1,
|
3473 |
|
|
fold_convert (arg_type[0], args[0]));
|
3474 |
|
|
break;
|
3475 |
|
|
case 2:
|
3476 |
|
|
call = build_call_expr (impl_fndecl, 2,
|
3477 |
|
|
fold_convert (arg_type[0], args[0]),
|
3478 |
|
|
fold_convert (arg_type[1], args[1]));
|
3479 |
|
|
break;
|
3480 |
|
|
case 3:
|
3481 |
|
|
call = build_call_expr (impl_fndecl, 3,
|
3482 |
|
|
fold_convert (arg_type[0], args[0]),
|
3483 |
|
|
fold_convert (arg_type[1], args[1]),
|
3484 |
|
|
fold_convert (arg_type[2], args[2]));
|
3485 |
|
|
break;
|
3486 |
|
|
default:
|
3487 |
|
|
gcc_unreachable ();
|
3488 |
|
|
}
|
3489 |
|
|
return fold_convert (ret_type, call);
|
3490 |
|
|
}
|
3491 |
|
|
|
3492 |
|
|
/* Implementation of the resolve_overloaded_builtin target hook, to
|
3493 |
|
|
support Altivec's overloaded builtins. */
|
3494 |
|
|
|
3495 |
|
|
tree
|
3496 |
|
|
altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
|
3497 |
|
|
void *passed_arglist)
|
3498 |
|
|
{
|
3499 |
|
|
VEC(tree,gc) *arglist = (VEC(tree,gc) *) passed_arglist;
|
3500 |
|
|
unsigned int nargs = VEC_length (tree, arglist);
|
3501 |
|
|
enum rs6000_builtins fcode
|
3502 |
|
|
= (enum rs6000_builtins)DECL_FUNCTION_CODE (fndecl);
|
3503 |
|
|
tree fnargs = TYPE_ARG_TYPES (TREE_TYPE (fndecl));
|
3504 |
|
|
tree types[3], args[3];
|
3505 |
|
|
const struct altivec_builtin_types *desc;
|
3506 |
|
|
unsigned int n;
|
3507 |
|
|
|
3508 |
|
|
if (!rs6000_overloaded_builtin_p (fcode))
|
3509 |
|
|
return NULL_TREE;
|
3510 |
|
|
|
3511 |
|
|
if (TARGET_DEBUG_BUILTIN)
|
3512 |
|
|
fprintf (stderr, "altivec_resolve_overloaded_builtin, code = %4d, %s\n",
|
3513 |
|
|
(int)fcode, IDENTIFIER_POINTER (DECL_NAME (fndecl)));
|
3514 |
|
|
|
3515 |
|
|
/* For now treat vec_splats and vec_promote as the same. */
|
3516 |
|
|
if (fcode == ALTIVEC_BUILTIN_VEC_SPLATS
|
3517 |
|
|
|| fcode == ALTIVEC_BUILTIN_VEC_PROMOTE)
|
3518 |
|
|
{
|
3519 |
|
|
tree type, arg;
|
3520 |
|
|
int size;
|
3521 |
|
|
int i;
|
3522 |
|
|
bool unsigned_p;
|
3523 |
|
|
VEC(constructor_elt,gc) *vec;
|
3524 |
|
|
const char *name = fcode == ALTIVEC_BUILTIN_VEC_SPLATS ? "vec_splats": "vec_promote";
|
3525 |
|
|
|
3526 |
|
|
if (nargs == 0)
|
3527 |
|
|
{
|
3528 |
|
|
error ("%s only accepts %d arguments", name, (fcode == ALTIVEC_BUILTIN_VEC_PROMOTE)+1 );
|
3529 |
|
|
return error_mark_node;
|
3530 |
|
|
}
|
3531 |
|
|
if (fcode == ALTIVEC_BUILTIN_VEC_SPLATS && nargs != 1)
|
3532 |
|
|
{
|
3533 |
|
|
error ("%s only accepts 1 argument", name);
|
3534 |
|
|
return error_mark_node;
|
3535 |
|
|
}
|
3536 |
|
|
if (fcode == ALTIVEC_BUILTIN_VEC_PROMOTE && nargs != 2)
|
3537 |
|
|
{
|
3538 |
|
|
error ("%s only accepts 2 arguments", name);
|
3539 |
|
|
return error_mark_node;
|
3540 |
|
|
}
|
3541 |
|
|
/* Ignore promote's element argument. */
|
3542 |
|
|
if (fcode == ALTIVEC_BUILTIN_VEC_PROMOTE
|
3543 |
|
|
&& !INTEGRAL_TYPE_P (TREE_TYPE (VEC_index (tree, arglist, 1))))
|
3544 |
|
|
goto bad;
|
3545 |
|
|
|
3546 |
|
|
arg = VEC_index (tree, arglist, 0);
|
3547 |
|
|
type = TREE_TYPE (arg);
|
3548 |
|
|
if (!SCALAR_FLOAT_TYPE_P (type)
|
3549 |
|
|
&& !INTEGRAL_TYPE_P (type))
|
3550 |
|
|
goto bad;
|
3551 |
|
|
unsigned_p = TYPE_UNSIGNED (type);
|
3552 |
|
|
switch (TYPE_MODE (type))
|
3553 |
|
|
{
|
3554 |
|
|
case DImode:
|
3555 |
|
|
type = (unsigned_p ? unsigned_V2DI_type_node : V2DI_type_node);
|
3556 |
|
|
size = 2;
|
3557 |
|
|
break;
|
3558 |
|
|
case SImode:
|
3559 |
|
|
type = (unsigned_p ? unsigned_V4SI_type_node : V4SI_type_node);
|
3560 |
|
|
size = 4;
|
3561 |
|
|
break;
|
3562 |
|
|
case HImode:
|
3563 |
|
|
type = (unsigned_p ? unsigned_V8HI_type_node : V8HI_type_node);
|
3564 |
|
|
size = 8;
|
3565 |
|
|
break;
|
3566 |
|
|
case QImode:
|
3567 |
|
|
type = (unsigned_p ? unsigned_V16QI_type_node : V16QI_type_node);
|
3568 |
|
|
size = 16;
|
3569 |
|
|
break;
|
3570 |
|
|
case SFmode: type = V4SF_type_node; size = 4; break;
|
3571 |
|
|
case DFmode: type = V2DF_type_node; size = 2; break;
|
3572 |
|
|
default:
|
3573 |
|
|
goto bad;
|
3574 |
|
|
}
|
3575 |
|
|
arg = save_expr (fold_convert (TREE_TYPE (type), arg));
|
3576 |
|
|
vec = VEC_alloc (constructor_elt, gc, size);
|
3577 |
|
|
for(i = 0; i < size; i++)
|
3578 |
|
|
{
|
3579 |
|
|
constructor_elt *elt;
|
3580 |
|
|
|
3581 |
|
|
elt = VEC_quick_push (constructor_elt, vec, NULL);
|
3582 |
|
|
elt->index = NULL_TREE;
|
3583 |
|
|
elt->value = arg;
|
3584 |
|
|
}
|
3585 |
|
|
return build_constructor (type, vec);
|
3586 |
|
|
}
|
3587 |
|
|
|
3588 |
|
|
/* For now use pointer tricks to do the extaction, unless we are on VSX
|
3589 |
|
|
extracting a double from a constant offset. */
|
3590 |
|
|
if (fcode == ALTIVEC_BUILTIN_VEC_EXTRACT)
|
3591 |
|
|
{
|
3592 |
|
|
tree arg1;
|
3593 |
|
|
tree arg1_type;
|
3594 |
|
|
tree arg2;
|
3595 |
|
|
tree arg1_inner_type;
|
3596 |
|
|
tree decl, stmt;
|
3597 |
|
|
tree innerptrtype;
|
3598 |
|
|
enum machine_mode mode;
|
3599 |
|
|
|
3600 |
|
|
/* No second argument. */
|
3601 |
|
|
if (nargs != 2)
|
3602 |
|
|
{
|
3603 |
|
|
error ("vec_extract only accepts 2 arguments");
|
3604 |
|
|
return error_mark_node;
|
3605 |
|
|
}
|
3606 |
|
|
|
3607 |
|
|
arg2 = VEC_index (tree, arglist, 1);
|
3608 |
|
|
arg1 = VEC_index (tree, arglist, 0);
|
3609 |
|
|
arg1_type = TREE_TYPE (arg1);
|
3610 |
|
|
|
3611 |
|
|
if (TREE_CODE (arg1_type) != VECTOR_TYPE)
|
3612 |
|
|
goto bad;
|
3613 |
|
|
if (!INTEGRAL_TYPE_P (TREE_TYPE (arg2)))
|
3614 |
|
|
goto bad;
|
3615 |
|
|
|
3616 |
|
|
/* If we can use the VSX xxpermdi instruction, use that for extract. */
|
3617 |
|
|
mode = TYPE_MODE (arg1_type);
|
3618 |
|
|
if ((mode == V2DFmode || mode == V2DImode) && VECTOR_MEM_VSX_P (mode)
|
3619 |
|
|
&& TREE_CODE (arg2) == INTEGER_CST
|
3620 |
|
|
&& TREE_INT_CST_HIGH (arg2) == 0
|
3621 |
|
|
&& (TREE_INT_CST_LOW (arg2) == 0 || TREE_INT_CST_LOW (arg2) == 1))
|
3622 |
|
|
{
|
3623 |
|
|
tree call = NULL_TREE;
|
3624 |
|
|
|
3625 |
|
|
if (mode == V2DFmode)
|
3626 |
|
|
call = rs6000_builtin_decls[VSX_BUILTIN_VEC_EXT_V2DF];
|
3627 |
|
|
else if (mode == V2DImode)
|
3628 |
|
|
call = rs6000_builtin_decls[VSX_BUILTIN_VEC_EXT_V2DI];
|
3629 |
|
|
|
3630 |
|
|
if (call)
|
3631 |
|
|
return build_call_expr (call, 2, arg1, arg2);
|
3632 |
|
|
}
|
3633 |
|
|
|
3634 |
|
|
/* Build *(((arg1_inner_type*)&(vector type){arg1})+arg2). */
|
3635 |
|
|
arg1_inner_type = TREE_TYPE (arg1_type);
|
3636 |
|
|
arg2 = build_binary_op (loc, BIT_AND_EXPR, arg2,
|
3637 |
|
|
build_int_cst (TREE_TYPE (arg2),
|
3638 |
|
|
TYPE_VECTOR_SUBPARTS (arg1_type)
|
3639 |
|
|
- 1), 0);
|
3640 |
|
|
decl = build_decl (loc, VAR_DECL, NULL_TREE, arg1_type);
|
3641 |
|
|
DECL_EXTERNAL (decl) = 0;
|
3642 |
|
|
TREE_PUBLIC (decl) = 0;
|
3643 |
|
|
DECL_CONTEXT (decl) = current_function_decl;
|
3644 |
|
|
TREE_USED (decl) = 1;
|
3645 |
|
|
TREE_TYPE (decl) = arg1_type;
|
3646 |
|
|
TREE_READONLY (decl) = TYPE_READONLY (arg1_type);
|
3647 |
|
|
DECL_INITIAL (decl) = arg1;
|
3648 |
|
|
stmt = build1 (DECL_EXPR, arg1_type, decl);
|
3649 |
|
|
TREE_ADDRESSABLE (decl) = 1;
|
3650 |
|
|
SET_EXPR_LOCATION (stmt, loc);
|
3651 |
|
|
stmt = build1 (COMPOUND_LITERAL_EXPR, arg1_type, stmt);
|
3652 |
|
|
|
3653 |
|
|
innerptrtype = build_pointer_type (arg1_inner_type);
|
3654 |
|
|
|
3655 |
|
|
stmt = build_unary_op (loc, ADDR_EXPR, stmt, 0);
|
3656 |
|
|
stmt = convert (innerptrtype, stmt);
|
3657 |
|
|
stmt = build_binary_op (loc, PLUS_EXPR, stmt, arg2, 1);
|
3658 |
|
|
stmt = build_indirect_ref (loc, stmt, RO_NULL);
|
3659 |
|
|
|
3660 |
|
|
return stmt;
|
3661 |
|
|
}
|
3662 |
|
|
|
3663 |
|
|
/* For now use pointer tricks to do the insertation, unless we are on VSX
|
3664 |
|
|
inserting a double to a constant offset.. */
|
3665 |
|
|
if (fcode == ALTIVEC_BUILTIN_VEC_INSERT)
|
3666 |
|
|
{
|
3667 |
|
|
tree arg0;
|
3668 |
|
|
tree arg1;
|
3669 |
|
|
tree arg2;
|
3670 |
|
|
tree arg1_type;
|
3671 |
|
|
tree arg1_inner_type;
|
3672 |
|
|
tree decl, stmt;
|
3673 |
|
|
tree innerptrtype;
|
3674 |
|
|
enum machine_mode mode;
|
3675 |
|
|
|
3676 |
|
|
/* No second or third arguments. */
|
3677 |
|
|
if (nargs != 3)
|
3678 |
|
|
{
|
3679 |
|
|
error ("vec_insert only accepts 3 arguments");
|
3680 |
|
|
return error_mark_node;
|
3681 |
|
|
}
|
3682 |
|
|
|
3683 |
|
|
arg0 = VEC_index (tree, arglist, 0);
|
3684 |
|
|
arg1 = VEC_index (tree, arglist, 1);
|
3685 |
|
|
arg1_type = TREE_TYPE (arg1);
|
3686 |
|
|
arg2 = VEC_index (tree, arglist, 2);
|
3687 |
|
|
|
3688 |
|
|
if (TREE_CODE (arg1_type) != VECTOR_TYPE)
|
3689 |
|
|
goto bad;
|
3690 |
|
|
if (!INTEGRAL_TYPE_P (TREE_TYPE (arg2)))
|
3691 |
|
|
goto bad;
|
3692 |
|
|
|
3693 |
|
|
/* If we can use the VSX xxpermdi instruction, use that for insert. */
|
3694 |
|
|
mode = TYPE_MODE (arg1_type);
|
3695 |
|
|
if ((mode == V2DFmode || mode == V2DImode) && VECTOR_UNIT_VSX_P (mode)
|
3696 |
|
|
&& TREE_CODE (arg2) == INTEGER_CST
|
3697 |
|
|
&& TREE_INT_CST_HIGH (arg2) == 0
|
3698 |
|
|
&& (TREE_INT_CST_LOW (arg2) == 0 || TREE_INT_CST_LOW (arg2) == 1))
|
3699 |
|
|
{
|
3700 |
|
|
tree call = NULL_TREE;
|
3701 |
|
|
|
3702 |
|
|
if (mode == V2DFmode)
|
3703 |
|
|
call = rs6000_builtin_decls[VSX_BUILTIN_VEC_SET_V2DF];
|
3704 |
|
|
else if (mode == V2DImode)
|
3705 |
|
|
call = rs6000_builtin_decls[VSX_BUILTIN_VEC_SET_V2DI];
|
3706 |
|
|
|
3707 |
|
|
/* Note, __builtin_vec_insert_<xxx> has vector and scalar types
|
3708 |
|
|
reversed. */
|
3709 |
|
|
if (call)
|
3710 |
|
|
return build_call_expr (call, 3, arg1, arg0, arg2);
|
3711 |
|
|
}
|
3712 |
|
|
|
3713 |
|
|
/* Build *(((arg1_inner_type*)&(vector type){arg1})+arg2) = arg0. */
|
3714 |
|
|
arg1_inner_type = TREE_TYPE (arg1_type);
|
3715 |
|
|
arg2 = build_binary_op (loc, BIT_AND_EXPR, arg2,
|
3716 |
|
|
build_int_cst (TREE_TYPE (arg2),
|
3717 |
|
|
TYPE_VECTOR_SUBPARTS (arg1_type)
|
3718 |
|
|
- 1), 0);
|
3719 |
|
|
decl = build_decl (loc, VAR_DECL, NULL_TREE, arg1_type);
|
3720 |
|
|
DECL_EXTERNAL (decl) = 0;
|
3721 |
|
|
TREE_PUBLIC (decl) = 0;
|
3722 |
|
|
DECL_CONTEXT (decl) = current_function_decl;
|
3723 |
|
|
TREE_USED (decl) = 1;
|
3724 |
|
|
TREE_TYPE (decl) = arg1_type;
|
3725 |
|
|
TREE_READONLY (decl) = TYPE_READONLY (arg1_type);
|
3726 |
|
|
DECL_INITIAL (decl) = arg1;
|
3727 |
|
|
stmt = build1 (DECL_EXPR, arg1_type, decl);
|
3728 |
|
|
TREE_ADDRESSABLE (decl) = 1;
|
3729 |
|
|
SET_EXPR_LOCATION (stmt, loc);
|
3730 |
|
|
stmt = build1 (COMPOUND_LITERAL_EXPR, arg1_type, stmt);
|
3731 |
|
|
|
3732 |
|
|
innerptrtype = build_pointer_type (arg1_inner_type);
|
3733 |
|
|
|
3734 |
|
|
stmt = build_unary_op (loc, ADDR_EXPR, stmt, 0);
|
3735 |
|
|
stmt = convert (innerptrtype, stmt);
|
3736 |
|
|
stmt = build_binary_op (loc, PLUS_EXPR, stmt, arg2, 1);
|
3737 |
|
|
stmt = build_indirect_ref (loc, stmt, RO_NULL);
|
3738 |
|
|
stmt = build2 (MODIFY_EXPR, TREE_TYPE (stmt), stmt,
|
3739 |
|
|
convert (TREE_TYPE (stmt), arg0));
|
3740 |
|
|
stmt = build2 (COMPOUND_EXPR, arg1_type, stmt, decl);
|
3741 |
|
|
return stmt;
|
3742 |
|
|
}
|
3743 |
|
|
|
3744 |
|
|
for (n = 0;
|
3745 |
|
|
!VOID_TYPE_P (TREE_VALUE (fnargs)) && n < nargs;
|
3746 |
|
|
fnargs = TREE_CHAIN (fnargs), n++)
|
3747 |
|
|
{
|
3748 |
|
|
tree decl_type = TREE_VALUE (fnargs);
|
3749 |
|
|
tree arg = VEC_index (tree, arglist, n);
|
3750 |
|
|
tree type;
|
3751 |
|
|
|
3752 |
|
|
if (arg == error_mark_node)
|
3753 |
|
|
return error_mark_node;
|
3754 |
|
|
|
3755 |
|
|
if (n >= 3)
|
3756 |
|
|
abort ();
|
3757 |
|
|
|
3758 |
|
|
arg = default_conversion (arg);
|
3759 |
|
|
|
3760 |
|
|
/* The C++ front-end converts float * to const void * using
|
3761 |
|
|
NOP_EXPR<const void *> (NOP_EXPR<void *> (x)). */
|
3762 |
|
|
type = TREE_TYPE (arg);
|
3763 |
|
|
if (POINTER_TYPE_P (type)
|
3764 |
|
|
&& TREE_CODE (arg) == NOP_EXPR
|
3765 |
|
|
&& lang_hooks.types_compatible_p (TREE_TYPE (arg),
|
3766 |
|
|
const_ptr_type_node)
|
3767 |
|
|
&& lang_hooks.types_compatible_p (TREE_TYPE (TREE_OPERAND (arg, 0)),
|
3768 |
|
|
ptr_type_node))
|
3769 |
|
|
{
|
3770 |
|
|
arg = TREE_OPERAND (arg, 0);
|
3771 |
|
|
type = TREE_TYPE (arg);
|
3772 |
|
|
}
|
3773 |
|
|
|
3774 |
|
|
/* Remove the const from the pointers to simplify the overload
|
3775 |
|
|
matching further down. */
|
3776 |
|
|
if (POINTER_TYPE_P (decl_type)
|
3777 |
|
|
&& POINTER_TYPE_P (type)
|
3778 |
|
|
&& TYPE_QUALS (TREE_TYPE (type)) != 0)
|
3779 |
|
|
{
|
3780 |
|
|
if (TYPE_READONLY (TREE_TYPE (type))
|
3781 |
|
|
&& !TYPE_READONLY (TREE_TYPE (decl_type)))
|
3782 |
|
|
warning (0, "passing arg %d of %qE discards qualifiers from"
|
3783 |
|
|
"pointer target type", n + 1, fndecl);
|
3784 |
|
|
type = build_pointer_type (build_qualified_type (TREE_TYPE (type),
|
3785 |
|
|
0));
|
3786 |
|
|
arg = fold_convert (type, arg);
|
3787 |
|
|
}
|
3788 |
|
|
|
3789 |
|
|
args[n] = arg;
|
3790 |
|
|
types[n] = type;
|
3791 |
|
|
}
|
3792 |
|
|
|
3793 |
|
|
/* If the number of arguments did not match the prototype, return NULL
|
3794 |
|
|
and the generic code will issue the appropriate error message. */
|
3795 |
|
|
if (!VOID_TYPE_P (TREE_VALUE (fnargs)) || n < nargs)
|
3796 |
|
|
return NULL;
|
3797 |
|
|
|
3798 |
|
|
if (n == 0)
|
3799 |
|
|
abort ();
|
3800 |
|
|
|
3801 |
|
|
if (fcode == ALTIVEC_BUILTIN_VEC_STEP)
|
3802 |
|
|
{
|
3803 |
|
|
if (TREE_CODE (types[0]) != VECTOR_TYPE)
|
3804 |
|
|
goto bad;
|
3805 |
|
|
|
3806 |
|
|
return build_int_cst (NULL_TREE, TYPE_VECTOR_SUBPARTS (types[0]));
|
3807 |
|
|
}
|
3808 |
|
|
|
3809 |
|
|
for (desc = altivec_overloaded_builtins;
|
3810 |
|
|
desc->code && desc->code != fcode; desc++)
|
3811 |
|
|
continue;
|
3812 |
|
|
|
3813 |
|
|
/* For arguments after the last, we have RS6000_BTI_NOT_OPAQUE in
|
3814 |
|
|
the opX fields. */
|
3815 |
|
|
for (; desc->code == fcode; desc++)
|
3816 |
|
|
if ((desc->op1 == RS6000_BTI_NOT_OPAQUE
|
3817 |
|
|
|| rs6000_builtin_type_compatible (types[0], desc->op1))
|
3818 |
|
|
&& (desc->op2 == RS6000_BTI_NOT_OPAQUE
|
3819 |
|
|
|| rs6000_builtin_type_compatible (types[1], desc->op2))
|
3820 |
|
|
&& (desc->op3 == RS6000_BTI_NOT_OPAQUE
|
3821 |
|
|
|| rs6000_builtin_type_compatible (types[2], desc->op3)))
|
3822 |
|
|
return altivec_build_resolved_builtin (args, n, desc);
|
3823 |
|
|
|
3824 |
|
|
bad:
|
3825 |
|
|
error ("invalid parameter combination for AltiVec intrinsic");
|
3826 |
|
|
return error_mark_node;
|
3827 |
|
|
}
|