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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [rs6000/] [rs6000.opt] - Blame information for rev 709

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1 709 jeremybenn
; Options for the rs6000 port of the compiler
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;
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; Copyright (C) 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software
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; Foundation, Inc.
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; Contributed by Aldy Hernandez .
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;
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; This file is part of GCC.
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;
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; GCC is free software; you can redistribute it and/or modify it under
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; the terms of the GNU General Public License as published by the Free
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; Software Foundation; either version 3, or (at your option) any later
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; version.
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;
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; GCC is distributed in the hope that it will be useful, but WITHOUT
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; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
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; License for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with GCC; see the file COPYING3.  If not see
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; .
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23
HeaderInclude
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config/rs6000/rs6000-opts.h
25
 
26
;; Current processor
27
TargetVariable
28
enum processor_type rs6000_cpu = PROCESSOR_RIOS1
29
 
30
;; Always emit branch hint bits.
31
TargetVariable
32
unsigned char rs6000_always_hint
33
 
34
;; Schedule instructions for group formation.
35
TargetVariable
36
unsigned char rs6000_sched_groups
37
 
38
;; Align branch targets.
39
TargetVariable
40
unsigned char rs6000_align_branch_targets
41
 
42
;; Support for -msched-costly-dep option.
43
TargetVariable
44
enum rs6000_dependence_cost rs6000_sched_costly_dep = no_dep_costly
45
 
46
;; Support for -minsert-sched-nops option.
47
TargetVariable
48
enum rs6000_nop_insertion rs6000_sched_insert_nops = sched_finish_none
49
 
50
;; Non-zero to allow overriding loop alignment.
51
TargetVariable
52
unsigned char can_override_loop_align
53
 
54
;; Which small data model to use (for System V targets only)
55
TargetVariable
56
enum rs6000_sdata_type rs6000_sdata = SDATA_DATA
57
 
58
;; Bit size of immediate TLS offsets and string from which it is decoded.
59
TargetVariable
60
int rs6000_tls_size = 32
61
 
62
;; ABI enumeration available for subtarget to use.
63
TargetVariable
64
enum rs6000_abi rs6000_current_abi = ABI_NONE
65
 
66
;; Type of traceback to use.
67
TargetVariable
68
enum rs6000_traceback_type rs6000_traceback = traceback_default
69
 
70
;; Control alignment for fields within structures.
71
TargetVariable
72
unsigned char rs6000_alignment_flags
73
 
74
;; Code model for 64-bit linux.
75
TargetVariable
76
enum rs6000_cmodel rs6000_current_cmodel = CMODEL_SMALL
77
 
78
;; What type of reciprocal estimation instructions to generate
79
TargetVariable
80
unsigned int rs6000_recip_control
81
 
82
;; Mask of what builtin functions are allowed
83
TargetVariable
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unsigned int rs6000_builtin_mask
85
 
86
;; Debug flags
87
TargetVariable
88
unsigned int rs6000_debug
89
 
90
;; Save for target_flags_explicit
91
TargetSave
92
int rs6000_target_flags_explicit
93
 
94
mpower
95
Target Report RejectNegative Mask(POWER)
96
Use POWER instruction set
97
 
98
mno-power
99
Target Report RejectNegative
100
Do not use POWER instruction set
101
 
102
mpower2
103
Target Report Mask(POWER2)
104
Use POWER2 instruction set
105
 
106
mpowerpc
107
Target Report RejectNegative Mask(POWERPC)
108
Use PowerPC instruction set
109
 
110
mno-powerpc
111
Target Report RejectNegative
112
Do not use PowerPC instruction set
113
 
114
mpowerpc64
115
Target Report Mask(POWERPC64)
116
Use PowerPC-64 instruction set
117
 
118
mpowerpc-gpopt
119
Target Report Mask(PPC_GPOPT) Save
120
Use PowerPC General Purpose group optional instructions
121
 
122
mpowerpc-gfxopt
123
Target Report Mask(PPC_GFXOPT) Save
124
Use PowerPC Graphics group optional instructions
125
 
126
mmfcrf
127
Target Report Mask(MFCRF) Save
128
Use PowerPC V2.01 single field mfcr instruction
129
 
130
mpopcntb
131
Target Report Mask(POPCNTB) Save
132
Use PowerPC V2.02 popcntb instruction
133
 
134
mfprnd
135
Target Report Mask(FPRND) Save
136
Use PowerPC V2.02 floating point rounding instructions
137
 
138
mcmpb
139
Target Report Mask(CMPB) Save
140
Use PowerPC V2.05 compare bytes instruction
141
 
142
mmfpgpr
143
Target Report Mask(MFPGPR) Save
144
Use extended PowerPC V2.05 move floating point to/from GPR instructions
145
 
146
maltivec
147
Target Report Mask(ALTIVEC) Save
148
Use AltiVec instructions
149
 
150
mhard-dfp
151
Target Report Mask(DFP) Save
152
Use decimal floating point instructions
153
 
154
mmulhw
155
Target Report Mask(MULHW) Save
156
Use 4xx half-word multiply instructions
157
 
158
mdlmzb
159
Target Report Mask(DLMZB) Save
160
Use 4xx string-search dlmzb instruction
161
 
162
mmultiple
163
Target Report Mask(MULTIPLE) Save
164
Generate load/store multiple instructions
165
 
166
mstring
167
Target Report Mask(STRING) Save
168
Generate string instructions for block moves
169
 
170
mnew-mnemonics
171
Target Report RejectNegative Mask(NEW_MNEMONICS)
172
Use new mnemonics for PowerPC architecture
173
 
174
mold-mnemonics
175
Target Report RejectNegative InverseMask(NEW_MNEMONICS)
176
Use old mnemonics for PowerPC architecture
177
 
178
msoft-float
179
Target Report RejectNegative Mask(SOFT_FLOAT)
180
Do not use hardware floating point
181
 
182
mhard-float
183
Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
184
Use hardware floating point
185
 
186
mpopcntd
187
Target Report Mask(POPCNTD) Save
188
Use PowerPC V2.06 popcntd instruction
189
 
190
mfriz
191
Target Report Var(TARGET_FRIZ) Init(-1) Save
192
Under -ffast-math, generate a FRIZ instruction for (double)(long long) conversions
193
 
194
mveclibabi=
195
Target RejectNegative Joined Var(rs6000_veclibabi_name)
196
Vector library ABI to use
197
 
198
mvsx
199
Target Report Mask(VSX) Save
200
Use vector/scalar (VSX) instructions
201
 
202
mvsx-scalar-double
203
Target Undocumented Report Var(TARGET_VSX_SCALAR_DOUBLE) Init(-1)
204
; If -mvsx, use VSX arithmetic instructions for scalar double (on by default)
205
 
206
mvsx-scalar-memory
207
Target Undocumented Report Var(TARGET_VSX_SCALAR_MEMORY)
208
; If -mvsx, use VSX scalar memory reference instructions for scalar double (off by default)
209
 
210
mvsx-align-128
211
Target Undocumented Report Var(TARGET_VSX_ALIGN_128)
212
; If -mvsx, set alignment to 128 bits instead of 32/64
213
 
214
mallow-movmisalign
215
Target Undocumented Var(TARGET_ALLOW_MOVMISALIGN) Init(-1)
216
; Allow/disallow the movmisalign in DF/DI vectors
217
 
218
mallow-df-permute
219
Target Undocumented Var(TARGET_ALLOW_DF_PERMUTE)
220
; Allow/disallow permutation of DF/DI vectors
221
 
222
msched-groups
223
Target Undocumented Report Var(TARGET_SCHED_GROUPS) Init(-1)
224
; Explicitly set/unset whether rs6000_sched_groups is set
225
 
226
malways-hint
227
Target Undocumented Report Var(TARGET_ALWAYS_HINT) Init(-1)
228
; Explicitly set/unset whether rs6000_always_hint is set
229
 
230
malign-branch-targets
231
Target Undocumented Report Var(TARGET_ALIGN_BRANCH_TARGETS) Init(-1)
232
; Explicitly set/unset whether rs6000_align_branch_targets is set
233
 
234
mvectorize-builtins
235
Target Undocumented Report Var(TARGET_VECTORIZE_BUILTINS) Init(-1)
236
; Explicitly control whether we vectorize the builtins or not.
237
 
238
mno-update
239
Target Report RejectNegative Mask(NO_UPDATE) Save
240
Do not generate load/store with update instructions
241
 
242
mupdate
243
Target Report RejectNegative InverseMask(NO_UPDATE, UPDATE)
244
Generate load/store with update instructions
245
 
246
msingle-pic-base
247
Target Report Var(TARGET_SINGLE_PIC_BASE) Init(0)
248
Do not load the PIC register in function prologues
249
 
250
mavoid-indexed-addresses
251
Target Report Var(TARGET_AVOID_XFORM) Init(-1) Save
252
Avoid generation of indexed load/store instructions when possible
253
 
254
mtls-markers
255
Target Report Var(tls_markers) Init(1) Save
256
Mark __tls_get_addr calls with argument info
257
 
258
msched-epilog
259
Target Undocumented Var(TARGET_SCHED_PROLOG) Init(1) Save
260
 
261
msched-prolog
262
Target Report Var(TARGET_SCHED_PROLOG) Save
263
Schedule the start and end of the procedure
264
 
265
maix-struct-return
266
Target Report RejectNegative Var(aix_struct_return) Save
267
Return all structures in memory (AIX default)
268
 
269
msvr4-struct-return
270
Target Report RejectNegative Var(aix_struct_return,0) Save
271
Return small structures in registers (SVR4 default)
272
 
273
mxl-compat
274
Target Report Var(TARGET_XL_COMPAT) Save
275
Conform more closely to IBM XLC semantics
276
 
277
mrecip
278
Target Report
279
Generate software reciprocal divide and square root for better throughput.
280
 
281
mrecip=
282
Target Report RejectNegative Joined Var(rs6000_recip_name)
283
Generate software reciprocal divide and square root for better throughput.
284
 
285
mrecip-precision
286
Target Report Mask(RECIP_PRECISION) Save
287
Assume that the reciprocal estimate instructions provide more accuracy.
288
 
289
mno-fp-in-toc
290
Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC) Save
291
Do not place floating point constants in TOC
292
 
293
mfp-in-toc
294
Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC,0) Save
295
Place floating point constants in TOC
296
 
297
mno-sum-in-toc
298
Target RejectNegative Var(TARGET_NO_SUM_IN_TOC) Save
299
Do not place symbol+offset constants in TOC
300
 
301
msum-in-toc
302
Target RejectNegative Var(TARGET_NO_SUM_IN_TOC,0) Save
303
Place symbol+offset constants in TOC
304
 
305
;  Output only one TOC entry per module.  Normally linking fails if
306
;   there are more than 16K unique variables/constants in an executable.  With
307
;   this option, linking fails only if there are more than 16K modules, or
308
;   if there are more than 16K unique variables/constant in a single module.
309
;
310
;   This is at the cost of having 2 extra loads and one extra store per
311
;   function, and one less allocable register.
312
mminimal-toc
313
Target Report Mask(MINIMAL_TOC)
314
Use only one TOC entry per procedure
315
 
316
mfull-toc
317
Target Report
318
Put everything in the regular TOC
319
 
320
mvrsave
321
Target Report Var(TARGET_ALTIVEC_VRSAVE) Save
322
Generate VRSAVE instructions when generating AltiVec code
323
 
324
mvrsave=no
325
Target RejectNegative Alias(mvrsave) NegativeAlias
326
Deprecated option.  Use -mno-vrsave instead
327
 
328
mvrsave=yes
329
Target RejectNegative Alias(mvrsave)
330
Deprecated option.  Use -mvrsave instead
331
 
332
mblock-move-inline-limit=
333
Target Report Var(rs6000_block_move_inline_limit) Init(0) RejectNegative Joined UInteger Save
334
Specify how many bytes should be moved inline before calling out to memcpy/memmove
335
 
336
misel
337
Target Report Mask(ISEL) Save
338
Generate isel instructions
339
 
340
misel=no
341
Target RejectNegative Alias(misel) NegativeAlias
342
Deprecated option.  Use -mno-isel instead
343
 
344
misel=yes
345
Target RejectNegative Alias(misel)
346
Deprecated option.  Use -misel instead
347
 
348
mspe
349
Target Var(rs6000_spe) Save
350
Generate SPE SIMD instructions on E500
351
 
352
mpaired
353
Target Var(rs6000_paired_float) Save
354
Generate PPC750CL paired-single instructions
355
 
356
mspe=no
357
Target RejectNegative Alias(mspe) NegativeAlias
358
Deprecated option.  Use -mno-spe instead
359
 
360
mspe=yes
361
Target RejectNegative Alias(mspe)
362
Deprecated option.  Use -mspe instead
363
 
364
mdebug=
365
Target RejectNegative Joined
366
-mdebug=        Enable debug output
367
 
368
mabi=altivec
369
Target RejectNegative Var(rs6000_altivec_abi) Save
370
Use the AltiVec ABI extensions
371
 
372
mabi=no-altivec
373
Target RejectNegative Var(rs6000_altivec_abi, 0)
374
Do not use the AltiVec ABI extensions
375
 
376
mabi=spe
377
Target RejectNegative Var(rs6000_spe_abi) Save
378
Use the SPE ABI extensions
379
 
380
mabi=no-spe
381
Target RejectNegative Var(rs6000_spe_abi, 0)
382
Do not use the SPE ABI extensions
383
 
384
; These are here for testing during development only, do not document
385
; in the manual please.
386
 
387
; If we want Darwin's struct-by-value-in-regs ABI.
388
mabi=d64
389
Target RejectNegative Undocumented Warn(using darwin64 ABI) Var(rs6000_darwin64_abi) Save
390
 
391
mabi=d32
392
Target RejectNegative Undocumented Warn(using old darwin ABI) Var(rs6000_darwin64_abi, 0)
393
 
394
mabi=ieeelongdouble
395
Target RejectNegative Undocumented Warn(using IEEE extended precision long double) Var(rs6000_ieeequad) Save
396
 
397
mabi=ibmlongdouble
398
Target RejectNegative Undocumented Warn(using IBM extended precision long double) Var(rs6000_ieeequad, 0)
399
 
400
mcpu=
401
Target RejectNegative Joined Var(rs6000_cpu_index) Init(-1) Enum(rs6000_cpu_opt_value) Save
402
-mcpu=  Use features of and schedule code for given CPU
403
 
404
mtune=
405
Target RejectNegative Joined Var(rs6000_tune_index) Init(-1) Enum(rs6000_cpu_opt_value) Save
406
-mtune= Schedule code for given CPU
407
 
408
mtraceback=
409
Target RejectNegative Joined Enum(rs6000_traceback_type) Var(rs6000_traceback)
410
-mtraceback=    Select full, part, or no traceback table
411
 
412
Enum
413
Name(rs6000_traceback_type) Type(enum rs6000_traceback_type)
414
 
415
EnumValue
416
Enum(rs6000_traceback_type) String(full) Value(traceback_full)
417
 
418
EnumValue
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Enum(rs6000_traceback_type) String(part) Value(traceback_part)
420
 
421
EnumValue
422
Enum(rs6000_traceback_type) String(no) Value(traceback_none)
423
 
424
mlongcall
425
Target Report Var(rs6000_default_long_calls) Save
426
Avoid all range limits on call instructions
427
 
428
mgen-cell-microcode
429
Target Report Var(rs6000_gen_cell_microcode) Init(-1) Save
430
Generate Cell microcode
431
 
432
mwarn-cell-microcode
433
Target Var(rs6000_warn_cell_microcode) Init(0) Warning Save
434
Warn when a Cell microcoded instruction is emitted
435
 
436
mwarn-altivec-long
437
Target Var(rs6000_warn_altivec_long) Init(1) Save
438
Warn about deprecated 'vector long ...' AltiVec type usage
439
 
440
mfloat-gprs=
441
Target RejectNegative Joined Enum(rs6000_float_gprs) Var(rs6000_float_gprs) Save
442
-mfloat-gprs=   Select GPR floating point method
443
 
444
Enum
445
Name(rs6000_float_gprs) Type(unsigned char)
446
Valid arguments to -mfloat-gprs=:
447
 
448
EnumValue
449
Enum(rs6000_float_gprs) String(yes) Value(1)
450
 
451
EnumValue
452
Enum(rs6000_float_gprs) String(single) Value(1)
453
 
454
EnumValue
455
Enum(rs6000_float_gprs) String(double) Value(2)
456
 
457
EnumValue
458
Enum(rs6000_float_gprs) String(no) Value(0)
459
 
460
mlong-double-
461
Target RejectNegative Joined UInteger Var(rs6000_long_double_type_size) Save
462
-mlong-double-  Specify size of long double (64 or 128 bits)
463
 
464
msched-costly-dep=
465
Target RejectNegative Joined Var(rs6000_sched_costly_dep_str)
466
Determine which dependences between insns are considered costly
467
 
468
minsert-sched-nops=
469
Target RejectNegative Joined Var(rs6000_sched_insert_nops_str)
470
Specify which post scheduling nop insertion scheme to apply
471
 
472
malign-
473
Target RejectNegative Joined Enum(rs6000_alignment_flags) Var(rs6000_alignment_flags)
474
Specify alignment of structure fields default/natural
475
 
476
Enum
477
Name(rs6000_alignment_flags) Type(unsigned char)
478
Valid arguments to -malign-:
479
 
480
EnumValue
481
Enum(rs6000_alignment_flags) String(power) Value(MASK_ALIGN_POWER)
482
 
483
EnumValue
484
Enum(rs6000_alignment_flags) String(natural) Value(MASK_ALIGN_NATURAL)
485
 
486
mprioritize-restricted-insns=
487
Target RejectNegative Joined UInteger Var(rs6000_sched_restricted_insns_priority) Save
488
Specify scheduling priority for dispatch slot restricted insns
489
 
490
msingle-float
491
Target RejectNegative Var(rs6000_single_float) Save
492
Single-precision floating point unit
493
 
494
mdouble-float
495
Target RejectNegative Var(rs6000_double_float) Save
496
Double-precision floating point unit
497
 
498
msimple-fpu
499
Target RejectNegative Var(rs6000_simple_fpu) Save
500
Floating point unit does not support divide & sqrt
501
 
502
mfpu=
503
Target RejectNegative Joined Enum(fpu_type_t) Var(rs6000_fpu_type) Init(FPU_NONE)
504
-mfpu=  Specify FP (sp, dp, sp-lite, dp-lite) (implies -mxilinx-fpu)
505
 
506
Enum
507
Name(fpu_type_t) Type(enum fpu_type_t)
508
 
509
EnumValue
510
Enum(fpu_type_t) String(none) Value(FPU_NONE)
511
 
512
EnumValue
513
Enum(fpu_type_t) String(sp_lite) Value(FPU_SF_LITE)
514
 
515
EnumValue
516
Enum(fpu_type_t) String(dp_lite) Value(FPU_DF_LITE)
517
 
518
EnumValue
519
Enum(fpu_type_t) String(sp_full) Value(FPU_SF_FULL)
520
 
521
EnumValue
522
Enum(fpu_type_t) String(dp_full) Value(FPU_DF_FULL)
523
 
524
mxilinx-fpu
525
Target Var(rs6000_xilinx_fpu) Save
526
Specify Xilinx FPU.
527
 
528
mpointers-to-nested-functions
529
Target Report Var(TARGET_POINTERS_TO_NESTED_FUNCTIONS) Init(1) Save
530
Use/do not use r11 to hold the static link in calls to functions via pointers.
531
 
532
msave-toc-indirect
533
Target Report Var(TARGET_SAVE_TOC_INDIRECT) Save
534
Control whether we save the TOC in the prologue for indirect calls or generate the save inline

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