OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [score/] [score-conv.h] - Blame information for rev 749

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 709 jeremybenn
/* score-conv.h for Sunplus S+CORE processor
2
   Copyright (C) 2005, 2007, 2009, 2010 Free Software Foundation, Inc.
3
 
4
   This file is part of GCC.
5
 
6
   GCC is free software; you can redistribute it and/or modify it
7
   under the terms of the GNU General Public License as published
8
   by the Free Software Foundation; either version 3, or (at your
9
   option) any later version.
10
 
11
   GCC is distributed in the hope that it will be useful, but WITHOUT
12
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
14
   License for more details.
15
 
16
   You should have received a copy of the GNU General Public License
17
   along with GCC; see the file COPYING3.  If not see
18
   <http://www.gnu.org/licenses/>.  */
19
 
20
#ifndef GCC_SCORE_CONV_H
21
#define GCC_SCORE_CONV_H
22
 
23
#define GP_REG_FIRST                    0U
24
#define GP_REG_LAST                     31U
25
#define GP_REG_NUM                      (GP_REG_LAST - GP_REG_FIRST + 1U)
26
#define GP_DBX_FIRST                    0U
27
 
28
#define CE_REG_FIRST                    48U
29
#define CE_REG_LAST                     49U
30
#define CE_REG_NUM                      (CE_REG_LAST - CE_REG_FIRST + 1U)
31
 
32
#define ARG_REG_FIRST                   4U
33
#define ARG_REG_LAST                    7U
34
#define ARG_REG_NUM                     (ARG_REG_LAST - ARG_REG_FIRST + 1U)
35
 
36
#define REG_CONTAIN(REGNO, FIRST, NUM) \
37
  ((unsigned int)((int) (REGNO) - (FIRST)) < (NUM))
38
 
39
#define GP_REG_P(REGNO)        REG_CONTAIN (REGNO, GP_REG_FIRST, GP_REG_NUM)
40
 
41
#define G8_REG_P(REGNO)        REG_CONTAIN (REGNO, GP_REG_FIRST, 8)
42
 
43
#define G16_REG_P(REGNO)       REG_CONTAIN (REGNO, GP_REG_FIRST, 16)
44
 
45
#define CE_REG_P(REGNO)        REG_CONTAIN (REGNO, CE_REG_FIRST, CE_REG_NUM)
46
 
47
#define GR_REG_CLASS_P(C)        ((C) == G16_REGS || (C) == G32_REGS)
48
#define SP_REG_CLASS_P(C) \
49
  ((C) == CN_REG || (C) == LC_REG || (C) == SC_REG || (C) == SP_REGS)
50
#define CP_REG_CLASS_P(C) \
51
  ((C) == CP1_REGS || (C) == CP2_REGS || (C) == CP3_REGS || (C) == CPA_REGS)
52
#define CE_REG_CLASS_P(C) \
53
  ((C) == HI_REG || (C) == LO_REG || (C) == CE_REGS)
54
 
55
#define UIMM_IN_RANGE(V, W) \
56
  ((V) >= 0 \
57
   && ((unsigned HOST_WIDE_INT) (V) \
58
       <= (((unsigned HOST_WIDE_INT) 2 << ((W) - 1)) - 1)))
59
 
60
#define SIMM_IN_RANGE(V, W)                            \
61
  ((V) >= ((HOST_WIDE_INT) -1 << ((W) - 1))      \
62
   && (V) <= (((HOST_WIDE_INT) 1 << ((W) - 1)) - 1))
63
 
64
#define IMM_IN_RANGE(V, W, S)  \
65
  ((S) ? SIMM_IN_RANGE (V, W) : UIMM_IN_RANGE (V, W))
66
 
67
#define IMM_IS_POW_OF_2(V, E1, E2)                 \
68
  ((V) >= ((unsigned HOST_WIDE_INT) 1 << (E1))     \
69
   && (V) <= ((unsigned HOST_WIDE_INT) 1 << (E2))  \
70
   && ((V) & ((V) - 1)) == 0)
71
 
72
enum score_symbol_type
73
{
74
  SYMBOL_GENERAL,
75
  SYMBOL_SMALL_DATA  /* The symbol refers to something in a small data section  */
76
};
77
 
78
#endif

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.