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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [sh/] [sh-modes.def] - Blame information for rev 801

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Line No. Rev Author Line
1 709 jeremybenn
/* SH extra machine modes.
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   Copyright (C) 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3.  If not see
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.  */
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/* The SH uses a partial integer mode to represent the FPSCR register.  */
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PARTIAL_INT_MODE (SI);
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/* PDI mode is used to represent a function address in a target register.  */
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PARTIAL_INT_MODE (DI);
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/* Vector modes.  */
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VECTOR_MODE  (INT, QI, 2);    /*                 V2QI */
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VECTOR_MODES (INT, 4);        /*            V4QI V2HI */
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VECTOR_MODES (INT, 8);        /*       V8QI V4HI V2SI */
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VECTOR_MODES (INT, 16);       /* V16QI V8HI V4SI V2DI */
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VECTOR_MODES (FLOAT, 8);      /*            V4HF V2SF */
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VECTOR_MODES (FLOAT, 16);     /*       V8HF V4SF V2DF */
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VECTOR_MODE (INT, DI, 4);     /*                 V4DI */
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VECTOR_MODE (INT, DI, 8);     /*                 V8DI */
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VECTOR_MODE (FLOAT, SF, 16);  /*                V16SF */

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