OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [sparc/] [sparc-protos.h] - Blame information for rev 801

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 709 jeremybenn
/* Prototypes of target machine for SPARC.
2
   Copyright (C) 1999, 2000, 2003, 2004, 2005, 2007, 2008, 2009, 2010
3
   Free Software Foundation, Inc.
4
   Contributed by Michael Tiemann (tiemann@cygnus.com).
5
   64-bit SPARC-V9 support by Michael Tiemann, Jim Wilson, and Doug Evans,
6
   at Cygnus Support.
7
 
8
This file is part of GCC.
9
 
10
GCC is free software; you can redistribute it and/or modify
11
it under the terms of the GNU General Public License as published by
12
the Free Software Foundation; either version 3, or (at your option)
13
any later version.
14
 
15
GCC is distributed in the hope that it will be useful,
16
but WITHOUT ANY WARRANTY; without even the implied warranty of
17
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18
GNU General Public License for more details.
19
 
20
You should have received a copy of the GNU General Public License
21
along with GCC; see the file COPYING3.  If not see
22
<http://www.gnu.org/licenses/>.  */
23
 
24
#ifndef __SPARC_PROTOS_H__
25
#define __SPARC_PROTOS_H__
26
 
27
#ifdef TREE_CODE
28
#ifdef RTX_CODE
29
extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree);
30
#endif
31
extern unsigned long sparc_type_code (tree);
32
#ifdef ARGS_SIZE_RTX
33
/* expr.h defines ARGS_SIZE_RTX and `enum direction' */
34
extern enum direction function_arg_padding (enum machine_mode, const_tree);
35
#endif /* ARGS_SIZE_RTX */
36
#endif /* TREE_CODE */
37
 
38
extern void order_regs_for_local_alloc (void);
39
extern HOST_WIDE_INT sparc_compute_frame_size (HOST_WIDE_INT, int);
40
extern void sparc_expand_prologue (void);
41
extern void sparc_flat_expand_prologue (void);
42
extern void sparc_expand_epilogue (bool);
43
extern void sparc_flat_expand_epilogue (bool);
44
extern bool sparc_can_use_return_insn_p (void);
45
extern int check_pic (int);
46
extern void sparc_profile_hook (int);
47
extern void sparc_override_options (void);
48
extern void sparc_output_scratch_registers (FILE *);
49
extern void sparc_target_macros (void);
50
 
51
#ifdef RTX_CODE
52
extern enum machine_mode select_cc_mode (enum rtx_code, rtx, rtx);
53
/* Define the function that build the compare insn for scc and bcc.  */
54
extern rtx gen_compare_reg (rtx cmp);
55
extern rtx sparc_emit_float_lib_cmp (rtx, rtx, enum rtx_code);
56
extern void sparc_emit_floatunsdi (rtx [2], enum machine_mode);
57
extern void sparc_emit_fixunsdi (rtx [2], enum machine_mode);
58
extern void emit_tfmode_binop (enum rtx_code, rtx *);
59
extern void emit_tfmode_unop (enum rtx_code, rtx *);
60
extern void emit_tfmode_cvt (enum rtx_code, rtx *);
61
extern bool constant_address_p (rtx);
62
extern bool legitimate_pic_operand_p (rtx);
63
extern rtx sparc_legitimize_reload_address (rtx, enum machine_mode, int, int,
64
                                            int, int *win);
65
extern void load_got_register (void);
66
extern void sparc_emit_call_insn (rtx, rtx);
67
extern void sparc_defer_case_vector (rtx, rtx, int);
68
extern bool sparc_expand_move (enum machine_mode, rtx *);
69
extern void sparc_emit_set_symbolic_const64 (rtx, rtx, rtx);
70
extern int sparc_splitdi_legitimate (rtx, rtx);
71
extern int sparc_split_regreg_legitimate (rtx, rtx);
72
extern int sparc_absnegfloat_split_legitimate (rtx, rtx);
73
extern const char *output_ubranch (rtx, int, rtx);
74
extern const char *output_cbranch (rtx, rtx, int, int, int, rtx);
75
extern const char *output_return (rtx);
76
extern const char *output_sibcall (rtx, rtx);
77
extern const char *output_v8plus_shift (rtx, rtx *, const char *);
78
extern const char *output_v8plus_mult (rtx, rtx *, const char *);
79
extern const char *output_v9branch (rtx, rtx, int, int, int, int, rtx);
80
extern const char *output_probe_stack_range (rtx, rtx);
81
extern bool emit_scc_insn (rtx []);
82
extern void emit_conditional_branch_insn (rtx []);
83
extern int mems_ok_for_ldd_peep (rtx, rtx, rtx);
84
extern int arith_double_4096_operand (rtx, enum machine_mode);
85
extern int arith_4096_operand (rtx, enum machine_mode);
86
extern int zero_operand (rtx, enum machine_mode);
87
extern int fp_zero_operand (rtx, enum machine_mode);
88
extern int reg_or_0_operand (rtx, enum machine_mode);
89
extern int empty_delay_slot (rtx);
90
extern int eligible_for_return_delay (rtx);
91
extern int eligible_for_sibcall_delay (rtx);
92
extern int tls_call_delay (rtx);
93
extern int emit_move_sequence (rtx, enum machine_mode);
94
extern int fp_sethi_p (rtx);
95
extern int fp_mov_p (rtx);
96
extern int fp_high_losum_p (rtx);
97
extern int mem_min_alignment (rtx, int);
98
extern int pic_address_needs_scratch (rtx);
99
extern int register_ok_for_ldd (rtx);
100
extern int memory_ok_for_ldd (rtx);
101
extern int registers_ok_for_ldd_peep (rtx, rtx);
102
extern int v9_regcmp_p (enum rtx_code);
103
/* Function used for V8+ code generation.  Returns 1 if the high
104
   32 bits of REG are 0 before INSN.  */
105
extern int sparc_check_64 (rtx, rtx);
106
extern rtx gen_df_reg (rtx, int);
107
extern void sparc_expand_compare_and_swap (rtx op[]);
108
extern void sparc_expand_vector_init (rtx, rtx);
109
extern void sparc_expand_vec_perm_bmask(enum machine_mode, rtx);
110
extern bool sparc_expand_conditional_move (enum machine_mode, rtx *);
111
extern void sparc_expand_vcond (enum machine_mode, rtx *, int, int);
112
unsigned int sparc_regmode_natural_size (enum machine_mode);
113
bool sparc_modes_tieable_p (enum machine_mode, enum machine_mode);
114
#endif /* RTX_CODE */
115
 
116
extern void sparc_emit_membar_for_model (enum memmodel, int, int);
117
 
118
#endif /* __SPARC_PROTOS_H__ */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.