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jeremybenn |
/* Definitions of Synergistic Processing Unit (SPU). */
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/* Copyright (C) 2006, 2009 Free Software Foundation, Inc.
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This file is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3 of the License, or (at your option)
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any later version.
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This file is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#ifndef _SPU_INTRINSICS_H
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#define _SPU_INTRINSICS_H
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#define vec_uchar16 __vector unsigned char
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#define vec_char16 __vector signed char
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#define vec_ushort8 __vector unsigned short
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#define vec_short8 __vector signed short
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#define vec_uint4 __vector unsigned int
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#define vec_int4 __vector signed int
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#define vec_ullong2 __vector unsigned long long
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#define vec_llong2 __vector signed long long
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#define vec_float4 __vector float
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#define vec_double2 __vector double
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/* SPU Channel Defines
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*/
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#define SPU_RdEventStat 0
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#define SPU_WrEventMask 1
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#define SPU_WrEventAck 2
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#define SPU_RdSigNotify1 3
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#define SPU_RdSigNotify2 4
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#define SPU_WrDec 7
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#define SPU_RdDec 8
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#define SPU_RdEventMask 11
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#define SPU_RdMachStat 13
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#define SPU_WrSRR0 14
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#define SPU_RdSRR0 15
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#define SPU_WrOutMbox 28
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#define SPU_RdInMbox 29
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#define SPU_WrOutIntrMbox 30
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/* MFC Channel Defines.
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*/
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#define MFC_WrMSSyncReq 9
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#define MFC_RdTagMask 12
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#define MFC_LSA 16
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#define MFC_EAH 17
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#define MFC_EAL 18
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#define MFC_Size 19
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#define MFC_TagID 20
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#define MFC_Cmd 21
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#define MFC_WrTagMask 22
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#define MFC_WrTagUpdate 23
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#define MFC_RdTagStat 24
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#define MFC_RdListStallStat 25
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#define MFC_WrListStallAck 26
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#define MFC_RdAtomicStat 27
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/* Bit flag mnemonics for test special value.
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*/
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#define SPU_SV_NEG_DENORM 0x01 /* negative denormalized number */
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#define SPU_SV_POS_DENORM 0x02 /* positive denormalized number */
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#define SPU_SV_NEG_ZERO 0x04 /* negative zero */
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#define SPU_SV_POS_ZERO 0x08 /* positive zero */
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#define SPU_SV_NEG_INFINITY 0x10 /* negative infinity */
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#define SPU_SV_POS_INFINITY 0x20 /* positive infinity */
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#define SPU_SV_NAN 0x40 /* not a number */
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#include <spu_internals.h>
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#endif /* _SPU_INTRINSICS_H */
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