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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [stormy16/] [stormy16.h] - Blame information for rev 709

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1 709 jeremybenn
/* Xstormy16 cpu description.
2
   Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2007,
3
   2008, 2009, 2010, 2011  Free Software Foundation, Inc.
4
   Contributed by Red Hat, Inc.
5
 
6
   This file is part of GCC.
7
 
8
   GCC is free software; you can redistribute it and/or modify
9
   it under the terms of the GNU General Public License as published by
10
   the Free Software Foundation; either version 3, or (at your option)
11
   any later version.
12
 
13
   GCC is distributed in the hope that it will be useful,
14
   but WITHOUT ANY WARRANTY; without even the implied warranty of
15
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
   GNU General Public License for more details.
17
 
18
   You should have received a copy of the GNU General Public License
19
   along with GCC; see the file COPYING3.  If not see
20
   <http://www.gnu.org/licenses/>.  */
21
 
22
 
23
/* Driver configuration.  */
24
 
25
#undef  ASM_SPEC
26
#define ASM_SPEC ""
27
 
28
#undef  LINK_SPEC
29
#define LINK_SPEC "%{h*} %{v:-V} \
30
                   %{static:-Bstatic} %{shared:-shared} %{symbolic:-Bsymbolic}"
31
 
32
/* For xstormy16:
33
   - If -msim is specified, everything is built and linked as for the sim.
34
   - If -T is specified, that linker script is used, and it should provide
35
     appropriate libraries.
36
   - If neither is specified, everything is built as for the sim, but no
37
     I/O support is assumed.  */
38
#undef  LIB_SPEC
39
#define LIB_SPEC "-( -lc %{msim:-lsim}%{!msim:%{!T*:-lnosys}} -)"
40
 
41
#undef  STARTFILE_SPEC
42
#define STARTFILE_SPEC "crt0.o%s crti.o%s crtbegin.o%s"
43
 
44
#undef  ENDFILE_SPEC
45
#define ENDFILE_SPEC "crtend.o%s crtn.o%s"
46
 
47
 
48
/* Run-time target specifications.  */
49
 
50
#define TARGET_CPU_CPP_BUILTINS()               \
51
  do                                            \
52
    {                                           \
53
      builtin_define_std ("xstormy16");         \
54
      builtin_assert ("machine=xstormy16");     \
55
      builtin_assert ("cpu=xstormy16");         \
56
    }                                           \
57
  while (0)
58
 
59
/* Storage Layout.  */
60
 
61
#define BITS_BIG_ENDIAN 1
62
 
63
#define BYTES_BIG_ENDIAN 0
64
 
65
#define WORDS_BIG_ENDIAN 0
66
 
67
#define UNITS_PER_WORD 2
68
 
69
#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE)       \
70
  do                                            \
71
    {                                           \
72
      if (GET_MODE_CLASS (MODE) == MODE_INT     \
73
          && GET_MODE_SIZE (MODE) < 2)          \
74
        (MODE) = HImode;                        \
75
    }                                           \
76
  while (0)
77
 
78
#define PARM_BOUNDARY 16
79
 
80
#define STACK_BOUNDARY 16
81
 
82
#define FUNCTION_BOUNDARY 16
83
 
84
#define BIGGEST_ALIGNMENT 16
85
 
86
#define DATA_ALIGNMENT(TYPE, ALIGN)             \
87
  (TREE_CODE (TYPE) == ARRAY_TYPE               \
88
   && TYPE_MODE (TREE_TYPE (TYPE)) == QImode    \
89
   && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
90
 
91
#define CONSTANT_ALIGNMENT(EXP, ALIGN)  \
92
  (TREE_CODE (EXP) == STRING_CST        \
93
   && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
94
 
95
#define STRICT_ALIGNMENT 1
96
 
97
#define PCC_BITFIELD_TYPE_MATTERS 1
98
 
99
/* Layout of Source Language Data Types.  */
100
 
101
#define INT_TYPE_SIZE 16
102
 
103
#define SHORT_TYPE_SIZE 16
104
 
105
#define LONG_TYPE_SIZE 32
106
 
107
#define LONG_LONG_TYPE_SIZE 64
108
 
109
#define FLOAT_TYPE_SIZE 32
110
 
111
#define DOUBLE_TYPE_SIZE 64
112
 
113
#define LONG_DOUBLE_TYPE_SIZE 64
114
 
115
#define DEFAULT_SIGNED_CHAR 0
116
 
117
#define SIZE_TYPE "unsigned int"
118
 
119
#define PTRDIFF_TYPE "int"
120
 
121
#undef  WCHAR_TYPE
122
#define WCHAR_TYPE "long int"
123
 
124
#undef  WCHAR_TYPE_SIZE
125
#define WCHAR_TYPE_SIZE 32
126
 
127
 
128
/* Register Basics.  */
129
 
130
#define FIRST_PSEUDO_REGISTER 19
131
 
132
#define FIXED_REGISTERS \
133
  { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1 }
134
 
135
#define CALL_USED_REGISTERS \
136
  { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1 }
137
 
138
 
139
/* Order of allocation of registers.  */
140
 
141
#define REG_ALLOC_ORDER { 7, 6, 5, 4, 3, 2, 1, 0, 9, 8, 10, 11, 12, 13, 14, 15, 16 }
142
 
143
 
144
/* How Values Fit in Registers.  */
145
 
146
#define HARD_REGNO_NREGS(REGNO, MODE)                           \
147
  ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
148
 
149
#define HARD_REGNO_MODE_OK(REGNO, MODE) ((REGNO) != 16 || (MODE) == BImode)
150
 
151
/* A C expression that is nonzero if it is desirable to choose register
152
   allocation so as to avoid move instructions between a value of mode MODE1
153
   and a value of mode MODE2.
154
 
155
   If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are
156
   ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be
157
   zero.  */
158
#define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) != BImode && (MODE2) != BImode)
159
 
160
 
161
/* Register Classes.  */
162
 
163
enum reg_class
164
{
165
  NO_REGS,
166
  R0_REGS,
167
  R1_REGS,
168
  TWO_REGS,
169
  R2_REGS,
170
  EIGHT_REGS,
171
  R8_REGS,
172
  ICALL_REGS,
173
  GENERAL_REGS,
174
  ALL_REGS,
175
  LIM_REG_CLASSES
176
};
177
 
178
#define N_REG_CLASSES ((int) LIM_REG_CLASSES)
179
 
180
#define REG_CLASS_NAMES                         \
181
{                                               \
182
  "NO_REGS",                                    \
183
  "R0_REGS",                                    \
184
  "R1_REGS",                                    \
185
  "TWO_REGS",                                   \
186
  "R2_REGS",                                    \
187
  "EIGHT_REGS",                                 \
188
  "R8_REGS",                                    \
189
  "ICALL_REGS",                                 \
190
  "GENERAL_REGS",                               \
191
  "ALL_REGS"                                    \
192
}
193
 
194
#define REG_CLASS_CONTENTS                      \
195
{                                               \
196
  { 0x00000 },                                  \
197
  { 0x00001 },                                  \
198
  { 0x00002 },                                  \
199
  { 0x00003 },                                  \
200
  { 0x00004 },                                  \
201
  { 0x000FF },                                  \
202
  { 0x00100 },                                  \
203
  { 0x00300 },                                  \
204
  { 0x6FFFF },                                  \
205
  { (1 << FIRST_PSEUDO_REGISTER) - 1 }          \
206
}
207
 
208
#define REGNO_REG_CLASS(REGNO)                  \
209
  (  (REGNO) ==  0 ? R0_REGS                    \
210
   : (REGNO) ==  1 ? R1_REGS                    \
211
   : (REGNO) ==  2 ? R2_REGS                    \
212
   : (REGNO) <   8 ? EIGHT_REGS                 \
213
   : (REGNO) ==  8 ? R8_REGS                    \
214
   : (REGNO) <= 18 ? GENERAL_REGS               \
215
   : ALL_REGS)
216
 
217
#define BASE_REG_CLASS GENERAL_REGS
218
 
219
#define INDEX_REG_CLASS GENERAL_REGS
220
 
221
#define REGNO_OK_FOR_BASE_P(NUM) 1
222
 
223
#define REGNO_OK_FOR_INDEX_P(NUM) REGNO_OK_FOR_BASE_P (NUM)
224
 
225
/* This chip has the interesting property that only the first eight
226
   registers can be moved to/from memory.  */
227
#define SECONDARY_RELOAD_CLASS(CLASS, MODE, X)                  \
228
  xstormy16_secondary_reload_class (CLASS, MODE, X)
229
 
230
 
231
/* Basic Stack Layout.  */
232
 
233
/* We want to use post-increment instructions to push things on the stack,
234
   because we don't have any pre-increment ones.  */
235
#define STACK_PUSH_CODE POST_INC
236
 
237
#define FRAME_GROWS_DOWNWARD 0
238
 
239
#define ARGS_GROW_DOWNWARD 1
240
 
241
#define STARTING_FRAME_OFFSET 0
242
 
243
#define FIRST_PARM_OFFSET(FUNDECL) 0
244
 
245
#define RETURN_ADDR_RTX(COUNT, FRAMEADDR)       \
246
  ((COUNT) == 0                                 \
247
   ? gen_rtx_MEM (Pmode, arg_pointer_rtx)       \
248
   : NULL_RTX)
249
 
250
#define INCOMING_RETURN_ADDR_RTX  \
251
   gen_rtx_MEM (SImode, gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (-4)))
252
 
253
#define INCOMING_FRAME_SP_OFFSET (xstormy16_interrupt_function_p () ? -6 : -4)
254
 
255
 
256
/* Register That Address the Stack Frame.  */
257
 
258
#define STATIC_CHAIN_REGNUM      1
259
#define HARD_FRAME_POINTER_REGNUM 13
260
#define STACK_POINTER_REGNUM    15
261
#define CARRY_REGNUM            16
262
#define FRAME_POINTER_REGNUM    17
263
#define ARG_POINTER_REGNUM      18
264
 
265
 
266
/* Eliminating the Frame Pointer and the Arg Pointer.  */
267
 
268
#define ELIMINABLE_REGS                                 \
269
{                                                       \
270
  {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},         \
271
  {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},    \
272
  {ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM},         \
273
  {ARG_POINTER_REGNUM,   HARD_FRAME_POINTER_REGNUM},    \
274
}
275
 
276
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
277
  (OFFSET) = xstormy16_initial_elimination_offset (FROM, TO)
278
 
279
 
280
/* Passing Function Arguments on the Stack.  */
281
 
282
#define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1)
283
 
284
 
285
/* Function Arguments in Registers.  */
286
 
287
#define NUM_ARGUMENT_REGISTERS  6
288
#define FIRST_ARGUMENT_REGISTER 2
289
 
290
#define XSTORMY16_WORD_SIZE(TYPE, MODE)                         \
291
  ((((TYPE) ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE))  \
292
    + 1)                                                        \
293
   / 2)
294
 
295
/* For this platform, the value of CUMULATIVE_ARGS is the number of words
296
   of arguments that have been passed in registers so far.  */
297
#define CUMULATIVE_ARGS int
298
 
299
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
300
  (CUM) = 0
301
 
302
#define FUNCTION_ARG_REGNO_P(REGNO)                                     \
303
  ((REGNO) >= FIRST_ARGUMENT_REGISTER                                   \
304
   && (REGNO) < FIRST_ARGUMENT_REGISTER + NUM_ARGUMENT_REGISTERS)
305
 
306
 
307
/* How Scalar Function Values are Returned.  */
308
 
309
/* The number of the hard register that is used to return a scalar value from a
310
   function call.  */
311
#define RETURN_VALUE_REGNUM     FIRST_ARGUMENT_REGISTER
312
 
313
 
314
/* Function Entry and Exit.  */
315
 
316
#define EPILOGUE_USES(REGNO) \
317
  xstormy16_epilogue_uses (REGNO)
318
 
319
 
320
/* Generating Code for Profiling.  */
321
 
322
/* This declaration must be present, but it can be an abort if profiling is
323
   not implemented.  */
324
 
325
#define FUNCTION_PROFILER(FILE, LABELNO) xstormy16_function_profiler ()
326
 
327
 
328
/* Trampolines for Nested Functions.  */
329
 
330
#define TRAMPOLINE_SIZE 8
331
#define TRAMPOLINE_ALIGNMENT 16
332
 
333
 
334
/* Addressing Modes.  */
335
 
336
#define HAVE_POST_INCREMENT 1
337
 
338
#define HAVE_PRE_DECREMENT 1
339
 
340
#define MAX_REGS_PER_ADDRESS 1
341
 
342
 
343
/* Describing Relative Costs of Operations.  */
344
 
345
#define BRANCH_COST(speed_p, predictable_p) 5
346
 
347
#define SLOW_BYTE_ACCESS 0
348
 
349
#define NO_FUNCTION_CSE
350
 
351
 
352
/* Dividing the output into sections.  */
353
 
354
#define TEXT_SECTION_ASM_OP ".text"
355
 
356
#define DATA_SECTION_ASM_OP ".data"
357
 
358
#define BSS_SECTION_ASM_OP "\t.section\t.bss"
359
 
360
/* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
361
   There are no shared libraries on this target so these sections need
362
   not be writable.
363
 
364
   Defined in elfos.h.  */
365
 
366
#undef CTORS_SECTION_ASM_OP
367
#undef DTORS_SECTION_ASM_OP
368
#define CTORS_SECTION_ASM_OP    "\t.section\t.ctors,\"a\""
369
#define DTORS_SECTION_ASM_OP    "\t.section\t.dtors,\"a\""
370
 
371
#define TARGET_ASM_INIT_SECTIONS xstormy16_asm_init_sections
372
 
373
#define JUMP_TABLES_IN_TEXT_SECTION 1
374
 
375
/* The Overall Framework of an Assembler File.  */
376
 
377
#define ASM_COMMENT_START ";"
378
 
379
#define ASM_APP_ON "#APP\n"
380
 
381
#define ASM_APP_OFF "#NO_APP\n"
382
 
383
/* Output of Data.  */
384
 
385
#define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '|')
386
 
387
#define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGNMENT) \
388
  xstormy16_asm_output_aligned_common (STREAM, DECL, NAME, SIZE, ALIGNMENT, 1)
389
#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGNMENT) \
390
  xstormy16_asm_output_aligned_common (STREAM, DECL, NAME, SIZE, ALIGNMENT, 0)
391
 
392
 
393
/* Output and Generation of Labels.  */
394
#define SYMBOL_FLAG_XSTORMY16_BELOW100  (SYMBOL_FLAG_MACH_DEP << 0)
395
 
396
#define ASM_OUTPUT_SYMBOL_REF(STREAM, SYMBOL)   \
397
  do                                            \
398
    {                                           \
399
      const char *rn = XSTR (SYMBOL, 0); \
400
                                                \
401
      if (SYMBOL_REF_FUNCTION_P (SYMBOL))       \
402
        ASM_OUTPUT_LABEL_REF ((STREAM), rn);    \
403
      else                                      \
404
        assemble_name (STREAM, rn);             \
405
    }                                           \
406
  while (0)
407
 
408
#define ASM_OUTPUT_LABEL_REF(STREAM, NAME)      \
409
  do                                            \
410
    {                                           \
411
      fputs ("@fptr(", STREAM);                 \
412
      assemble_name (STREAM, NAME);             \
413
      fputc (')', STREAM);                      \
414
    }                                           \
415
  while (0)
416
 
417
/* Globalizing directive for a label.  */
418
#define GLOBAL_ASM_OP "\t.globl "
419
 
420
 
421
/* Output of Assembler Instructions.  */
422
 
423
#define REGISTER_NAMES                                                  \
424
{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",    \
425
  "r11", "r12", "r13", "psw", "sp", "carry", "fp", "ap" }
426
 
427
#define ADDITIONAL_REGISTER_NAMES               \
428
  { { "r14", 14 },                              \
429
    { "r15", 15 } }
430
 
431
#define REGISTER_PREFIX ""
432
#define LOCAL_LABEL_PREFIX "."
433
#define USER_LABEL_PREFIX ""
434
#define IMMEDIATE_PREFIX "#"
435
 
436
#define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
437
  fprintf (STREAM, "\tpush %d\n", REGNO)
438
 
439
#define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
440
  fprintf (STREAM, "\tpop %d\n", REGNO)
441
 
442
 
443
/* Output of dispatch tables.  */
444
 
445
/* This port does not use the ASM_OUTPUT_ADDR_VEC_ELT macro, because
446
   this could cause label alignment to appear between the 'br' and the table,
447
   which would be bad.  Instead, it controls the output of the table
448
   itself.  */
449
#define ASM_OUTPUT_ADDR_VEC(LABEL, BODY) \
450
  xstormy16_output_addr_vec (file, LABEL, BODY)
451
 
452
/* Alignment for ADDR_VECs is the same as for code.  */
453
#define ADDR_VEC_ALIGN(ADDR_VEC) 1
454
 
455
 
456
/* Assembler Commands for Exception Regions.  */
457
 
458
#define DWARF2_UNWIND_INFO              0
459
#define DWARF_CIE_DATA_ALIGNMENT        1
460
 
461
#undef  DONT_USE_BUILTIN_SETJMP
462
#define JMP_BUF_SIZE  8
463
 
464
/* Assembler Commands for Alignment.  */
465
 
466
#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
467
  fprintf ((STREAM), "\t.p2align %d\n", (POWER))
468
 
469
 
470
/* Macros Affecting all Debug Formats.  */
471
 
472
#undef  PREFERRED_DEBUGGING_TYPE
473
#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
474
 
475
 
476
/* Macros for SDB and Dwarf Output.  */
477
 
478
/* Define this macro if addresses in Dwarf 2 debugging info should not
479
   be the same size as pointers on the target architecture.  The
480
   macro's value should be the size, in bytes, to use for addresses in
481
   the debugging info.
482
 
483
   Some architectures use word addresses to refer to code locations,
484
   but Dwarf 2 info always uses byte addresses.  On such machines,
485
   Dwarf 2 addresses need to be larger than the architecture's
486
   pointers.  */
487
#define DWARF2_ADDR_SIZE 4
488
 
489
 
490
/* Miscellaneous Parameters.  */
491
 
492
#define CASE_VECTOR_MODE SImode
493
 
494
#define WORD_REGISTER_OPERATIONS
495
 
496
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
497
 
498
#define MOVE_MAX 2
499
 
500
#define SHIFT_COUNT_TRUNCATED 1
501
 
502
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
503
 
504
#define Pmode HImode
505
 
506
#define FUNCTION_MODE HImode
507
 
508
#define NO_IMPLICIT_EXTERN_C

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