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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [tilegx/] [tilegx.h] - Blame information for rev 801

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1 709 jeremybenn
/* Definitions of target machine for GNU compiler for TILE-Gx.
2
   Copyright (C) 2011, 2012
3
   Free Software Foundation, Inc.
4
   Contributed by Walter Lee (walt@tilera.com)
5
 
6
   This file is part of GCC.
7
 
8
   GCC is free software; you can redistribute it and/or modify it
9
   under the terms of the GNU General Public License as published
10
   by the Free Software Foundation; either version 3, or (at your
11
   option) any later version.
12
 
13
   GCC is distributed in the hope that it will be useful, but WITHOUT
14
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
16
   License for more details.
17
 
18
   You should have received a copy of the GNU General Public License
19
   along with GCC; see the file COPYING3.  If not see
20
   <http://www.gnu.org/licenses/>.  */
21
 
22
/* This is used by tilegx_cpu_cpp_builtins to indicate the byte order
23
   we're compiling for.  */
24
#define TILEGX_CPU_CPP_ENDIAN_BUILTINS()        \
25
  do                                            \
26
    {                                           \
27
      if (TARGET_BIG_ENDIAN)                    \
28
        builtin_define ("__BIG_ENDIAN__");      \
29
      else                                      \
30
        builtin_define ("__LITTLE_ENDIAN__");   \
31
    }                                           \
32
  while (0)
33
 
34
 
35
/* Target CPU builtins.  */
36
#define TARGET_CPU_CPP_BUILTINS() \
37
  tilegx_cpu_cpp_builtins (pfile)
38
 
39
#undef PTRDIFF_TYPE
40
#define PTRDIFF_TYPE (TARGET_32BIT ? "int" : "long int")
41
 
42
#undef SIZE_TYPE
43
#define SIZE_TYPE (TARGET_32BIT ? "unsigned int" : "long unsigned int")
44
 
45
#undef WCHAR_TYPE
46
#define WCHAR_TYPE "int"
47
 
48
#undef WCHAR_TYPE_SIZE
49
#define WCHAR_TYPE_SIZE 32
50
 
51
 
52
/* Target machine storage layout */
53
 
54
#define TARGET_BIG_ENDIAN 0
55
#define BITS_BIG_ENDIAN 0
56
#define BYTES_BIG_ENDIAN TARGET_BIG_ENDIAN
57
#define WORDS_BIG_ENDIAN TARGET_BIG_ENDIAN
58
 
59
#define UNITS_PER_WORD 8
60
#define PARM_BOUNDARY BITS_PER_WORD
61
#define STACK_BOUNDARY 64
62
#define FUNCTION_BOUNDARY 64
63
#define BIGGEST_ALIGNMENT 64
64
#define STRICT_ALIGNMENT 1
65
 
66
#define INT_TYPE_SIZE         32
67
#define LONG_TYPE_SIZE        (TARGET_32BIT ? 32 : 64)
68
#define LONG_LONG_TYPE_SIZE   64
69
#define FLOAT_TYPE_SIZE       32
70
#define DOUBLE_TYPE_SIZE      64
71
#define LONG_DOUBLE_TYPE_SIZE 64
72
#define POINTER_SIZE          LONG_TYPE_SIZE
73
 
74
#define PCC_BITFIELD_TYPE_MATTERS 1
75
#define FASTEST_ALIGNMENT 64
76
#define BIGGEST_FIELD_ALIGNMENT 64
77
#define WIDEST_HARDWARE_FP_SIZE 64
78
 
79
/* Unaligned moves trap and are very slow.  */
80
#define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1
81
 
82
/* Make strings word-aligned so strcpy from constants will be
83
   faster.  */
84
#define CONSTANT_ALIGNMENT(EXP, ALIGN)  \
85
  ((TREE_CODE (EXP) == STRING_CST       \
86
    && (ALIGN) < FASTEST_ALIGNMENT)     \
87
   ? FASTEST_ALIGNMENT : (ALIGN))
88
 
89
/* Make arrays of chars word-aligned for the same reasons.  */
90
#define DATA_ALIGNMENT(TYPE, ALIGN)             \
91
  (TREE_CODE (TYPE) == ARRAY_TYPE               \
92
   && TYPE_MODE (TREE_TYPE (TYPE)) == QImode    \
93
   && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
94
 
95
/* Make local arrays of chars word-aligned for the same reasons.  */
96
#define LOCAL_ALIGNMENT(TYPE, ALIGN) DATA_ALIGNMENT (TYPE, ALIGN)
97
 
98
 
99
/* Standard register usage.  */
100
 
101
#define FIRST_PSEUDO_REGISTER (64 + 4)
102
 
103
#define FIXED_REGISTERS \
104
 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
105
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
106
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
107
  0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
108
  1, 1, 1, 1}
109
#define CALL_USED_REGISTERS \
110
 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
111
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \
112
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
113
  0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
114
  1, 1, 1, 1}
115
 
116
#define CALL_REALLY_USED_REGISTERS \
117
 CALL_USED_REGISTERS
118
 
119
#define REG_ALLOC_ORDER {                               \
120
      10, 11, 12, 13, 14, /* call used */               \
121
      15, 16, 17, 18, 19,                               \
122
      20, 21, 22, 23, 24,                               \
123
      25, 26, 27, 28, 29,                               \
124
                                                        \
125
      9, 8, 7, 6, 5,      /* argument */                \
126
      4, 3, 2, 1, 0,                                     \
127
                                                        \
128
      55,                 /* return address */          \
129
                                                        \
130
      30, 31, 32, 33, 34, /* call saved registers */    \
131
      35, 36, 37, 38, 39,                               \
132
      40, 41, 42, 43, 44,                               \
133
      45, 46, 47, 48, 49,                               \
134
      50, 51,                                           \
135
                                                        \
136
      52,                 /* hard frame pointer */      \
137
      53, 54,             /* tp, sp */                  \
138
                                                        \
139
      56, 57, 58, 59, 60, /* special purpose */         \
140
      61, 62, 63, 64, 65, /* or fake registers */       \
141
      66, 67                                            \
142
}
143
 
144
#define HARD_REGNO_NREGS(REGNO, MODE)   \
145
  ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
146
 
147
#define HARD_REGNO_MODE_OK(REGNO, MODE) 1
148
 
149
#define MODES_TIEABLE_P(MODE1, MODE2)  1
150
 
151
/* Register that holds an address into the text segment that can be
152
   used by pic code.  */
153
#define TILEGX_PIC_TEXT_LABEL_REGNUM (flag_pic ? 50 : INVALID_REGNUM)
154
#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 51 : INVALID_REGNUM)
155
#define HARD_FRAME_POINTER_REGNUM 52
156
#define THREAD_POINTER_REGNUM 53
157
#define STACK_POINTER_REGNUM 54
158
#define TILEGX_LINK_REGNUM 55
159
#define FRAME_POINTER_REGNUM 64
160
#define ARG_POINTER_REGNUM 65
161
/* SPR storing the comparison value for compare and exchange.  */
162
#define TILEGX_CMPEXCH_REGNUM 66
163
/* Pseudo registers used to enforce order between instructions that
164
   touch the networks.  */
165
#define TILEGX_NETORDER_REGNUM 67
166
#define STATIC_CHAIN_REGNUM 10
167
 
168
 
169
enum reg_class
170
{
171
  NO_REGS,
172
  R0_REGS,
173
  R1_REGS,
174
  R2_REGS,
175
  R3_REGS,
176
  R4_REGS,
177
  R5_REGS,
178
  R6_REGS,
179
  R7_REGS,
180
  R8_REGS,
181
  R9_REGS,
182
  R10_REGS,
183
  ALL_REGS,
184
  LIM_REG_CLASSES
185
};
186
 
187
#define N_REG_CLASSES (int) LIM_REG_CLASSES
188
 
189
/* Since GENERAL_REGS is the same class as ALL_REGS, don't give it a
190
   different class number; just make it an alias.  */
191
#define GENERAL_REGS ALL_REGS
192
 
193
#define REG_CLASS_NAMES \
194
  { \
195
    "NO_REGS", \
196
    "R0_REGS", \
197
    "R1_REGS", \
198
    "R2_REGS", \
199
    "R3_REGS", \
200
    "R4_REGS", \
201
    "R5_REGS", \
202
    "R6_REGS", \
203
    "R7_REGS", \
204
    "R8_REGS", \
205
    "R9_REGS", \
206
    "R10_REGS", \
207
    "ALL_REGS" \
208
  }
209
 
210
#define REG_CLASS_CONTENTS \
211
  { \
212
    { 0 }, \
213
    { 1 << 0 }, \
214
    { 1 << 1 }, \
215
    { 1 << 2 }, \
216
    { 1 << 3 }, \
217
    { 1 << 4 }, \
218
    { 1 << 5 }, \
219
    { 1 << 6 }, \
220
    { 1 << 7 }, \
221
    { 1 << 8 }, \
222
    { 1 << 9 }, \
223
    { 1 << 10 }, \
224
    { 0xffffffff, 0xffffffff } \
225
  }
226
 
227
#define REGNO_REG_CLASS(REGNO) \
228
  ((unsigned)(REGNO) <= 10 ? \
229
   (enum reg_class)(R0_REGS + (REGNO)) : ALL_REGS)
230
 
231
#define INDEX_REG_CLASS NO_REGS
232
#define BASE_REG_CLASS ALL_REGS
233
 
234
#define PREFERRED_RELOAD_CLASS(X,CLASS)  (CLASS)
235
 
236
#define CLASS_MAX_NREGS(CLASS, MODE)    \
237
 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
238
 
239
 
240
/* Stack layout; function entry, exit and calling.  */
241
 
242
#define STACK_GROWS_DOWNWARD
243
#define FRAME_GROWS_DOWNWARD 1
244
#define STARTING_FRAME_OFFSET 0
245
 
246
#define DYNAMIC_CHAIN_ADDRESS(FRAME) plus_constant ((FRAME), UNITS_PER_WORD)
247
 
248
#define FIRST_PARM_OFFSET(FNDECL) 0
249
 
250
#define ACCUMULATE_OUTGOING_ARGS 1
251
 
252
#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
253
 
254
#define INCOMING_FRAME_SP_OFFSET 0
255
 
256
#define STACK_POINTER_OFFSET (2 * UNITS_PER_WORD)
257
 
258
#define ARG_POINTER_CFA_OFFSET(FNDECL) (-STACK_POINTER_OFFSET)
259
 
260
#define DEFAULT_PCC_STRUCT_RETURN 0
261
 
262
/* The first 10 registers may hold return value.  */
263
#define TILEGX_NUM_RETURN_REGS 10
264
 
265
/* The first 10 registers hold function arguments.  */
266
#define TILEGX_NUM_ARG_REGS 10
267
 
268
#define FUNCTION_ARG_REGNO_P(N) ((N) < TILEGX_NUM_ARG_REGS)
269
 
270
/* The type used to store the number of words of arguments scanned so
271
   far during argument scanning.  This includes any space that is
272
   skipped.  */
273
#define CUMULATIVE_ARGS int
274
 
275
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
276
 ((CUM) = 0)
277
 
278
 
279
#define ELIMINABLE_REGS                                 \
280
  {{ARG_POINTER_REGNUM,  STACK_POINTER_REGNUM},         \
281
  {ARG_POINTER_REGNUM,   HARD_FRAME_POINTER_REGNUM},    \
282
  {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},         \
283
  {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
284
 
285
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
286
  ((OFFSET) = tilegx_initial_elimination_offset((FROM),(TO)))
287
 
288
#define FUNCTION_PROFILER(FILE, LABELNO) \
289
  tilegx_function_profiler (FILE, LABELNO)
290
 
291
#define TRAMPOLINE_SIZE (TARGET_32BIT ? 48 : 56)
292
#define TRAMPOLINE_ALIGNMENT 64
293
#define TRAMPOLINE_SECTION text_section
294
 
295
 
296
/* Call frame debugging information.  */
297
 
298
#define INCOMING_RETURN_ADDR_RTX  gen_rtx_REG (Pmode, TILEGX_LINK_REGNUM)
299
 
300
#define RETURN_ADDR_RTX tilegx_return_addr
301
 
302
#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (TILEGX_LINK_REGNUM)
303
 
304
#define DWARF_ZERO_REG 63
305
 
306
#define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N + 12) : INVALID_REGNUM)
307
#define EH_RETURN_STACKADJ_RTX  gen_rtx_REG (Pmode, 11)
308
#define EH_RETURN_HANDLER_RTX tilegx_eh_return_handler_rtx ()
309
 
310
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
311
  tilegx_asm_preferred_eh_data_format ((CODE), (GLOBAL))
312
 
313
 
314
/* Addressing modes, and classification of registers for them.  */
315
 
316
#define HAVE_POST_INCREMENT 1
317
#define HAVE_POST_DECREMENT 1
318
#define HAVE_POST_MODIFY_DISP 1
319
 
320
#define REGNO_OK_FOR_INDEX_P(regno) 0
321
#define REGNO_OK_FOR_BASE_P(regno)      \
322
  ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
323
 
324
#define MAX_REGS_PER_ADDRESS 1
325
 
326
#define CONSTANT_ADDRESS_P(X) 0
327
 
328
#define LEGITIMATE_PIC_OPERAND_P(X) tilegx_legitimate_pic_operand_p (X)
329
 
330
 
331
#define CASE_VECTOR_MODE Pmode
332
#define CASE_VECTOR_PC_RELATIVE 0
333
#define JUMP_TABLES_IN_TEXT_SECTION 0
334
 
335
#define DEFAULT_SIGNED_CHAR 1
336
 
337
#define MOVE_MAX UNITS_PER_WORD
338
 
339
/* Use a value of 11 for MOVE_RATIO and friends, because TILEPro
340
   returns structs as large as 10 words in registers.  Because of some
341
   some code generation inefficiency, we never get smaller code for
342
   turning that into a memcpy, so pick a value that guarantees this
343
   doesn't happen.  */
344
#define TILEGX_CALL_RATIO 11
345
#define MOVE_RATIO(speed) ((speed) ? 15 : TILEGX_CALL_RATIO)
346
#define CLEAR_RATIO(speed) ((speed) ? 15 : TILEGX_CALL_RATIO)
347
#define SET_RATIO(speed) ((speed) ? 15 : TILEGX_CALL_RATIO)
348
 
349
#define WORD_REGISTER_OPERATIONS
350
 
351
#define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND)
352
 
353
#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)     \
354
  if (GET_MODE_CLASS (MODE) == MODE_INT         \
355
      && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
356
    {                                           \
357
      if ((MODE) == SImode)                     \
358
        (UNSIGNEDP) = 0;                        \
359
      (MODE) = DImode;                          \
360
    }
361
 
362
/* Define SLOW_BYTE_ACCESS to avoid making a QI or HI mode
363
   register.  */
364
#define SLOW_BYTE_ACCESS 1
365
 
366
#define SHIFT_COUNT_TRUNCATED 0
367
 
368
#define SHORT_IMMEDIATES_SIGN_EXTEND
369
 
370
/* We represent all SI values as sign-extended DI values in
371
   registers.  */
372
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) \
373
  ((INPREC) <= 32 || (OUTPREC) > 32)
374
 
375
#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, 1)
376
#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, 1)
377
 
378
#define Pmode (TARGET_32BIT ? SImode : DImode)
379
 
380
#define STACK_SIZE_MODE Pmode
381
 
382
#define STORE_FLAG_VALUE 1
383
 
384
#define FUNCTION_MODE DImode
385
 
386
#define NO_FUNCTION_CSE 1
387
 
388
#define ADJUST_INSN_LENGTH(INSN, LENGTH) \
389
  ((LENGTH) = tilegx_adjust_insn_length ((INSN), (LENGTH)))
390
 
391
#define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
392
 
393
#define BRANCH_COST(speed_p, predictable_p) ((predictable_p) ? 2 : 6)
394
 
395
 
396
/* Control the assembler format that we output.  */
397
 
398
#undef NO_DOLLAR_IN_LABEL
399
 
400
#define ASM_COMMENT_START "##"
401
 
402
#define TEXT_SECTION_ASM_OP "\t.text"
403
 
404
#define DATA_SECTION_ASM_OP "\t.data"
405
 
406
#undef READONLY_DATA_SECTION_ASM_OP
407
#define READONLY_DATA_SECTION_ASM_OP "\t.section\t.rodata, \"a\""
408
 
409
#undef BSS_SECTION_ASM_OP
410
#define BSS_SECTION_ASM_OP      "\t.section\t.bss, \"wa\""
411
 
412
#undef INIT_SECTION_ASM_OP
413
#define INIT_SECTION_ASM_OP     "\t.section\t.init, \"ax\""
414
 
415
#undef FINI_SECTION_ASM_OP
416
#define FINI_SECTION_ASM_OP     "\t.section\t.fini, \"ax\""
417
 
418
#define GLOBAL_ASM_OP ".global "
419
 
420
#define SUPPORTS_WEAK 1
421
 
422
#define USER_LABEL_PREFIX ""
423
 
424
#define REGISTER_PREFIX ""
425
#define REGISTER_NAMES                                                  \
426
  { "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",       \
427
    "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",      \
428
    "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",      \
429
    "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",      \
430
    "r32",  "r33",  "r34",  "r35",  "r36",  "r37",  "r38",  "r39",      \
431
    "r40",  "r41",  "r42",  "r43",  "r44",  "r45",  "r46",  "r47",      \
432
    "r48",  "r49",  "r50",  "r51",  "r52",  "tp",   "sp",   "lr",       \
433
    "?r56?","idn0", "idn1", "udn0", "udn1", "udn2", "udn3", "zero",     \
434
    "?FRAME?", "?ARG?", "?CMPEXCH?", "?NET?" }
435
 
436
#define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
437
  tilegx_final_prescan_insn (insn)
438
 
439
#define ASM_OUTPUT_OPCODE(STREAM, PTR)  \
440
  (PTR = tilegx_asm_output_opcode (STREAM, PTR))
441
 
442
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)                    \
443
  do                                                            \
444
    {                                                           \
445
      char label[256];                                          \
446
      ASM_GENERATE_INTERNAL_LABEL (label, "L", (VALUE));        \
447
      fprintf (FILE, "\t%s ",                                   \
448
               integer_asm_op (GET_MODE_SIZE (Pmode), TRUE));   \
449
      assemble_name (FILE, label);                              \
450
      fprintf (FILE, "\n");                                     \
451
    }                                                           \
452
  while (0)
453
 
454
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)        \
455
  do                                                            \
456
    {                                                           \
457
      char label[256];                                          \
458
      ASM_GENERATE_INTERNAL_LABEL (label, "L", (VALUE));        \
459
      fprintf (FILE, "\t%s ",                                   \
460
               integer_asm_op (GET_MODE_SIZE (Pmode), TRUE));   \
461
      assemble_name (FILE, label);                              \
462
      ASM_GENERATE_INTERNAL_LABEL (label, "L", (REL));          \
463
      fprintf (FILE, "-");                                      \
464
      assemble_name (FILE, label);                              \
465
      fprintf (FILE, "\n");                                     \
466
    }                                                           \
467
  while (0)
468
 
469
#define ASM_OUTPUT_ALIGN(FILE,LOG)  \
470
  do { if ((LOG) != 0) fprintf (FILE, "\t.align %d\n", 1 << (LOG)); } while (0)
471
 
472
#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED)    \
473
  ( fputs (".comm ", (FILE)),                           \
474
    assemble_name ((FILE), (NAME)),                     \
475
    fprintf ((FILE), ",%u\n", (unsigned int)(ROUNDED)))
476
 
477
#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)     \
478
  ( fputs (".lcomm ", (FILE)),                          \
479
    assemble_name ((FILE), (NAME)),                     \
480
    fprintf ((FILE), ",%u\n", (unsigned int)(ROUNDED)))
481
 
482
 
483
 
484
#define INIT_EXPANDERS tilegx_init_expanders ()
485
 
486
/* A C structure for machine-specific, per-function data.  This is
487
   added to the cfun structure.  */
488
typedef struct GTY(()) machine_function
489
{
490
  /* Symbol for the text label used for pic.  */
491
  rtx text_label_symbol;
492
 
493
  /* Register for the text label.  */
494
  rtx text_label_rtx;
495
 
496
  /* Register for the pic offset table.  */
497
  rtx got_rtx;
498
 
499
  /* The function calls tls_get_addr.  */
500
  int calls_tls_get_addr;
501
} machine_function;
502
 
503
#ifndef HAVE_AS_TLS
504
#define HAVE_AS_TLS 0
505
#endif

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