OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [vax/] [builtins.md] - Blame information for rev 767

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 709 jeremybenn
;; builtin definitions for DEC VAX.
2
;; Copyright (C) 2007, 2009 Free Software Foundation, Inc.
3
;;
4
;; This file is part of GCC.
5
;;
6
;; GCC is free software; you can redistribute it and/or modify it under
7
;; the terms of the GNU General Public License as published by the Free
8
;; Software Foundation; either version 3, or (at your option) any later
9
;; version.
10
;;
11
;; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12
;; WARRANTY; without even the implied warranty of MERCHANTABILITY or
13
;; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
14
;; for more details.
15
;;
16
;; You should have received a copy of the GNU General Public License
17
;; along with GCC; see the file COPYING3.  If not see
18
;; .
19
 
20
(define_constants
21
  [
22
    (VUNSPEC_LOCK 100)          ; sync lock and test
23
    (VUNSPEC_UNLOCK 101)        ; sync lock release
24
  ]
25
)
26
 
27
(define_expand "ffssi2"
28
  [(set (match_operand:SI 0 "nonimmediate_operand" "")
29
        (ffs:SI (match_operand:SI 1 "general_operand" "")))]
30
  ""
31
  "
32
{
33
  rtx label = gen_label_rtx ();
34
  emit_insn (gen_ffssi2_internal (operands[0], operands[1]));
35
  emit_jump_insn (gen_bne (label));
36
  emit_insn (gen_negsi2 (operands[0], const1_rtx));
37
  emit_label (label);
38
  emit_insn (gen_addsi3 (operands[0], operands[0], const1_rtx));
39
  DONE;
40
}")
41
 
42
(define_insn "ffssi2_internal"
43
  [(set (match_operand:SI 0 "nonimmediate_operand" "=rQ")
44
        (ffs:SI (match_operand:SI 1 "general_operand" "nrmT")))
45
   (set (cc0) (match_dup 0))]
46
  ""
47
  "ffs $0,$32,%1,%0")
48
 
49
(define_expand "sync_lock_test_and_set"
50
  [(set (match_operand:VAXint 0 "nonimmediate_operand" "=&g")
51
        (unspec:VAXint [(match_operand:VAXint 1 "memory_operand" "+m")
52
                    (match_operand:VAXint 2 "const_int_operand" "n")
53
                   ] VUNSPEC_LOCK))]
54
  ""
55
  "
56
{
57
  rtx label;
58
 
59
  if (operands[2] != const1_rtx)
60
    FAIL;
61
 
62
  label = gen_label_rtx ();
63
  emit_move_insn (operands[0], const1_rtx);
64
  emit_jump_insn (gen_jbbssi (operands[1], const0_rtx, label, operands[1]));
65
  emit_move_insn (operands[0], const0_rtx);
66
  emit_label (label);
67
  DONE;
68
}")
69
 
70
(define_insn "jbbssiqi"
71
  [(parallel
72
    [(set (pc)
73
          (if_then_else
74
            (ne (zero_extract:SI (match_operand:QI 0 "memory_operand" "g")
75
                                 (const_int 1)
76
                                 (match_operand:SI 1 "general_operand" "nrm"))
77
                (const_int 0))
78
            (label_ref (match_operand 2 "" ""))
79
            (pc)))
80
     (set (zero_extract:SI (match_operand:QI 3 "memory_operand" "+0")
81
                           (const_int 1)
82
                           (match_dup 1))
83
          (const_int 1))])]
84
  ""
85
  "jbssi %1,%0,%l2")
86
 
87
(define_insn "jbbssihi"
88
  [(parallel
89
    [(set (pc)
90
          (if_then_else
91
            (ne (zero_extract:SI (match_operand:HI 0 "memory_operand" "Q")
92
                                 (const_int 1)
93
                                 (match_operand:SI 1 "general_operand" "nrm"))
94
                (const_int 0))
95
            (label_ref (match_operand 2 "" ""))
96
            (pc)))
97
     (set (zero_extract:SI (match_operand:HI 3 "memory_operand" "+0")
98
                           (const_int 1)
99
                           (match_dup 1))
100
          (const_int 1))])]
101
  ""
102
  "jbssi %1,%0,%l2")
103
 
104
(define_insn "jbbssisi"
105
  [(parallel
106
    [(set (pc)
107
          (if_then_else
108
            (ne (zero_extract:SI (match_operand:SI 0 "memory_operand" "Q")
109
                                 (const_int 1)
110
                                 (match_operand:SI 1 "general_operand" "nrm"))
111
                (const_int 0))
112
            (label_ref (match_operand 2 "" ""))
113
            (pc)))
114
     (set (zero_extract:SI (match_operand:SI 3 "memory_operand" "+0")
115
                           (const_int 1)
116
                           (match_dup 1))
117
          (const_int 1))])]
118
  ""
119
  "jbssi %1,%0,%l2")
120
 
121
 
122
(define_expand "sync_lock_release"
123
  [(set (match_operand:VAXint 0 "memory_operand" "+m")
124
        (unspec:VAXint [(match_operand:VAXint 1 "const_int_operand" "n")
125
                   ] VUNSPEC_UNLOCK))]
126
  ""
127
  "
128
{
129
  rtx label;
130
  if (operands[1] != const0_rtx)
131
    FAIL;
132
#if 1
133
  label = gen_label_rtx ();
134
  emit_jump_insn (gen_jbbcci (operands[0], const0_rtx, label, operands[0]));
135
  emit_label (label);
136
#else
137
  emit_move_insn (operands[0], const0_rtx);
138
#endif
139
  DONE;
140
}")
141
 
142
(define_insn "jbbcciqi"
143
  [(parallel
144
    [(set (pc)
145
          (if_then_else
146
            (eq (zero_extract:SI (match_operand:QI 0 "memory_operand" "g")
147
                                 (const_int 1)
148
                                 (match_operand:SI 1 "general_operand" "nrm"))
149
                (const_int 0))
150
            (label_ref (match_operand 2 "" ""))
151
            (pc)))
152
     (set (zero_extract:SI (match_operand:QI 3 "memory_operand" "+0")
153
                           (const_int 1)
154
                           (match_dup 1))
155
          (const_int 0))])]
156
  ""
157
  "jbcci %1,%0,%l2")
158
 
159
(define_insn "jbbccihi"
160
  [(parallel
161
    [(set (pc)
162
          (if_then_else
163
            (eq (zero_extract:SI (match_operand:HI 0 "memory_operand" "Q")
164
                                 (const_int 1)
165
                                 (match_operand:SI 1 "general_operand" "nrm"))
166
                (const_int 0))
167
            (label_ref (match_operand 2 "" ""))
168
            (pc)))
169
     (set (zero_extract:SI (match_operand:HI 3 "memory_operand" "+0")
170
                           (const_int 1)
171
                           (match_dup 1))
172
          (const_int 0))])]
173
  ""
174
  "jbcci %1,%0,%l2")
175
 
176
(define_insn "jbbccisi"
177
  [(parallel
178
    [(set (pc)
179
          (if_then_else
180
            (eq (zero_extract:SI (match_operand:SI 0 "memory_operand" "Q")
181
                                 (const_int 1)
182
                                 (match_operand:SI 1 "general_operand" "nrm"))
183
                (const_int 0))
184
            (label_ref (match_operand 2 "" ""))
185
            (pc)))
186
     (set (zero_extract:SI (match_operand:SI 3 "memory_operand" "+0")
187
                           (const_int 1)
188
                           (match_dup 1))
189
          (const_int 0))])]
190
  ""
191
  "jbcci %1,%0,%l2")
192
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.