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1 709 jeremybenn
;; Constraint definitions for Xtensa.
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;; Copyright (C) 2006, 2007 Free Software Foundation, Inc.
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 3, or (at your option)
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;; any later version.
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;;
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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;; GNU General Public License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3.  If not see
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;; .
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;; Register constraints.
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(define_register_constraint "a" "GR_REGS"
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 "General-purpose AR registers @code{a0}-@code{a15},
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  except @code{a1} (@code{sp}).")
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(define_register_constraint "b" "TARGET_BOOLEANS ? BR_REGS : NO_REGS"
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 "Boolean registers @code{b0}-@code{b15}; only available if the Xtensa
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  Boolean Option is configured.")
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(define_register_constraint "d" "TARGET_DENSITY ? AR_REGS: NO_REGS"
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 "@internal
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  All AR registers, including sp, but only if the Xtensa Code Density
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  Option is configured.")
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(define_register_constraint "f" "TARGET_HARD_FLOAT ? FP_REGS : NO_REGS"
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 "Floating-point registers @code{f0}-@code{f15}; only available if the
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  Xtensa Floating-Pointer Coprocessor is configured.")
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(define_register_constraint "q" "SP_REG"
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 "@internal
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  The stack pointer (register @code{a1}).")
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(define_register_constraint "A" "TARGET_MAC16 ? ACC_REG : NO_REGS"
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 "The low 32 bits of the accumulator from the Xtensa MAC16 Option.")
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(define_register_constraint "B" "TARGET_SEXT ? GR_REGS : NO_REGS"
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 "@internal
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  General-purpose AR registers, but only if the Xtensa Sign Extend
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  Option is configured.")
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(define_register_constraint "C" "TARGET_MUL16 ? GR_REGS: NO_REGS"
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 "@internal
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  General-purpose AR registers, but only if the Xtensa 16-Bit Integer
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  Multiply Option is configured.")
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(define_register_constraint "D" "TARGET_DENSITY ? GR_REGS: NO_REGS"
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 "@internal
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  General-purpose AR registers, but only if the Xtensa Code Density
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  Option is configured.")
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(define_register_constraint "W" "TARGET_CONST16 ? GR_REGS: NO_REGS"
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 "@internal
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  General-purpose AR registers, but only if the Xtensa Const16
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  Option is configured.")
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;; Integer constant constraints.
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(define_constraint "I"
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 "A signed 12-bit integer constant for use with MOVI instructions."
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 (and (match_code "const_int")
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      (match_test "xtensa_simm12b (ival)")))
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(define_constraint "J"
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 "A signed 8-bit integer constant for use with ADDI instructions."
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 (and (match_code "const_int")
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      (match_test "xtensa_simm8 (ival)")))
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(define_constraint "K"
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 "A constant integer that can be an immediate operand of an Xtensa
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  conditional branch instruction that performs a signed comparison or
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  a comparison against zero."
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 (and (match_code "const_int")
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      (match_test "xtensa_b4const_or_zero (ival)")))
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(define_constraint "L"
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 "A constant integer that can be an immediate operand of an Xtensa
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  conditional branch instruction that performs an unsigned comparison."
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 (and (match_code "const_int")
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      (match_test "xtensa_b4constu (ival)")))
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(define_constraint "M"
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 "An integer constant in the range @minus{}32-95 for use with MOVI.N
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  instructions."
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 (and (match_code "const_int")
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      (match_test "ival >= -32 && ival <= 95")))
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(define_constraint "N"
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 "An unsigned 8-bit integer constant shifted left by 8 bits for use
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  with ADDMI instructions."
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 (and (match_code "const_int")
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      (match_test "xtensa_simm8x256 (ival)")))
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(define_constraint "O"
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 "An integer constant that can be used in ADDI.N instructions."
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 (and (match_code "const_int")
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      (match_test "ival == -1 || (ival >= 1 && ival <= 15)")))
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(define_constraint "P"
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 "An integer constant that can be used as a mask value in an EXTUI
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  instruction."
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 (and (match_code "const_int")
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      (match_test "xtensa_mask_immediate (ival)")))
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;; Memory constraints.  Do not use define_memory_constraint here.  Doing so
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;; causes reload to force some constants into the constant pool, but since
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;; the Xtensa constant pool can only be accessed with L32R instructions, it
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;; is always better to just copy a constant into a register.  Instead, use
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;; regular constraints but add a check to allow pseudos during reload.
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(define_constraint "R"
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 "Memory that can be accessed with a 4-bit unsigned offset from a register."
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 (ior (and (match_code "mem")
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           (match_test "smalloffset_mem_p (op)"))
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      (and (match_code "reg")
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           (match_test "reload_in_progress
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                        && REGNO (op) >= FIRST_PSEUDO_REGISTER"))))
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(define_constraint "T"
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 "Memory in a literal pool (addressable with an L32R instruction)."
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 (and (match_code "mem")
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      (match_test "!TARGET_CONST16 && constantpool_mem_p (op)")))
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(define_constraint "U"
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 "Memory that is not in a literal pool."
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 (ior (and (match_code "mem")
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           (match_test "! constantpool_mem_p (op)"))
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      (and (match_code "reg")
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           (match_test "reload_in_progress
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                        && REGNO (op) >= FIRST_PSEUDO_REGISTER"))))

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