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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [hw-doloop.h] - Blame information for rev 746

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1 684 jeremybenn
/* Code to analyze doloop loops in order for targets to perform late
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   optimizations converting doloops to other forms of hardware loops.
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   Copyright (C) 2011 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3.  If not see
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<http://www.gnu.org/licenses/>.  */
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/* We need to keep a vector of loops */
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typedef struct hwloop_info_d *hwloop_info;
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DEF_VEC_P (hwloop_info);
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DEF_VEC_ALLOC_P (hwloop_info,heap);
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/* Information about a loop we have found (or are in the process of
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   finding).  */
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struct GTY (()) hwloop_info_d
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{
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  /* loop number, for dumps */
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  int loop_no;
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  /* Next loop in the graph. */
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  hwloop_info next;
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  /* Vector of blocks only within the loop, including those within
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     inner loops.  */
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  VEC (basic_block, heap) *blocks;
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  /* Same information in a bitmap.  */
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  bitmap block_bitmap;
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  /* Vector of inner loops within this loop.  Includes loops of every
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     nesting level.  */
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  VEC (hwloop_info, heap) *loops;
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  /* All edges that jump into the loop.  */
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  VEC(edge, gc) *incoming;
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  /* The ports currently using this infrastructure can typically
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     handle two cases: all incoming edges have the same destination
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     block, or all incoming edges have the same source block.  These
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     two members are set to the common source or destination we found,
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     or NULL if different blocks were found.  If both are NULL the
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     loop can't be optimized.  */
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  basic_block incoming_src;
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  basic_block incoming_dest;
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  /* First block in the loop.  This is the one branched to by the loop_end
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     insn.  */
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  basic_block head;
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  /* Last block in the loop (the one with the loop_end insn).  */
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  basic_block tail;
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  /* The successor block of the loop.  This is the one the loop_end insn
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     falls into.  */
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  basic_block successor;
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  /* The last instruction in the tail.  */
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  rtx last_insn;
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  /* The loop_end insn.  */
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  rtx loop_end;
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  /* The iteration register.  */
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  rtx iter_reg;
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  /* The new label placed at the beginning of the loop. */
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  rtx start_label;
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  /* The new label placed at the end of the loop. */
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  rtx end_label;
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  /* The length of the loop.  */
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  int length;
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  /* The nesting depth of the loop.  Innermost loops are given a depth
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     of 1.  Only successfully optimized doloops are counted; if an inner
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     loop was marked as bad, it does not increase the depth of its parent
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     loop.
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     This value is valid when the target's optimize function is called.  */
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  int depth;
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  /* True if we can't optimize this loop.  */
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  bool bad;
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  /* True if we have visited this loop during the optimization phase.  */
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  bool visited;
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  /* The following values are collected before calling the target's optimize
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     function and are not valid earlier.  */
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  /* Record information about control flow: whether the loop has calls
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     or asm statements, whether it has edges that jump out of the loop,
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     or edges that jump within the loop.  */
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  bool has_call;
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  bool has_asm;
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  bool jumps_within;
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  bool jumps_outof;
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  /* True if there is an instruction other than the doloop_end which uses the
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     iteration register.  */
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  bool iter_reg_used;
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  /* True if the iteration register lives past the doloop instruction.  */
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  bool iter_reg_used_outside;
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  /* Hard registers set at any point in the loop, except for the loop counter
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     register's set in the doloop_end instruction.  */
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  HARD_REG_SET regs_set_in_loop;
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};
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/* A set of hooks to be defined by a target that wants to use the reorg_loops
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   functionality.
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   reorg_loops is intended to handle cases where special hardware loop
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   setup instructions are required before the loop, for example to set
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   up loop counter registers that are not exposed to the register
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   allocator, or to inform the hardware about loop bounds.
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   reorg_loops performs analysis to discover loop_end patterns created
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   by the earlier loop-doloop pass, and sets up a hwloop_info
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   structure for each such insn it finds.  It then tries to discover
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   the basic blocks containing the loop by tracking the lifetime of
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   the iteration register.
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   If a valid loop can't be found, the FAIL function is called;
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   otherwise the OPT function is called for each loop, visiting
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   innermost loops first and ascending.  */
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struct hw_doloop_hooks
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{
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  /* Examine INSN.  If it is a suitable doloop_end pattern, return the
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     iteration register, which should be a single hard register.
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     Otherwise, return NULL_RTX.  */
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  rtx (*end_pattern_reg) (rtx insn);
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  /* Optimize LOOP.  The target should perform any additional analysis
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     (e.g. checking that the loop isn't too long), and then perform
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     its transformations.  Return true if successful, false if the
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     loop should be marked bad.  If it returns false, the FAIL
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     function is called.  */
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  bool (*opt) (hwloop_info loop);
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  /* Handle a loop that was marked bad for any reason.  This could be
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     used to split the doloop_end pattern.  */
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  void (*fail) (hwloop_info loop);
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};
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extern void reorg_loops (bool, struct hw_doloop_hooks *);

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