OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [reginfo.c] - Blame information for rev 797

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 684 jeremybenn
/* Compute different info about registers.
2
   Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996
3
   1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
4
   2009, 2010, 2011  Free Software Foundation, Inc.
5
 
6
This file is part of GCC.
7
 
8
GCC is free software; you can redistribute it and/or modify it under
9
the terms of the GNU General Public License as published by the Free
10
Software Foundation; either version 3, or (at your option) any later
11
version.
12
 
13
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14
WARRANTY; without even the implied warranty of MERCHANTABILITY or
15
FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16
for more details.
17
 
18
You should have received a copy of the GNU General Public License
19
along with GCC; see the file COPYING3.  If not see
20
<http://www.gnu.org/licenses/>.  */
21
 
22
 
23
/* This file contains regscan pass of the compiler and passes for
24
   dealing with info about modes of pseudo-registers inside
25
   subregisters.  It also defines some tables of information about the
26
   hardware registers, function init_reg_sets to initialize the
27
   tables, and other auxiliary functions to deal with info about
28
   registers and their classes.  */
29
 
30
#include "config.h"
31
#include "system.h"
32
#include "coretypes.h"
33
#include "tm.h"
34
#include "hard-reg-set.h"
35
#include "rtl.h"
36
#include "expr.h"
37
#include "tm_p.h"
38
#include "flags.h"
39
#include "basic-block.h"
40
#include "regs.h"
41
#include "addresses.h"
42
#include "function.h"
43
#include "insn-config.h"
44
#include "recog.h"
45
#include "reload.h"
46
#include "diagnostic-core.h"
47
#include "output.h"
48
#include "timevar.h"
49
#include "hashtab.h"
50
#include "target.h"
51
#include "tree-pass.h"
52
#include "df.h"
53
#include "ira.h"
54
 
55
/* Maximum register number used in this function, plus one.  */
56
 
57
int max_regno;
58
 
59
 
60
struct target_hard_regs default_target_hard_regs;
61
struct target_regs default_target_regs;
62
#if SWITCHABLE_TARGET
63
struct target_hard_regs *this_target_hard_regs = &default_target_hard_regs;
64
struct target_regs *this_target_regs = &default_target_regs;
65
#endif
66
 
67
/* Data for initializing fixed_regs.  */
68
static const char initial_fixed_regs[] = FIXED_REGISTERS;
69
 
70
/* Data for initializing call_used_regs.  */
71
static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
72
 
73
#ifdef CALL_REALLY_USED_REGISTERS
74
/* Data for initializing call_really_used_regs.  */
75
static const char initial_call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
76
#endif
77
 
78
#ifdef CALL_REALLY_USED_REGISTERS
79
#define CALL_REALLY_USED_REGNO_P(X)  call_really_used_regs[X]
80
#else
81
#define CALL_REALLY_USED_REGNO_P(X)  call_used_regs[X]
82
#endif
83
 
84
/* Indexed by hard register number, contains 1 for registers
85
   that are being used for global register decls.
86
   These must be exempt from ordinary flow analysis
87
   and are also considered fixed.  */
88
char global_regs[FIRST_PSEUDO_REGISTER];
89
 
90
/* Declaration for the global register. */
91
static tree GTY(()) global_regs_decl[FIRST_PSEUDO_REGISTER];
92
 
93
/* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
94
   in dataflow more conveniently.  */
95
regset regs_invalidated_by_call_regset;
96
 
97
/* Same information as FIXED_REG_SET but in regset form.  */
98
regset fixed_reg_set_regset;
99
 
100
/* The bitmap_obstack is used to hold some static variables that
101
   should not be reset after each function is compiled.  */
102
static bitmap_obstack persistent_obstack;
103
 
104
/* Used to initialize reg_alloc_order.  */
105
#ifdef REG_ALLOC_ORDER
106
static int initial_reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
107
#endif
108
 
109
/* The same information, but as an array of unsigned ints.  We copy from
110
   these unsigned ints to the table above.  We do this so the tm.h files
111
   do not have to be aware of the wordsize for machines with <= 64 regs.
112
   Note that we hard-code 32 here, not HOST_BITS_PER_INT.  */
113
#define N_REG_INTS  \
114
  ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
115
 
116
static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
117
  = REG_CLASS_CONTENTS;
118
 
119
/* Array containing all of the register names.  */
120
static const char *const initial_reg_names[] = REGISTER_NAMES;
121
 
122
/* Array containing all of the register class names.  */
123
const char * reg_class_names[] = REG_CLASS_NAMES;
124
 
125
#define last_mode_for_init_move_cost \
126
  (this_target_regs->x_last_mode_for_init_move_cost)
127
 
128
/* No more global register variables may be declared; true once
129
   reginfo has been initialized.  */
130
static int no_global_reg_vars = 0;
131
 
132
/* Given a register bitmap, turn on the bits in a HARD_REG_SET that
133
   correspond to the hard registers, if any, set in that map.  This
134
   could be done far more efficiently by having all sorts of special-cases
135
   with moving single words, but probably isn't worth the trouble.  */
136
void
137
reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
138
{
139
  unsigned i;
140
  bitmap_iterator bi;
141
 
142
  EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
143
    {
144
      if (i >= FIRST_PSEUDO_REGISTER)
145
        return;
146
      SET_HARD_REG_BIT (*to, i);
147
    }
148
}
149
 
150
/* Function called only once per target_globals to initialize the
151
   target_hard_regs structure.  Once this is done, various switches
152
   may override.  */
153
void
154
init_reg_sets (void)
155
{
156
  int i, j;
157
 
158
  /* First copy the register information from the initial int form into
159
     the regsets.  */
160
 
161
  for (i = 0; i < N_REG_CLASSES; i++)
162
    {
163
      CLEAR_HARD_REG_SET (reg_class_contents[i]);
164
 
165
      /* Note that we hard-code 32 here, not HOST_BITS_PER_INT.  */
166
      for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
167
        if (int_reg_class_contents[i][j / 32]
168
            & ((unsigned) 1 << (j % 32)))
169
          SET_HARD_REG_BIT (reg_class_contents[i], j);
170
    }
171
 
172
  /* Sanity check: make sure the target macros FIXED_REGISTERS and
173
     CALL_USED_REGISTERS had the right number of initializers.  */
174
  gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
175
  gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
176
#ifdef CALL_REALLY_USED_REGISTERS
177
  gcc_assert (sizeof call_really_used_regs
178
              == sizeof initial_call_really_used_regs);
179
#endif
180
#ifdef REG_ALLOC_ORDER
181
  gcc_assert (sizeof reg_alloc_order == sizeof initial_reg_alloc_order);
182
#endif
183
  gcc_assert (sizeof reg_names == sizeof initial_reg_names);
184
 
185
  memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
186
  memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
187
#ifdef CALL_REALLY_USED_REGISTERS
188
  memcpy (call_really_used_regs, initial_call_really_used_regs,
189
          sizeof call_really_used_regs);
190
#endif
191
#ifdef REG_ALLOC_ORDER
192
  memcpy (reg_alloc_order, initial_reg_alloc_order, sizeof reg_alloc_order);
193
#endif
194
  memcpy (reg_names, initial_reg_names, sizeof reg_names);
195
 
196
  SET_HARD_REG_SET (accessible_reg_set);
197
  SET_HARD_REG_SET (operand_reg_set);
198
}
199
 
200
/* Initialize may_move_cost and friends for mode M.  */
201
void
202
init_move_cost (enum machine_mode m)
203
{
204
  static unsigned short last_move_cost[N_REG_CLASSES][N_REG_CLASSES];
205
  bool all_match = true;
206
  unsigned int i, j;
207
 
208
  gcc_assert (have_regs_of_mode[m]);
209
  for (i = 0; i < N_REG_CLASSES; i++)
210
    if (contains_reg_of_mode[i][m])
211
      for (j = 0; j < N_REG_CLASSES; j++)
212
        {
213
          int cost;
214
          if (!contains_reg_of_mode[j][m])
215
            cost = 65535;
216
          else
217
            {
218
              cost = register_move_cost (m, (enum reg_class) i,
219
                                         (enum reg_class) j);
220
              gcc_assert (cost < 65535);
221
            }
222
          all_match &= (last_move_cost[i][j] == cost);
223
          last_move_cost[i][j] = cost;
224
        }
225
  if (all_match && last_mode_for_init_move_cost != -1)
226
    {
227
      move_cost[m] = move_cost[last_mode_for_init_move_cost];
228
      may_move_in_cost[m] = may_move_in_cost[last_mode_for_init_move_cost];
229
      may_move_out_cost[m] = may_move_out_cost[last_mode_for_init_move_cost];
230
      return;
231
    }
232
  last_mode_for_init_move_cost = m;
233
  move_cost[m] = (move_table *)xmalloc (sizeof (move_table)
234
                                        * N_REG_CLASSES);
235
  may_move_in_cost[m] = (move_table *)xmalloc (sizeof (move_table)
236
                                               * N_REG_CLASSES);
237
  may_move_out_cost[m] = (move_table *)xmalloc (sizeof (move_table)
238
                                                * N_REG_CLASSES);
239
  for (i = 0; i < N_REG_CLASSES; i++)
240
    if (contains_reg_of_mode[i][m])
241
      for (j = 0; j < N_REG_CLASSES; j++)
242
        {
243
          int cost;
244
          enum reg_class *p1, *p2;
245
 
246
          if (last_move_cost[i][j] == 65535)
247
            {
248
              move_cost[m][i][j] = 65535;
249
              may_move_in_cost[m][i][j] = 65535;
250
              may_move_out_cost[m][i][j] = 65535;
251
            }
252
          else
253
            {
254
              cost = last_move_cost[i][j];
255
 
256
              for (p2 = &reg_class_subclasses[j][0];
257
                   *p2 != LIM_REG_CLASSES; p2++)
258
                if (*p2 != i && contains_reg_of_mode[*p2][m])
259
                  cost = MAX (cost, move_cost[m][i][*p2]);
260
 
261
              for (p1 = &reg_class_subclasses[i][0];
262
                   *p1 != LIM_REG_CLASSES; p1++)
263
                if (*p1 != j && contains_reg_of_mode[*p1][m])
264
                  cost = MAX (cost, move_cost[m][*p1][j]);
265
 
266
              gcc_assert (cost <= 65535);
267
              move_cost[m][i][j] = cost;
268
 
269
              if (reg_class_subset_p ((enum reg_class) i, (enum reg_class) j))
270
                may_move_in_cost[m][i][j] = 0;
271
              else
272
                may_move_in_cost[m][i][j] = cost;
273
 
274
              if (reg_class_subset_p ((enum reg_class) j, (enum reg_class) i))
275
                may_move_out_cost[m][i][j] = 0;
276
              else
277
                may_move_out_cost[m][i][j] = cost;
278
            }
279
        }
280
    else
281
      for (j = 0; j < N_REG_CLASSES; j++)
282
        {
283
          move_cost[m][i][j] = 65535;
284
          may_move_in_cost[m][i][j] = 65535;
285
          may_move_out_cost[m][i][j] = 65535;
286
        }
287
}
288
 
289
/* We need to save copies of some of the register information which
290
   can be munged by command-line switches so we can restore it during
291
   subsequent back-end reinitialization.  */
292
static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
293
static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
294
#ifdef CALL_REALLY_USED_REGISTERS
295
static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
296
#endif
297
static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
298
static HARD_REG_SET saved_accessible_reg_set;
299
static HARD_REG_SET saved_operand_reg_set;
300
 
301
/* Save the register information.  */
302
void
303
save_register_info (void)
304
{
305
  /* Sanity check:  make sure the target macros FIXED_REGISTERS and
306
     CALL_USED_REGISTERS had the right number of initializers.  */
307
  gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
308
  gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
309
  memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
310
  memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
311
 
312
  /* Likewise for call_really_used_regs.  */
313
#ifdef CALL_REALLY_USED_REGISTERS
314
  gcc_assert (sizeof call_really_used_regs
315
              == sizeof saved_call_really_used_regs);
316
  memcpy (saved_call_really_used_regs, call_really_used_regs,
317
          sizeof call_really_used_regs);
318
#endif
319
 
320
  /* And similarly for reg_names.  */
321
  gcc_assert (sizeof reg_names == sizeof saved_reg_names);
322
  memcpy (saved_reg_names, reg_names, sizeof reg_names);
323
  COPY_HARD_REG_SET (saved_accessible_reg_set, accessible_reg_set);
324
  COPY_HARD_REG_SET (saved_operand_reg_set, operand_reg_set);
325
}
326
 
327
/* Restore the register information.  */
328
static void
329
restore_register_info (void)
330
{
331
  memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
332
  memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
333
 
334
#ifdef CALL_REALLY_USED_REGISTERS
335
  memcpy (call_really_used_regs, saved_call_really_used_regs,
336
          sizeof call_really_used_regs);
337
#endif
338
 
339
  memcpy (reg_names, saved_reg_names, sizeof reg_names);
340
  COPY_HARD_REG_SET (accessible_reg_set, saved_accessible_reg_set);
341
  COPY_HARD_REG_SET (operand_reg_set, saved_operand_reg_set);
342
}
343
 
344
/* After switches have been processed, which perhaps alter
345
   `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs.  */
346
static void
347
init_reg_sets_1 (void)
348
{
349
  unsigned int i, j;
350
  unsigned int /* enum machine_mode */ m;
351
 
352
  restore_register_info ();
353
 
354
#ifdef REG_ALLOC_ORDER
355
  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
356
    inv_reg_alloc_order[reg_alloc_order[i]] = i;
357
#endif
358
 
359
  /* Let the target tweak things if necessary.  */
360
 
361
  targetm.conditional_register_usage ();
362
 
363
  /* Compute number of hard regs in each class.  */
364
 
365
  memset (reg_class_size, 0, sizeof reg_class_size);
366
  for (i = 0; i < N_REG_CLASSES; i++)
367
    {
368
      bool any_nonfixed = false;
369
      for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
370
        if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
371
          {
372
            reg_class_size[i]++;
373
            if (!fixed_regs[j])
374
              any_nonfixed = true;
375
          }
376
      class_only_fixed_regs[i] = !any_nonfixed;
377
    }
378
 
379
  /* Initialize the table of subunions.
380
     reg_class_subunion[I][J] gets the largest-numbered reg-class
381
     that is contained in the union of classes I and J.  */
382
 
383
  memset (reg_class_subunion, 0, sizeof reg_class_subunion);
384
  for (i = 0; i < N_REG_CLASSES; i++)
385
    {
386
      for (j = 0; j < N_REG_CLASSES; j++)
387
        {
388
          HARD_REG_SET c;
389
          int k;
390
 
391
          COPY_HARD_REG_SET (c, reg_class_contents[i]);
392
          IOR_HARD_REG_SET (c, reg_class_contents[j]);
393
          for (k = 0; k < N_REG_CLASSES; k++)
394
            if (hard_reg_set_subset_p (reg_class_contents[k], c)
395
                && !hard_reg_set_subset_p (reg_class_contents[k],
396
                                          reg_class_contents
397
                                          [(int) reg_class_subunion[i][j]]))
398
              reg_class_subunion[i][j] = (enum reg_class) k;
399
        }
400
    }
401
 
402
  /* Initialize the table of superunions.
403
     reg_class_superunion[I][J] gets the smallest-numbered reg-class
404
     containing the union of classes I and J.  */
405
 
406
  memset (reg_class_superunion, 0, sizeof reg_class_superunion);
407
  for (i = 0; i < N_REG_CLASSES; i++)
408
    {
409
      for (j = 0; j < N_REG_CLASSES; j++)
410
        {
411
          HARD_REG_SET c;
412
          int k;
413
 
414
          COPY_HARD_REG_SET (c, reg_class_contents[i]);
415
          IOR_HARD_REG_SET (c, reg_class_contents[j]);
416
          for (k = 0; k < N_REG_CLASSES; k++)
417
            if (hard_reg_set_subset_p (c, reg_class_contents[k]))
418
              break;
419
 
420
          reg_class_superunion[i][j] = (enum reg_class) k;
421
        }
422
    }
423
 
424
  /* Initialize the tables of subclasses and superclasses of each reg class.
425
     First clear the whole table, then add the elements as they are found.  */
426
 
427
  for (i = 0; i < N_REG_CLASSES; i++)
428
    {
429
      for (j = 0; j < N_REG_CLASSES; j++)
430
        reg_class_subclasses[i][j] = LIM_REG_CLASSES;
431
    }
432
 
433
  for (i = 0; i < N_REG_CLASSES; i++)
434
    {
435
      if (i == (int) NO_REGS)
436
        continue;
437
 
438
      for (j = i + 1; j < N_REG_CLASSES; j++)
439
        if (hard_reg_set_subset_p (reg_class_contents[i],
440
                                  reg_class_contents[j]))
441
          {
442
            /* Reg class I is a subclass of J.
443
               Add J to the table of superclasses of I.  */
444
            enum reg_class *p;
445
 
446
            /* Add I to the table of superclasses of J.  */
447
            p = &reg_class_subclasses[j][0];
448
            while (*p != LIM_REG_CLASSES) p++;
449
            *p = (enum reg_class) i;
450
          }
451
    }
452
 
453
  /* Initialize "constant" tables.  */
454
 
455
  CLEAR_HARD_REG_SET (fixed_reg_set);
456
  CLEAR_HARD_REG_SET (call_used_reg_set);
457
  CLEAR_HARD_REG_SET (call_fixed_reg_set);
458
  CLEAR_HARD_REG_SET (regs_invalidated_by_call);
459
  if (!regs_invalidated_by_call_regset)
460
    {
461
      bitmap_obstack_initialize (&persistent_obstack);
462
      regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
463
    }
464
  else
465
    CLEAR_REG_SET (regs_invalidated_by_call_regset);
466
  if (!fixed_reg_set_regset)
467
    fixed_reg_set_regset = ALLOC_REG_SET (&persistent_obstack);
468
  else
469
    CLEAR_REG_SET (fixed_reg_set_regset);
470
 
471
  AND_HARD_REG_SET (operand_reg_set, accessible_reg_set);
472
  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
473
    {
474
      /* As a special exception, registers whose class is NO_REGS are
475
         not accepted by `register_operand'.  The reason for this change
476
         is to allow the representation of special architecture artifacts
477
         (such as a condition code register) without extending the rtl
478
         definitions.  Since registers of class NO_REGS cannot be used
479
         as registers in any case where register classes are examined,
480
         it is better to apply this exception in a target-independent way.  */
481
      if (REGNO_REG_CLASS (i) == NO_REGS)
482
        CLEAR_HARD_REG_BIT (operand_reg_set, i);
483
 
484
      /* If a register is too limited to be treated as a register operand,
485
         then it should never be allocated to a pseudo.  */
486
      if (!TEST_HARD_REG_BIT (operand_reg_set, i))
487
        {
488
          fixed_regs[i] = 1;
489
          call_used_regs[i] = 1;
490
        }
491
 
492
      /* call_used_regs must include fixed_regs.  */
493
      gcc_assert (!fixed_regs[i] || call_used_regs[i]);
494
#ifdef CALL_REALLY_USED_REGISTERS
495
      /* call_used_regs must include call_really_used_regs.  */
496
      gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
497
#endif
498
 
499
      if (fixed_regs[i])
500
        {
501
          SET_HARD_REG_BIT (fixed_reg_set, i);
502
          SET_REGNO_REG_SET (fixed_reg_set_regset, i);
503
        }
504
 
505
      if (call_used_regs[i])
506
        SET_HARD_REG_BIT (call_used_reg_set, i);
507
 
508
      /* There are a couple of fixed registers that we know are safe to
509
         exclude from being clobbered by calls:
510
 
511
         The frame pointer is always preserved across calls.  The arg
512
         pointer is if it is fixed.  The stack pointer usually is,
513
         unless TARGET_RETURN_POPS_ARGS, in which case an explicit
514
         CLOBBER will be present.  If we are generating PIC code, the
515
         PIC offset table register is preserved across calls, though the
516
         target can override that.  */
517
 
518
      if (i == STACK_POINTER_REGNUM)
519
        ;
520
      else if (global_regs[i])
521
        {
522
          SET_HARD_REG_BIT (regs_invalidated_by_call, i);
523
          SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
524
        }
525
      else if (i == FRAME_POINTER_REGNUM)
526
        ;
527
#if !HARD_FRAME_POINTER_IS_FRAME_POINTER
528
      else if (i == HARD_FRAME_POINTER_REGNUM)
529
        ;
530
#endif
531
#if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
532
      else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
533
        ;
534
#endif
535
      else if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
536
               && i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
537
        ;
538
      else if (CALL_REALLY_USED_REGNO_P (i))
539
        {
540
          SET_HARD_REG_BIT (regs_invalidated_by_call, i);
541
          SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
542
        }
543
    }
544
 
545
  COPY_HARD_REG_SET(call_fixed_reg_set, fixed_reg_set);
546
 
547
  /* Preserve global registers if called more than once.  */
548
  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
549
    {
550
      if (global_regs[i])
551
        {
552
          fixed_regs[i] = call_used_regs[i] = 1;
553
          SET_HARD_REG_BIT (fixed_reg_set, i);
554
          SET_HARD_REG_BIT (call_used_reg_set, i);
555
          SET_HARD_REG_BIT (call_fixed_reg_set, i);
556
        }
557
    }
558
 
559
  memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
560
  memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
561
  for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
562
    {
563
      HARD_REG_SET ok_regs;
564
      CLEAR_HARD_REG_SET (ok_regs);
565
      for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
566
        if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, (enum machine_mode) m))
567
          SET_HARD_REG_BIT (ok_regs, j);
568
 
569
      for (i = 0; i < N_REG_CLASSES; i++)
570
        if ((targetm.class_max_nregs ((reg_class_t) i, (enum machine_mode) m)
571
             <= reg_class_size[i])
572
            && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
573
          {
574
             contains_reg_of_mode [i][m] = 1;
575
             have_regs_of_mode [m] = 1;
576
          }
577
     }
578
 
579
  /* Reset move_cost and friends, making sure we only free shared
580
     table entries once.  */
581
  for (i = 0; i < MAX_MACHINE_MODE; i++)
582
    if (move_cost[i])
583
      {
584
        for (j = 0; j < i && move_cost[i] != move_cost[j]; j++)
585
          ;
586
        if (i == j)
587
          {
588
            free (move_cost[i]);
589
            free (may_move_in_cost[i]);
590
            free (may_move_out_cost[i]);
591
          }
592
      }
593
  memset (move_cost, 0, sizeof move_cost);
594
  memset (may_move_in_cost, 0, sizeof may_move_in_cost);
595
  memset (may_move_out_cost, 0, sizeof may_move_out_cost);
596
  last_mode_for_init_move_cost = -1;
597
}
598
 
599
/* Compute the table of register modes.
600
   These values are used to record death information for individual registers
601
   (as opposed to a multi-register mode).
602
   This function might be invoked more than once, if the target has support
603
   for changing register usage conventions on a per-function basis.
604
*/
605
void
606
init_reg_modes_target (void)
607
{
608
  int i, j;
609
 
610
  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
611
    for (j = 0; j < MAX_MACHINE_MODE; j++)
612
      hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
613
 
614
  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
615
    {
616
      reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
617
 
618
      /* If we couldn't find a valid mode, just use the previous mode
619
         if it is suitable, otherwise fall back on word_mode.  */
620
      if (reg_raw_mode[i] == VOIDmode)
621
        {
622
          if (i > 0 && hard_regno_nregs[i][reg_raw_mode[i - 1]] == 1)
623
            reg_raw_mode[i] = reg_raw_mode[i - 1];
624
          else
625
            reg_raw_mode[i] = word_mode;
626
        }
627
    }
628
}
629
 
630
/* Finish initializing the register sets and initialize the register modes.
631
   This function might be invoked more than once, if the target has support
632
   for changing register usage conventions on a per-function basis.
633
*/
634
void
635
init_regs (void)
636
{
637
  /* This finishes what was started by init_reg_sets, but couldn't be done
638
     until after register usage was specified.  */
639
  init_reg_sets_1 ();
640
}
641
 
642
/* The same as previous function plus initializing IRA.  */
643
void
644
reinit_regs (void)
645
{
646
  init_regs ();
647
  /* caller_save needs to be re-initialized.  */
648
  caller_save_initialized_p = false;
649
  ira_init ();
650
}
651
 
652
/* Initialize some fake stack-frame MEM references for use in
653
   memory_move_secondary_cost.  */
654
void
655
init_fake_stack_mems (void)
656
{
657
  int i;
658
 
659
  for (i = 0; i < MAX_MACHINE_MODE; i++)
660
    top_of_stack[i] = gen_rtx_MEM ((enum machine_mode) i, stack_pointer_rtx);
661
}
662
 
663
 
664
/* Compute cost of moving data from a register of class FROM to one of
665
   TO, using MODE.  */
666
 
667
int
668
register_move_cost (enum machine_mode mode, reg_class_t from, reg_class_t to)
669
{
670
  return targetm.register_move_cost (mode, from, to);
671
}
672
 
673
/* Compute cost of moving registers to/from memory.  */
674
 
675
int
676
memory_move_cost (enum machine_mode mode, reg_class_t rclass, bool in)
677
{
678
  return targetm.memory_move_cost (mode, rclass, in);
679
}
680
 
681
/* Compute extra cost of moving registers to/from memory due to reloads.
682
   Only needed if secondary reloads are required for memory moves.  */
683
int
684
memory_move_secondary_cost (enum machine_mode mode, reg_class_t rclass,
685
                            bool in)
686
{
687
  reg_class_t altclass;
688
  int partial_cost = 0;
689
  /* We need a memory reference to feed to SECONDARY... macros.  */
690
  /* mem may be unused even if the SECONDARY_ macros are defined.  */
691
  rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
692
 
693
  altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
694
 
695
  if (altclass == NO_REGS)
696
    return 0;
697
 
698
  if (in)
699
    partial_cost = register_move_cost (mode, altclass, rclass);
700
  else
701
    partial_cost = register_move_cost (mode, rclass, altclass);
702
 
703
  if (rclass == altclass)
704
    /* This isn't simply a copy-to-temporary situation.  Can't guess
705
       what it is, so TARGET_MEMORY_MOVE_COST really ought not to be
706
       calling here in that case.
707
 
708
       I'm tempted to put in an assert here, but returning this will
709
       probably only give poor estimates, which is what we would've
710
       had before this code anyways.  */
711
    return partial_cost;
712
 
713
  /* Check if the secondary reload register will also need a
714
     secondary reload.  */
715
  return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
716
}
717
 
718
/* Return a machine mode that is legitimate for hard reg REGNO and large
719
   enough to save nregs.  If we can't find one, return VOIDmode.
720
   If CALL_SAVED is true, only consider modes that are call saved.  */
721
enum machine_mode
722
choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
723
                      unsigned int nregs, bool call_saved)
724
{
725
  unsigned int /* enum machine_mode */ m;
726
  enum machine_mode found_mode = VOIDmode, mode;
727
 
728
  /* We first look for the largest integer mode that can be validly
729
     held in REGNO.  If none, we look for the largest floating-point mode.
730
     If we still didn't find a valid mode, try CCmode.  */
731
 
732
  for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
733
       mode != VOIDmode;
734
       mode = GET_MODE_WIDER_MODE (mode))
735
    if ((unsigned) hard_regno_nregs[regno][mode] == nregs
736
        && HARD_REGNO_MODE_OK (regno, mode)
737
        && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
738
      found_mode = mode;
739
 
740
  if (found_mode != VOIDmode)
741
    return found_mode;
742
 
743
  for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
744
       mode != VOIDmode;
745
       mode = GET_MODE_WIDER_MODE (mode))
746
    if ((unsigned) hard_regno_nregs[regno][mode] == nregs
747
        && HARD_REGNO_MODE_OK (regno, mode)
748
        && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
749
      found_mode = mode;
750
 
751
  if (found_mode != VOIDmode)
752
    return found_mode;
753
 
754
  for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
755
       mode != VOIDmode;
756
       mode = GET_MODE_WIDER_MODE (mode))
757
    if ((unsigned) hard_regno_nregs[regno][mode] == nregs
758
        && HARD_REGNO_MODE_OK (regno, mode)
759
        && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
760
      found_mode = mode;
761
 
762
  if (found_mode != VOIDmode)
763
    return found_mode;
764
 
765
  for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
766
       mode != VOIDmode;
767
       mode = GET_MODE_WIDER_MODE (mode))
768
    if ((unsigned) hard_regno_nregs[regno][mode] == nregs
769
        && HARD_REGNO_MODE_OK (regno, mode)
770
        && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
771
      found_mode = mode;
772
 
773
  if (found_mode != VOIDmode)
774
    return found_mode;
775
 
776
  /* Iterate over all of the CCmodes.  */
777
  for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
778
    {
779
      mode = (enum machine_mode) m;
780
      if ((unsigned) hard_regno_nregs[regno][mode] == nregs
781
          && HARD_REGNO_MODE_OK (regno, mode)
782
          && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
783
        return mode;
784
    }
785
 
786
  /* We can't find a mode valid for this register.  */
787
  return VOIDmode;
788
}
789
 
790
/* Specify the usage characteristics of the register named NAME.
791
   It should be a fixed register if FIXED and a
792
   call-used register if CALL_USED.  */
793
void
794
fix_register (const char *name, int fixed, int call_used)
795
{
796
  int i;
797
  int reg, nregs;
798
 
799
  /* Decode the name and update the primary form of
800
     the register info.  */
801
 
802
  if ((reg = decode_reg_name_and_count (name, &nregs)) >= 0)
803
    {
804
      gcc_assert (nregs >= 1);
805
      for (i = reg; i < reg + nregs; i++)
806
        {
807
          if ((i == STACK_POINTER_REGNUM
808
#ifdef HARD_FRAME_POINTER_REGNUM
809
               || i == HARD_FRAME_POINTER_REGNUM
810
#else
811
               || i == FRAME_POINTER_REGNUM
812
#endif
813
               )
814
              && (fixed == 0 || call_used == 0))
815
            {
816
              switch (fixed)
817
                {
818
                case 0:
819
                  switch (call_used)
820
                    {
821
                    case 0:
822
                      error ("can%'t use %qs as a call-saved register", name);
823
                      break;
824
 
825
                    case 1:
826
                      error ("can%'t use %qs as a call-used register", name);
827
                      break;
828
 
829
                    default:
830
                      gcc_unreachable ();
831
                    }
832
                  break;
833
 
834
                case 1:
835
                  switch (call_used)
836
                    {
837
                    case 1:
838
                      error ("can%'t use %qs as a fixed register", name);
839
                      break;
840
 
841
                    case 0:
842
                    default:
843
                      gcc_unreachable ();
844
                    }
845
                  break;
846
 
847
                default:
848
                  gcc_unreachable ();
849
                }
850
            }
851
          else
852
            {
853
              fixed_regs[i] = fixed;
854
              call_used_regs[i] = call_used;
855
#ifdef CALL_REALLY_USED_REGISTERS
856
              if (fixed == 0)
857
                call_really_used_regs[i] = call_used;
858
#endif
859
            }
860
        }
861
    }
862
  else
863
    {
864
      warning (0, "unknown register name: %s", name);
865
    }
866
}
867
 
868
/* Mark register number I as global.  */
869
void
870
globalize_reg (tree decl, int i)
871
{
872
  location_t loc = DECL_SOURCE_LOCATION (decl);
873
 
874
#ifdef STACK_REGS
875
  if (IN_RANGE (i, FIRST_STACK_REG, LAST_STACK_REG))
876
    {
877
      error ("stack register used for global register variable");
878
      return;
879
    }
880
#endif
881
 
882
  if (fixed_regs[i] == 0 && no_global_reg_vars)
883
    error_at (loc, "global register variable follows a function definition");
884
 
885
  if (global_regs[i])
886
    {
887
      warning_at (loc, 0,
888
                  "register of %qD used for multiple global register variables",
889
                  decl);
890
      inform (DECL_SOURCE_LOCATION (global_regs_decl[i]),
891
              "conflicts with %qD", global_regs_decl[i]);
892
      return;
893
    }
894
 
895
  if (call_used_regs[i] && ! fixed_regs[i])
896
    warning_at (loc, 0, "call-clobbered register used for global register variable");
897
 
898
  global_regs[i] = 1;
899
  global_regs_decl[i] = decl;
900
 
901
  /* If we're globalizing the frame pointer, we need to set the
902
     appropriate regs_invalidated_by_call bit, even if it's already
903
     set in fixed_regs.  */
904
  if (i != STACK_POINTER_REGNUM)
905
    {
906
      SET_HARD_REG_BIT (regs_invalidated_by_call, i);
907
      SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
908
    }
909
 
910
  /* If already fixed, nothing else to do.  */
911
  if (fixed_regs[i])
912
    return;
913
 
914
  fixed_regs[i] = call_used_regs[i] = 1;
915
#ifdef CALL_REALLY_USED_REGISTERS
916
  call_really_used_regs[i] = 1;
917
#endif
918
 
919
  SET_HARD_REG_BIT (fixed_reg_set, i);
920
  SET_HARD_REG_BIT (call_used_reg_set, i);
921
  SET_HARD_REG_BIT (call_fixed_reg_set, i);
922
 
923
  reinit_regs ();
924
}
925
 
926
 
927
/* Structure used to record preferences of given pseudo.  */
928
struct reg_pref
929
{
930
  /* (enum reg_class) prefclass is the preferred class.  May be
931
     NO_REGS if no class is better than memory.  */
932
  char prefclass;
933
 
934
  /* altclass is a register class that we should use for allocating
935
     pseudo if no register in the preferred class is available.
936
     If no register in this class is available, memory is preferred.
937
 
938
     It might appear to be more general to have a bitmask of classes here,
939
     but since it is recommended that there be a class corresponding to the
940
     union of most major pair of classes, that generality is not required.  */
941
  char altclass;
942
 
943
  /* allocnoclass is a register class that IRA uses for allocating
944
     the pseudo.  */
945
  char allocnoclass;
946
};
947
 
948
/* Record preferences of each pseudo.  This is available after RA is
949
   run.  */
950
static struct reg_pref *reg_pref;
951
 
952
/* Current size of reg_info.  */
953
static int reg_info_size;
954
 
955
/* Return the reg_class in which pseudo reg number REGNO is best allocated.
956
   This function is sometimes called before the info has been computed.
957
   When that happens, just return GENERAL_REGS, which is innocuous.  */
958
enum reg_class
959
reg_preferred_class (int regno)
960
{
961
  if (reg_pref == 0)
962
    return GENERAL_REGS;
963
 
964
  return (enum reg_class) reg_pref[regno].prefclass;
965
}
966
 
967
enum reg_class
968
reg_alternate_class (int regno)
969
{
970
  if (reg_pref == 0)
971
    return ALL_REGS;
972
 
973
  return (enum reg_class) reg_pref[regno].altclass;
974
}
975
 
976
/* Return the reg_class which is used by IRA for its allocation.  */
977
enum reg_class
978
reg_allocno_class (int regno)
979
{
980
  if (reg_pref == 0)
981
    return NO_REGS;
982
 
983
  return (enum reg_class) reg_pref[regno].allocnoclass;
984
}
985
 
986
 
987
 
988
/* Allocate space for reg info.  */
989
static void
990
allocate_reg_info (void)
991
{
992
  reg_info_size = max_reg_num ();
993
  gcc_assert (! reg_pref && ! reg_renumber);
994
  reg_renumber = XNEWVEC (short, reg_info_size);
995
  reg_pref = XCNEWVEC (struct reg_pref, reg_info_size);
996
  memset (reg_renumber, -1, reg_info_size * sizeof (short));
997
}
998
 
999
 
1000
/* Resize reg info. The new elements will be uninitialized.  Return
1001
   TRUE if new elements (for new pseudos) were added.  */
1002
bool
1003
resize_reg_info (void)
1004
{
1005
  int old;
1006
 
1007
  if (reg_pref == NULL)
1008
    {
1009
      allocate_reg_info ();
1010
      return true;
1011
    }
1012
  if (reg_info_size == max_reg_num ())
1013
    return false;
1014
  old = reg_info_size;
1015
  reg_info_size = max_reg_num ();
1016
  gcc_assert (reg_pref && reg_renumber);
1017
  reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size);
1018
  reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size);
1019
  memset (reg_pref + old, -1,
1020
          (reg_info_size - old) * sizeof (struct reg_pref));
1021
  memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short));
1022
  return true;
1023
}
1024
 
1025
 
1026
/* Free up the space allocated by allocate_reg_info.  */
1027
void
1028
free_reg_info (void)
1029
{
1030
  if (reg_pref)
1031
    {
1032
      free (reg_pref);
1033
      reg_pref = NULL;
1034
    }
1035
 
1036
  if (reg_renumber)
1037
    {
1038
      free (reg_renumber);
1039
      reg_renumber = NULL;
1040
    }
1041
}
1042
 
1043
/* Initialize some global data for this pass.  */
1044
static unsigned int
1045
reginfo_init (void)
1046
{
1047
  if (df)
1048
    df_compute_regs_ever_live (true);
1049
 
1050
  /* This prevents dump_flow_info from losing if called
1051
     before reginfo is run.  */
1052
  reg_pref = NULL;
1053
  /* No more global register variables may be declared.  */
1054
  no_global_reg_vars = 1;
1055
  return 1;
1056
}
1057
 
1058
struct rtl_opt_pass pass_reginfo_init =
1059
{
1060
 {
1061
  RTL_PASS,
1062
  "reginfo",                            /* name */
1063
  NULL,                                 /* gate */
1064
  reginfo_init,                         /* execute */
1065
  NULL,                                 /* sub */
1066
  NULL,                                 /* next */
1067
  0,                                    /* static_pass_number */
1068
  TV_NONE,                              /* tv_id */
1069
  0,                                    /* properties_required */
1070
  0,                                    /* properties_provided */
1071
  0,                                    /* properties_destroyed */
1072
  0,                                    /* todo_flags_start */
1073
 
1074
 }
1075
};
1076
 
1077
 
1078
 
1079
/* Set up preferred, alternate, and cover classes for REGNO as
1080
   PREFCLASS, ALTCLASS, and ALLOCNOCLASS.  */
1081
void
1082
setup_reg_classes (int regno,
1083
                   enum reg_class prefclass, enum reg_class altclass,
1084
                   enum reg_class allocnoclass)
1085
{
1086
  if (reg_pref == NULL)
1087
    return;
1088
  gcc_assert (reg_info_size == max_reg_num ());
1089
  reg_pref[regno].prefclass = prefclass;
1090
  reg_pref[regno].altclass = altclass;
1091
  reg_pref[regno].allocnoclass = allocnoclass;
1092
}
1093
 
1094
 
1095
/* This is the `regscan' pass of the compiler, run just before cse and
1096
   again just before loop.  It finds the first and last use of each
1097
   pseudo-register.  */
1098
 
1099
static void reg_scan_mark_refs (rtx, rtx);
1100
 
1101
void
1102
reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED)
1103
{
1104
  rtx insn;
1105
 
1106
  timevar_push (TV_REG_SCAN);
1107
 
1108
  for (insn = f; insn; insn = NEXT_INSN (insn))
1109
    if (INSN_P (insn))
1110
      {
1111
        reg_scan_mark_refs (PATTERN (insn), insn);
1112
        if (REG_NOTES (insn))
1113
          reg_scan_mark_refs (REG_NOTES (insn), insn);
1114
      }
1115
 
1116
  timevar_pop (TV_REG_SCAN);
1117
}
1118
 
1119
 
1120
/* X is the expression to scan.  INSN is the insn it appears in.
1121
   NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1122
   We should only record information for REGs with numbers
1123
   greater than or equal to MIN_REGNO.  */
1124
static void
1125
reg_scan_mark_refs (rtx x, rtx insn)
1126
{
1127
  enum rtx_code code;
1128
  rtx dest;
1129
  rtx note;
1130
 
1131
  if (!x)
1132
    return;
1133
  code = GET_CODE (x);
1134
  switch (code)
1135
    {
1136
    case CONST:
1137
    case CONST_INT:
1138
    case CONST_DOUBLE:
1139
    case CONST_FIXED:
1140
    case CONST_VECTOR:
1141
    case CC0:
1142
    case PC:
1143
    case SYMBOL_REF:
1144
    case LABEL_REF:
1145
    case ADDR_VEC:
1146
    case ADDR_DIFF_VEC:
1147
    case REG:
1148
      return;
1149
 
1150
    case EXPR_LIST:
1151
      if (XEXP (x, 0))
1152
        reg_scan_mark_refs (XEXP (x, 0), insn);
1153
      if (XEXP (x, 1))
1154
        reg_scan_mark_refs (XEXP (x, 1), insn);
1155
      break;
1156
 
1157
    case INSN_LIST:
1158
      if (XEXP (x, 1))
1159
        reg_scan_mark_refs (XEXP (x, 1), insn);
1160
      break;
1161
 
1162
    case CLOBBER:
1163
      if (MEM_P (XEXP (x, 0)))
1164
        reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
1165
      break;
1166
 
1167
    case SET:
1168
      /* Count a set of the destination if it is a register.  */
1169
      for (dest = SET_DEST (x);
1170
           GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1171
           || GET_CODE (dest) == ZERO_EXTEND;
1172
           dest = XEXP (dest, 0))
1173
        ;
1174
 
1175
      /* If this is setting a pseudo from another pseudo or the sum of a
1176
         pseudo and a constant integer and the other pseudo is known to be
1177
         a pointer, set the destination to be a pointer as well.
1178
 
1179
         Likewise if it is setting the destination from an address or from a
1180
         value equivalent to an address or to the sum of an address and
1181
         something else.
1182
 
1183
         But don't do any of this if the pseudo corresponds to a user
1184
         variable since it should have already been set as a pointer based
1185
         on the type.  */
1186
 
1187
      if (REG_P (SET_DEST (x))
1188
          && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
1189
          /* If the destination pseudo is set more than once, then other
1190
             sets might not be to a pointer value (consider access to a
1191
             union in two threads of control in the presence of global
1192
             optimizations).  So only set REG_POINTER on the destination
1193
             pseudo if this is the only set of that pseudo.  */
1194
          && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
1195
          && ! REG_USERVAR_P (SET_DEST (x))
1196
          && ! REG_POINTER (SET_DEST (x))
1197
          && ((REG_P (SET_SRC (x))
1198
               && REG_POINTER (SET_SRC (x)))
1199
              || ((GET_CODE (SET_SRC (x)) == PLUS
1200
                   || GET_CODE (SET_SRC (x)) == LO_SUM)
1201
                  && CONST_INT_P (XEXP (SET_SRC (x), 1))
1202
                  && REG_P (XEXP (SET_SRC (x), 0))
1203
                  && REG_POINTER (XEXP (SET_SRC (x), 0)))
1204
              || GET_CODE (SET_SRC (x)) == CONST
1205
              || GET_CODE (SET_SRC (x)) == SYMBOL_REF
1206
              || GET_CODE (SET_SRC (x)) == LABEL_REF
1207
              || (GET_CODE (SET_SRC (x)) == HIGH
1208
                  && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
1209
                      || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
1210
                      || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
1211
              || ((GET_CODE (SET_SRC (x)) == PLUS
1212
                   || GET_CODE (SET_SRC (x)) == LO_SUM)
1213
                  && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
1214
                      || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
1215
                      || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
1216
              || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1217
                  && (GET_CODE (XEXP (note, 0)) == CONST
1218
                      || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
1219
                      || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
1220
        REG_POINTER (SET_DEST (x)) = 1;
1221
 
1222
      /* If this is setting a register from a register or from a simple
1223
         conversion of a register, propagate REG_EXPR.  */
1224
      if (REG_P (dest) && !REG_ATTRS (dest))
1225
        {
1226
          rtx src = SET_SRC (x);
1227
 
1228
          while (GET_CODE (src) == SIGN_EXTEND
1229
                 || GET_CODE (src) == ZERO_EXTEND
1230
                 || GET_CODE (src) == TRUNCATE
1231
                 || (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)))
1232
            src = XEXP (src, 0);
1233
 
1234
          set_reg_attrs_from_value (dest, src);
1235
        }
1236
 
1237
      /* ... fall through ...  */
1238
 
1239
    default:
1240
      {
1241
        const char *fmt = GET_RTX_FORMAT (code);
1242
        int i;
1243
        for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1244
          {
1245
            if (fmt[i] == 'e')
1246
              reg_scan_mark_refs (XEXP (x, i), insn);
1247
            else if (fmt[i] == 'E' && XVEC (x, i) != 0)
1248
              {
1249
                int j;
1250
                for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1251
                  reg_scan_mark_refs (XVECEXP (x, i, j), insn);
1252
              }
1253
          }
1254
      }
1255
    }
1256
}
1257
 
1258
 
1259
/* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
1260
   is also in C2.  */
1261
int
1262
reg_class_subset_p (reg_class_t c1, reg_class_t c2)
1263
{
1264
  return (c1 == c2
1265
          || c2 == ALL_REGS
1266
          || hard_reg_set_subset_p (reg_class_contents[(int) c1],
1267
                                   reg_class_contents[(int) c2]));
1268
}
1269
 
1270
/* Return nonzero if there is a register that is in both C1 and C2.  */
1271
int
1272
reg_classes_intersect_p (reg_class_t c1, reg_class_t c2)
1273
{
1274
  return (c1 == c2
1275
          || c1 == ALL_REGS
1276
          || c2 == ALL_REGS
1277
          || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1278
                                      reg_class_contents[(int) c2]));
1279
}
1280
 
1281
 
1282
 
1283
/* Passes for keeping and updating info about modes of registers
1284
   inside subregisters.  */
1285
 
1286
#ifdef CANNOT_CHANGE_MODE_CLASS
1287
 
1288
static bitmap invalid_mode_changes;
1289
 
1290
static void
1291
record_subregs_of_mode (rtx subreg, bitmap subregs_of_mode)
1292
{
1293
  enum machine_mode mode;
1294
  unsigned int regno;
1295
 
1296
  if (!REG_P (SUBREG_REG (subreg)))
1297
    return;
1298
 
1299
  regno = REGNO (SUBREG_REG (subreg));
1300
  mode = GET_MODE (subreg);
1301
 
1302
  if (regno < FIRST_PSEUDO_REGISTER)
1303
    return;
1304
 
1305
  if (bitmap_set_bit (subregs_of_mode,
1306
                      regno * NUM_MACHINE_MODES + (unsigned int) mode))
1307
    {
1308
      unsigned int rclass;
1309
      for (rclass = 0; rclass < N_REG_CLASSES; rclass++)
1310
        if (!bitmap_bit_p (invalid_mode_changes,
1311
                           regno * N_REG_CLASSES + rclass)
1312
            && CANNOT_CHANGE_MODE_CLASS (PSEUDO_REGNO_MODE (regno),
1313
                                         mode, (enum reg_class) rclass))
1314
          bitmap_set_bit (invalid_mode_changes,
1315
                          regno * N_REG_CLASSES + rclass);
1316
    }
1317
}
1318
 
1319
/* Call record_subregs_of_mode for all the subregs in X.  */
1320
static void
1321
find_subregs_of_mode (rtx x, bitmap subregs_of_mode)
1322
{
1323
  enum rtx_code code = GET_CODE (x);
1324
  const char * const fmt = GET_RTX_FORMAT (code);
1325
  int i;
1326
 
1327
  if (code == SUBREG)
1328
    record_subregs_of_mode (x, subregs_of_mode);
1329
 
1330
  /* Time for some deep diving.  */
1331
  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1332
    {
1333
      if (fmt[i] == 'e')
1334
        find_subregs_of_mode (XEXP (x, i), subregs_of_mode);
1335
      else if (fmt[i] == 'E')
1336
        {
1337
          int j;
1338
          for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1339
            find_subregs_of_mode (XVECEXP (x, i, j), subregs_of_mode);
1340
        }
1341
    }
1342
}
1343
 
1344
void
1345
init_subregs_of_mode (void)
1346
{
1347
  basic_block bb;
1348
  rtx insn;
1349
  bitmap_obstack srom_obstack;
1350
  bitmap subregs_of_mode;
1351
 
1352
  gcc_assert (invalid_mode_changes == NULL);
1353
  invalid_mode_changes = BITMAP_ALLOC (NULL);
1354
  bitmap_obstack_initialize (&srom_obstack);
1355
  subregs_of_mode = BITMAP_ALLOC (&srom_obstack);
1356
 
1357
  FOR_EACH_BB (bb)
1358
    FOR_BB_INSNS (bb, insn)
1359
      if (NONDEBUG_INSN_P (insn))
1360
        find_subregs_of_mode (PATTERN (insn), subregs_of_mode);
1361
 
1362
  BITMAP_FREE (subregs_of_mode);
1363
  bitmap_obstack_release (&srom_obstack);
1364
}
1365
 
1366
/* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
1367
   mode.  */
1368
bool
1369
invalid_mode_change_p (unsigned int regno,
1370
                       enum reg_class rclass)
1371
{
1372
  return bitmap_bit_p (invalid_mode_changes,
1373
                       regno * N_REG_CLASSES + (unsigned) rclass);
1374
}
1375
 
1376
void
1377
finish_subregs_of_mode (void)
1378
{
1379
  BITMAP_FREE (invalid_mode_changes);
1380
}
1381
#else
1382
void
1383
init_subregs_of_mode (void)
1384
{
1385
}
1386
void
1387
finish_subregs_of_mode (void)
1388
{
1389
}
1390
 
1391
#endif /* CANNOT_CHANGE_MODE_CLASS */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.