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jeremybenn |
/* Define per-register tables for data flow info and register allocation.
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Copyright (C) 1987, 1993, 1994, 1995, 1996, 1997, 1998,
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1999, 2000, 2003, 2004, 2005, 2006, 2007, 2008, 2010 Free Software
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Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#ifndef GCC_REGS_H
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#define GCC_REGS_H
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#include "machmode.h"
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#include "hard-reg-set.h"
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#define REG_BYTES(R) mode_size[(int) GET_MODE (R)]
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/* When you only have the mode of a pseudo register before it has a hard
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register chosen for it, this reports the size of each hard register
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a pseudo in such a mode would get allocated to. A target may
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override this. */
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#ifndef REGMODE_NATURAL_SIZE
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#define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD
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#endif
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/* Maximum register number used in this function, plus one. */
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extern int max_regno;
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/* REG_N_REFS and REG_N_SETS are initialized by a call to
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regstat_init_n_sets_and_refs from the current values of
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DF_REG_DEF_COUNT and DF_REG_USE_COUNT. REG_N_REFS and REG_N_SETS
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should only be used if a pass need to change these values in some
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magical way or the pass needs to have accurate values for these
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and is not using incremental df scanning.
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At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call
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should be made to regstat_free_n_sets_and_refs.
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Local alloc seems to play pretty loose with these values.
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REG_N_REFS is set to 0 if the register is used in an asm.
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Furthermore, local_alloc calls regclass to hack both REG_N_REFS and
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REG_N_SETS for three address insns. Other passes seem to have
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other special values. */
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/* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */
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struct regstat_n_sets_and_refs_t
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{
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int sets; /* # of times (REG n) is set */
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int refs; /* # of times (REG n) is used or set */
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};
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extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs;
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/* Indexed by n, gives number of times (REG n) is used or set. */
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static inline int
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REG_N_REFS(int regno)
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{
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return regstat_n_sets_and_refs[regno].refs;
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}
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/* Indexed by n, gives number of times (REG n) is used or set. */
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#define SET_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs = V)
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#define INC_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs += V)
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/* Indexed by n, gives number of times (REG n) is set. */
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static inline int
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REG_N_SETS (int regno)
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{
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return regstat_n_sets_and_refs[regno].sets;
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}
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/* Indexed by n, gives number of times (REG n) is set. */
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#define SET_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets = V)
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#define INC_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets += V)
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/* Functions defined in reg-stat.c. */
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extern void regstat_init_n_sets_and_refs (void);
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extern void regstat_free_n_sets_and_refs (void);
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extern void regstat_compute_ri (void);
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extern void regstat_free_ri (void);
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extern bitmap regstat_get_setjmp_crosses (void);
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extern void regstat_compute_calls_crossed (void);
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extern void regstat_free_calls_crossed (void);
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/* Register information indexed by register number. This structure is
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initialized by calling regstat_compute_ri and is destroyed by
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calling regstat_free_ri. */
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struct reg_info_t
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{
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int freq; /* # estimated frequency (REG n) is used or set */
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int deaths; /* # of times (REG n) dies */
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int live_length; /* # of instructions (REG n) is live */
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int calls_crossed; /* # of calls (REG n) is live across */
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int freq_calls_crossed; /* # estimated frequency (REG n) crosses call */
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int throw_calls_crossed; /* # of calls that may throw (REG n) is live across */
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int basic_block; /* # of basic blocks (REG n) is used in */
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};
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extern struct reg_info_t *reg_info_p;
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/* The number allocated elements of reg_info_p. */
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extern size_t reg_info_p_size;
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/* Estimate frequency of references to register N. */
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#define REG_FREQ(N) (reg_info_p[N].freq)
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/* The weights for each insn varies from 0 to REG_FREQ_BASE.
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This constant does not need to be high, as in infrequently executed
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regions we want to count instructions equivalently to optimize for
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size instead of speed. */
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#define REG_FREQ_MAX 1000
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/* Compute register frequency from the BB frequency. When optimizing for size,
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or profile driven feedback is available and the function is never executed,
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frequency is always equivalent. Otherwise rescale the basic block
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frequency. */
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#define REG_FREQ_FROM_BB(bb) (optimize_size \
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|| (flag_branch_probabilities \
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&& !ENTRY_BLOCK_PTR->count) \
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? REG_FREQ_MAX \
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: ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
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? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
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: 1)
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/* Indexed by N, gives number of insns in which register N dies.
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Note that if register N is live around loops, it can die
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in transitions between basic blocks, and that is not counted here.
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So this is only a reliable indicator of how many regions of life there are
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for registers that are contained in one basic block. */
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#define REG_N_DEATHS(N) (reg_info_p[N].deaths)
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/* Get the number of consecutive words required to hold pseudo-reg N. */
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#define PSEUDO_REGNO_SIZE(N) \
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((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \
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/ UNITS_PER_WORD)
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/* Get the number of bytes required to hold pseudo-reg N. */
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#define PSEUDO_REGNO_BYTES(N) \
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GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))
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/* Get the machine mode of pseudo-reg N. */
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#define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])
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/* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */
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#define REG_N_CALLS_CROSSED(N) (reg_info_p[N].calls_crossed)
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#define REG_FREQ_CALLS_CROSSED(N) (reg_info_p[N].freq_calls_crossed)
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/* Indexed by N, gives number of CALL_INSNS that may throw, across which
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(REG n) is live. */
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#define REG_N_THROWING_CALLS_CROSSED(N) (reg_info_p[N].throw_calls_crossed)
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/* Total number of instructions at which (REG n) is live. The larger
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this is, the less priority (REG n) gets for allocation in a hard
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register (in global-alloc). This is set in df-problems.c whenever
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register info is requested and remains valid for the rest of the
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compilation of the function; it is used to control register
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allocation.
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local-alloc.c may alter this number to change the priority.
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Negative values are special.
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-1 is used to mark a pseudo reg which has a constant or memory equivalent
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and is used infrequently enough that it should not get a hard register.
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-2 is used to mark a pseudo reg for a parameter, when a frame pointer
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is not required. global.c makes an allocno for this but does
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not try to assign a hard register to it. */
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#define REG_LIVE_LENGTH(N) (reg_info_p[N].live_length)
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/* Indexed by n, gives number of basic block that (REG n) is used in.
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If the value is REG_BLOCK_GLOBAL (-1),
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it means (REG n) is used in more than one basic block.
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REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know.
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This information remains valid for the rest of the compilation
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of the current function; it is used to control register allocation. */
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#define REG_BLOCK_UNKNOWN 0
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#define REG_BLOCK_GLOBAL -1
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#define REG_BASIC_BLOCK(N) (reg_info_p[N].basic_block)
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/* Vector of substitutions of register numbers,
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used to map pseudo regs into hardware regs.
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This can't be folded into reg_n_info without changing all of the
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machine dependent directories, since the reload functions
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in the machine dependent files access it. */
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extern short *reg_renumber;
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/* Flag set by local-alloc or global-alloc if they decide to allocate
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something in a call-clobbered register. */
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extern int caller_save_needed;
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/* Predicate to decide whether to give a hard reg to a pseudo which
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is referenced REFS times and would need to be saved and restored
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around a call CALLS times. */
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#ifndef CALLER_SAVE_PROFITABLE
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#define CALLER_SAVE_PROFITABLE(REFS, CALLS) (4 * (CALLS) < (REFS))
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#endif
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/* Select a register mode required for caller save of hard regno REGNO. */
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#ifndef HARD_REGNO_CALLER_SAVE_MODE
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#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
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choose_hard_reg_mode (REGNO, NREGS, false)
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#endif
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/* Registers that get partially clobbered by a call in a given mode.
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These must not be call used registers. */
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#ifndef HARD_REGNO_CALL_PART_CLOBBERED
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#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
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#endif
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typedef unsigned short move_table[N_REG_CLASSES];
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/* Target-dependent globals. */
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struct target_regs {
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/* For each starting hard register, the number of consecutive hard
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registers that a given machine mode occupies. */
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unsigned char x_hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
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/* For each hard register, the widest mode object that it can contain.
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This will be a MODE_INT mode if the register can hold integers. Otherwise
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it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
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register. */
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enum machine_mode x_reg_raw_mode[FIRST_PSEUDO_REGISTER];
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/* Vector indexed by machine mode saying whether there are regs of
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that mode. */
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bool x_have_regs_of_mode[MAX_MACHINE_MODE];
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/* 1 if the corresponding class contains a register of the given mode. */
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char x_contains_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE];
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/* Maximum cost of moving from a register in one class to a register
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in another class. Based on TARGET_REGISTER_MOVE_COST. */
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move_table *x_move_cost[MAX_MACHINE_MODE];
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/* Similar, but here we don't have to move if the first index is a
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subset of the second so in that case the cost is zero. */
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move_table *x_may_move_in_cost[MAX_MACHINE_MODE];
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/* Similar, but here we don't have to move if the first index is a
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superset of the second so in that case the cost is zero. */
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move_table *x_may_move_out_cost[MAX_MACHINE_MODE];
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/* Keep track of the last mode we initialized move costs for. */
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int x_last_mode_for_init_move_cost;
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/* Record for each mode whether we can move a register directly to or
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from an object of that mode in memory. If we can't, we won't try
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to use that mode directly when accessing a field of that mode. */
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char x_direct_load[NUM_MACHINE_MODES];
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char x_direct_store[NUM_MACHINE_MODES];
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| 284 |
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/* Record for each mode whether we can float-extend from memory. */
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bool x_float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES];
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};
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| 288 |
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extern struct target_regs default_target_regs;
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#if SWITCHABLE_TARGET
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extern struct target_regs *this_target_regs;
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#else
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#define this_target_regs (&default_target_regs)
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#endif
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#define hard_regno_nregs \
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(this_target_regs->x_hard_regno_nregs)
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#define reg_raw_mode \
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(this_target_regs->x_reg_raw_mode)
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#define have_regs_of_mode \
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(this_target_regs->x_have_regs_of_mode)
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#define contains_reg_of_mode \
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(this_target_regs->x_contains_reg_of_mode)
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#define move_cost \
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(this_target_regs->x_move_cost)
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#define may_move_in_cost \
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(this_target_regs->x_may_move_in_cost)
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#define may_move_out_cost \
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(this_target_regs->x_may_move_out_cost)
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#define direct_load \
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(this_target_regs->x_direct_load)
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#define direct_store \
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(this_target_regs->x_direct_store)
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| 313 |
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|
#define float_extend_from_mem \
|
| 314 |
|
|
(this_target_regs->x_float_extend_from_mem)
|
| 315 |
|
|
|
| 316 |
|
|
/* Return an exclusive upper bound on the registers occupied by hard
|
| 317 |
|
|
register (reg:MODE REGNO). */
|
| 318 |
|
|
|
| 319 |
|
|
static inline unsigned int
|
| 320 |
|
|
end_hard_regno (enum machine_mode mode, unsigned int regno)
|
| 321 |
|
|
{
|
| 322 |
|
|
return regno + hard_regno_nregs[regno][(int) mode];
|
| 323 |
|
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}
|
| 324 |
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|
| 325 |
|
|
/* Likewise for hard register X. */
|
| 326 |
|
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|
| 327 |
|
|
#define END_HARD_REGNO(X) end_hard_regno (GET_MODE (X), REGNO (X))
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| 328 |
|
|
|
| 329 |
|
|
/* Likewise for hard or pseudo register X. */
|
| 330 |
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|
|
| 331 |
|
|
#define END_REGNO(X) (HARD_REGISTER_P (X) ? END_HARD_REGNO (X) : REGNO (X) + 1)
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| 332 |
|
|
|
| 333 |
|
|
/* Add to REGS all the registers required to store a value of mode MODE
|
| 334 |
|
|
in register REGNO. */
|
| 335 |
|
|
|
| 336 |
|
|
static inline void
|
| 337 |
|
|
add_to_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode,
|
| 338 |
|
|
unsigned int regno)
|
| 339 |
|
|
{
|
| 340 |
|
|
unsigned int end_regno;
|
| 341 |
|
|
|
| 342 |
|
|
end_regno = end_hard_regno (mode, regno);
|
| 343 |
|
|
do
|
| 344 |
|
|
SET_HARD_REG_BIT (*regs, regno);
|
| 345 |
|
|
while (++regno < end_regno);
|
| 346 |
|
|
}
|
| 347 |
|
|
|
| 348 |
|
|
/* Likewise, but remove the registers. */
|
| 349 |
|
|
|
| 350 |
|
|
static inline void
|
| 351 |
|
|
remove_from_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode,
|
| 352 |
|
|
unsigned int regno)
|
| 353 |
|
|
{
|
| 354 |
|
|
unsigned int end_regno;
|
| 355 |
|
|
|
| 356 |
|
|
end_regno = end_hard_regno (mode, regno);
|
| 357 |
|
|
do
|
| 358 |
|
|
CLEAR_HARD_REG_BIT (*regs, regno);
|
| 359 |
|
|
while (++regno < end_regno);
|
| 360 |
|
|
}
|
| 361 |
|
|
|
| 362 |
|
|
/* Return true if REGS contains the whole of (reg:MODE REGNO). */
|
| 363 |
|
|
|
| 364 |
|
|
static inline bool
|
| 365 |
|
|
in_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode,
|
| 366 |
|
|
unsigned int regno)
|
| 367 |
|
|
{
|
| 368 |
|
|
unsigned int end_regno;
|
| 369 |
|
|
|
| 370 |
|
|
if (!TEST_HARD_REG_BIT (regs, regno))
|
| 371 |
|
|
return false;
|
| 372 |
|
|
|
| 373 |
|
|
end_regno = end_hard_regno (mode, regno);
|
| 374 |
|
|
while (++regno < end_regno)
|
| 375 |
|
|
if (!TEST_HARD_REG_BIT (regs, regno))
|
| 376 |
|
|
return false;
|
| 377 |
|
|
|
| 378 |
|
|
return true;
|
| 379 |
|
|
}
|
| 380 |
|
|
|
| 381 |
|
|
/* Return true if (reg:MODE REGNO) includes an element of REGS. */
|
| 382 |
|
|
|
| 383 |
|
|
static inline bool
|
| 384 |
|
|
overlaps_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode,
|
| 385 |
|
|
unsigned int regno)
|
| 386 |
|
|
{
|
| 387 |
|
|
unsigned int end_regno;
|
| 388 |
|
|
|
| 389 |
|
|
if (TEST_HARD_REG_BIT (regs, regno))
|
| 390 |
|
|
return true;
|
| 391 |
|
|
|
| 392 |
|
|
end_regno = end_hard_regno (mode, regno);
|
| 393 |
|
|
while (++regno < end_regno)
|
| 394 |
|
|
if (TEST_HARD_REG_BIT (regs, regno))
|
| 395 |
|
|
return true;
|
| 396 |
|
|
|
| 397 |
|
|
return false;
|
| 398 |
|
|
}
|
| 399 |
|
|
|
| 400 |
|
|
/* Like add_to_hard_reg_set, but use a REGNO/NREGS range instead of
|
| 401 |
|
|
REGNO and MODE. */
|
| 402 |
|
|
|
| 403 |
|
|
static inline void
|
| 404 |
|
|
add_range_to_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
|
| 405 |
|
|
int nregs)
|
| 406 |
|
|
{
|
| 407 |
|
|
while (nregs-- > 0)
|
| 408 |
|
|
SET_HARD_REG_BIT (*regs, regno + nregs);
|
| 409 |
|
|
}
|
| 410 |
|
|
|
| 411 |
|
|
/* Likewise, but remove the registers. */
|
| 412 |
|
|
|
| 413 |
|
|
static inline void
|
| 414 |
|
|
remove_range_from_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
|
| 415 |
|
|
int nregs)
|
| 416 |
|
|
{
|
| 417 |
|
|
while (nregs-- > 0)
|
| 418 |
|
|
CLEAR_HARD_REG_BIT (*regs, regno + nregs);
|
| 419 |
|
|
}
|
| 420 |
|
|
|
| 421 |
|
|
/* Like overlaps_hard_reg_set_p, but use a REGNO/NREGS range instead of
|
| 422 |
|
|
REGNO and MODE. */
|
| 423 |
|
|
static inline bool
|
| 424 |
|
|
range_overlaps_hard_reg_set_p (const HARD_REG_SET set, unsigned regno,
|
| 425 |
|
|
int nregs)
|
| 426 |
|
|
{
|
| 427 |
|
|
while (nregs-- > 0)
|
| 428 |
|
|
if (TEST_HARD_REG_BIT (set, regno + nregs))
|
| 429 |
|
|
return true;
|
| 430 |
|
|
return false;
|
| 431 |
|
|
}
|
| 432 |
|
|
|
| 433 |
|
|
/* Like in_hard_reg_set_p, but use a REGNO/NREGS range instead of
|
| 434 |
|
|
REGNO and MODE. */
|
| 435 |
|
|
static inline bool
|
| 436 |
|
|
range_in_hard_reg_set_p (const HARD_REG_SET set, unsigned regno, int nregs)
|
| 437 |
|
|
{
|
| 438 |
|
|
while (nregs-- > 0)
|
| 439 |
|
|
if (!TEST_HARD_REG_BIT (set, regno + nregs))
|
| 440 |
|
|
return false;
|
| 441 |
|
|
return true;
|
| 442 |
|
|
}
|
| 443 |
|
|
|
| 444 |
|
|
#endif /* GCC_REGS_H */
|