Subversion Repositories openrisc

/* Search an insn for pseudo regs that must be in hard regs and are not.

   Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,

   1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010

   Free Software Foundation, Inc.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify it under

the terms of the GNU General Public License as published by the Free

Software Foundation; either version 3, or (at your option) any later

version.

GCC is distributed in the hope that it will be useful, but WITHOUT ANY

WARRANTY; without even the implied warranty of MERCHANTABILITY or

FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

for more details.

You should have received a copy of the GNU General Public License

along with GCC; see the file COPYING3.  If not see

<http://www.gnu.org/licenses/>.  */

/* This file contains subroutines used only from the file reload1.c.

   It knows how to scan one insn for operands and values

   that need to be copied into registers to make valid code.

   It also finds other operands and values which are valid

   but for which equivalent values in registers exist and

   ought to be used instead.

   Before processing the first insn of the function, call `init_reload'.

   init_reload actually has to be called earlier anyway.

   To scan an insn, call `find_reloads'.  This does two things:

   1. sets up tables describing which values must be reloaded

   for this insn, and what kind of hard regs they must be reloaded into;

   2. optionally record the locations where those values appear in

   the data, so they can be replaced properly later.

   This is done only if the second arg to `find_reloads' is nonzero.

   The third arg to `find_reloads' specifies the number of levels

   of indirect addressing supported by the machine.  If it is zero,

   indirect addressing is not valid.  If it is one, (MEM (REG n))

   is valid even if (REG n) did not get a hard register; if it is two,

   (MEM (MEM (REG n))) is also valid even if (REG n) did not get a

   hard register, and similarly for higher values.

   Then you must choose the hard regs to reload those pseudo regs into,

   and generate appropriate load insns before this insn and perhaps

   also store insns after this insn.  Set up the array `reload_reg_rtx'

   to contain the REG rtx's for the registers you used.  In some

   cases `find_reloads' will return a nonzero value in `reload_reg_rtx'

   for certain reloads.  Then that tells you which register to use,

   so you do not need to allocate one.  But you still do need to add extra

   instructions to copy the value into and out of that register.

   Finally you must call `subst_reloads' to substitute the reload reg rtx's

   into the locations already recorded.

NOTE SIDE EFFECTS:

   find_reloads can alter the operands of the instruction it is called on.

   1. Two operands of any sort may be interchanged, if they are in a

   commutative instruction.

   This happens only if find_reloads thinks the instruction will compile

   better that way.

   2. Pseudo-registers that are equivalent to constants are replaced

   with those constants if they are not in hard registers.

1 happens every time find_reloads is called.

2 happens only when REPLACE is 1, which is only when

actually doing the reloads, not when just counting them.

Using a reload register for several reloads in one insn:

When an insn has reloads, it is considered as having three parts:

the input reloads, the insn itself after reloading, and the output reloads.

Reloads of values used in memory addresses are often needed for only one part.

When this is so, reload_when_needed records which part needs the reload.

Two reloads for different parts of the insn can share the same reload

register.

When a reload is used for addresses in multiple parts, or when it is

an ordinary operand, it is classified as RELOAD_OTHER, and cannot share

a register with any other reload.  */

#define REG_OK_STRICT

/* We do not enable this with ENABLE_CHECKING, since it is awfully slow.  */

#undef DEBUG_RELOAD

#include "config.h"

#include "system.h"

#include "coretypes.h"

#include "tm.h"

#include "rtl-error.h"

#include "tm_p.h"

#include "insn-config.h"

#include "expr.h"

#include "optabs.h"

#include "recog.h"

#include "df.h"

#include "reload.h"

#include "regs.h"

#include "addresses.h"

#include "hard-reg-set.h"

#include "flags.h"

#include "output.h"

#include "function.h"

#include "params.h"

#include "target.h"

#include "ira.h"

/* True if X is a constant that can be forced into the constant pool.

   MODE is the mode of the operand, or VOIDmode if not known.  */

#define CONST_POOL_OK_P(MODE, X)                \

  ((MODE) != VOIDmode                           \

   && CONSTANT_P (X)                            \

   && GET_CODE (X) != HIGH                      \

   && !targetm.cannot_force_const_mem (MODE, X))

/* True if C is a non-empty register class that has too few registers

   to be safely used as a reload target class.  */

static inline bool

small_register_class_p (reg_class_t rclass)

{

  return (reg_class_size [(int) rclass] == 1

          || (reg_class_size [(int) rclass] >= 1

              && targetm.class_likely_spilled_p (rclass)));

}

/* All reloads of the current insn are recorded here.  See reload.h for

   comments.  */

int n_reloads;

struct reload rld[MAX_RELOADS];

/* All the "earlyclobber" operands of the current insn

   are recorded here.  */

int n_earlyclobbers;

rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];

int reload_n_operands;

/* Replacing reloads.

   If `replace_reloads' is nonzero, then as each reload is recorded

   an entry is made for it in the table `replacements'.

   Then later `subst_reloads' can look through that table and

   perform all the replacements needed.  */

/* Nonzero means record the places to replace.  */

static int replace_reloads;

/* Each replacement is recorded with a structure like this.  */

struct replacement

{

  rtx *where;                   /* Location to store in */

  int what;                     /* which reload this is for */

  enum machine_mode mode;       /* mode it must have */

};

static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];

/* Number of replacements currently recorded.  */

static int n_replacements;

/* Used to track what is modified by an operand.  */

struct decomposition

{

  int reg_flag;         /* Nonzero if referencing a register.  */

  int safe;             /* Nonzero if this can't conflict with anything.  */

  rtx base;             /* Base address for MEM.  */

  HOST_WIDE_INT start;  /* Starting offset or register number.  */

  HOST_WIDE_INT end;    /* Ending offset or register number.  */

};

#ifdef SECONDARY_MEMORY_NEEDED

/* Save MEMs needed to copy from one class of registers to another.  One MEM

   is used per mode, but normally only one or two modes are ever used.

   We keep two versions, before and after register elimination.  The one

   after register elimination is record separately for each operand.  This

   is done in case the address is not valid to be sure that we separately

   reload each.  */

static rtx secondary_memlocs[NUM_MACHINE_MODES];

static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];

static int secondary_memlocs_elim_used = 0;

#endif

/* The instruction we are doing reloads for;

   so we can test whether a register dies in it.  */

static rtx this_insn;

/* Nonzero if this instruction is a user-specified asm with operands.  */

static int this_insn_is_asm;

/* If hard_regs_live_known is nonzero,

   we can tell which hard regs are currently live,

   at least enough to succeed in choosing dummy reloads.  */

static int hard_regs_live_known;

/* Indexed by hard reg number,

   element is nonnegative if hard reg has been spilled.

   This vector is passed to `find_reloads' as an argument

   and is not changed here.  */

static short *static_reload_reg_p;

/* Set to 1 in subst_reg_equivs if it changes anything.  */

static int subst_reg_equivs_changed;

/* On return from push_reload, holds the reload-number for the OUT

   operand, which can be different for that from the input operand.  */

static int output_reloadnum;

  /* Compare two RTX's.  */

#define MATCHES(x, y) \

 (x == y || (x != 0 && (REG_P (x)                                \

                        ? REG_P (y) && REGNO (x) == REGNO (y)   \

                        : rtx_equal_p (x, y) && ! side_effects_p (x))))

  /* Indicates if two reloads purposes are for similar enough things that we

     can merge their reloads.  */

#define MERGABLE_RELOADS(when1, when2, op1, op2) \

  ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER   \

   || ((when1) == (when2) && (op1) == (op2))            \

   || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \

   || ((when1) == RELOAD_FOR_OPERAND_ADDRESS            \

       && (when2) == RELOAD_FOR_OPERAND_ADDRESS)        \

   || ((when1) == RELOAD_FOR_OTHER_ADDRESS              \

       && (when2) == RELOAD_FOR_OTHER_ADDRESS))

  /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged.  */

#define MERGE_TO_OTHER(when1, when2, op1, op2) \

  ((when1) != (when2)                                   \

   || ! ((op1) == (op2)                                 \

         || (when1) == RELOAD_FOR_INPUT                 \

         || (when1) == RELOAD_FOR_OPERAND_ADDRESS       \

         || (when1) == RELOAD_FOR_OTHER_ADDRESS))

  /* If we are going to reload an address, compute the reload type to

     use.  */

#define ADDR_TYPE(type)                                 \

  ((type) == RELOAD_FOR_INPUT_ADDRESS                   \

   ? RELOAD_FOR_INPADDR_ADDRESS                         \

   : ((type) == RELOAD_FOR_OUTPUT_ADDRESS               \

      ? RELOAD_FOR_OUTADDR_ADDRESS                      \

      : (type)))

static int push_secondary_reload (int, rtx, int, int, enum reg_class,

                                  enum machine_mode, enum reload_type,

                                  enum insn_code *, secondary_reload_info *);

static enum reg_class find_valid_class (enum machine_mode, enum machine_mode,

                                        int, unsigned int);

static void push_replacement (rtx *, int, enum machine_mode);

static void dup_replacements (rtx *, rtx *);

static void combine_reloads (void);

static int find_reusable_reload (rtx *, rtx, enum reg_class,

                                 enum reload_type, int, int);

static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,

                              enum machine_mode, reg_class_t, int, int);

static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);

static struct decomposition decompose (rtx);

static int immune_p (rtx, rtx, struct decomposition);

static bool alternative_allows_const_pool_ref (rtx, const char *, int);

static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,

                                int *);

static rtx make_memloc (rtx, int);

static int maybe_memory_address_addr_space_p (enum machine_mode, rtx,

                                              addr_space_t, rtx *);

static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,

                                 int, enum reload_type, int, rtx);

static rtx subst_reg_equivs (rtx, rtx);

static rtx subst_indexed_address (rtx);

static void update_auto_inc_notes (rtx, int, int);

static int find_reloads_address_1 (enum machine_mode, addr_space_t, rtx, int,

                                   enum rtx_code, enum rtx_code, rtx *,

                                   int, enum reload_type,int, rtx);

static void find_reloads_address_part (rtx, rtx *, enum reg_class,

                                       enum machine_mode, int,

                                       enum reload_type, int);

static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,

                                        int, rtx, int *);

static void copy_replacements_1 (rtx *, rtx *, int);

static int find_inc_amount (rtx, rtx);

static int refers_to_mem_for_reload_p (rtx);

static int refers_to_regno_for_reload_p (unsigned int, unsigned int,

                                         rtx, rtx *);

/* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the

   list yet.  */

static void

push_reg_equiv_alt_mem (int regno, rtx mem)

{

  rtx it;

  for (it = reg_equiv_alt_mem_list (regno); it; it = XEXP (it, 1))

    if (rtx_equal_p (XEXP (it, 0), mem))

      return;

  reg_equiv_alt_mem_list (regno)

    = alloc_EXPR_LIST (REG_EQUIV, mem,

                       reg_equiv_alt_mem_list (regno));

}

/* Determine if any secondary reloads are needed for loading (if IN_P is

   nonzero) or storing (if IN_P is zero) X to or from a reload register of

   register class RELOAD_CLASS in mode RELOAD_MODE.  If secondary reloads

   are needed, push them.

   Return the reload number of the secondary reload we made, or -1 if

   we didn't need one.  *PICODE is set to the insn_code to use if we do

   need a secondary reload.  */

static int

push_secondary_reload (int in_p, rtx x, int opnum, int optional,

                       enum reg_class reload_class,

                       enum machine_mode reload_mode, enum reload_type type,

                       enum insn_code *picode, secondary_reload_info *prev_sri)

{

  enum reg_class rclass = NO_REGS;

  enum reg_class scratch_class;

  enum machine_mode mode = reload_mode;

  enum insn_code icode = CODE_FOR_nothing;

  enum insn_code t_icode = CODE_FOR_nothing;

  enum reload_type secondary_type;

  int s_reload, t_reload = -1;

  const char *scratch_constraint;

  char letter;

  secondary_reload_info sri;

  if (type == RELOAD_FOR_INPUT_ADDRESS

      || type == RELOAD_FOR_OUTPUT_ADDRESS

      || type == RELOAD_FOR_INPADDR_ADDRESS

      || type == RELOAD_FOR_OUTADDR_ADDRESS)

    secondary_type = type;

  else

    secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;

  *picode = CODE_FOR_nothing;

  /* If X is a paradoxical SUBREG, use the inner value to determine both the

     mode and object being reloaded.  */

  if (paradoxical_subreg_p (x))

    {

      x = SUBREG_REG (x);

      reload_mode = GET_MODE (x);

    }

  /* If X is a pseudo-register that has an equivalent MEM (actually, if it

     is still a pseudo-register by now, it *must* have an equivalent MEM

     but we don't want to assume that), use that equivalent when seeing if

     a secondary reload is needed since whether or not a reload is needed

     might be sensitive to the form of the MEM.  */

  if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER

      && reg_equiv_mem (REGNO (x)))

    x = reg_equiv_mem (REGNO (x));

  sri.icode = CODE_FOR_nothing;

  sri.prev_sri = prev_sri;

  rclass = (enum reg_class) targetm.secondary_reload (in_p, x, reload_class,

                                                      reload_mode, &sri);

  icode = (enum insn_code) sri.icode;

  /* If we don't need any secondary registers, done.  */

  if (rclass == NO_REGS && icode == CODE_FOR_nothing)

    return -1;

  if (rclass != NO_REGS)

    t_reload = push_secondary_reload (in_p, x, opnum, optional, rclass,

                                      reload_mode, type, &t_icode, &sri);

  /* If we will be using an insn, the secondary reload is for a

     scratch register.  */

  if (icode != CODE_FOR_nothing)

    {

      /* If IN_P is nonzero, the reload register will be the output in

         operand 0.  If IN_P is zero, the reload register will be the input

         in operand 1.  Outputs should have an initial "=", which we must

         skip.  */

      /* ??? It would be useful to be able to handle only two, or more than

         three, operands, but for now we can only handle the case of having

         exactly three: output, input and one temp/scratch.  */

      gcc_assert (insn_data[(int) icode].n_operands == 3);

      /* ??? We currently have no way to represent a reload that needs

         an icode to reload from an intermediate tertiary reload register.

         We should probably have a new field in struct reload to tag a

         chain of scratch operand reloads onto.   */

      gcc_assert (rclass == NO_REGS);

      scratch_constraint = insn_data[(int) icode].operand[2].constraint;

      gcc_assert (*scratch_constraint == '=');

      scratch_constraint++;

      if (*scratch_constraint == '&')

        scratch_constraint++;

      letter = *scratch_constraint;

      scratch_class = (letter == 'r' ? GENERAL_REGS

                       : REG_CLASS_FROM_CONSTRAINT ((unsigned char) letter,

                                                   scratch_constraint));

      rclass = scratch_class;

      mode = insn_data[(int) icode].operand[2].mode;

    }

  /* This case isn't valid, so fail.  Reload is allowed to use the same

     register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but

     in the case of a secondary register, we actually need two different

     registers for correct code.  We fail here to prevent the possibility of

     silently generating incorrect code later.

     The convention is that secondary input reloads are valid only if the

     secondary_class is different from class.  If you have such a case, you

     can not use secondary reloads, you must work around the problem some

     other way.

     Allow this when a reload_in/out pattern is being used.  I.e. assume

     that the generated code handles this case.  */

  gcc_assert (!in_p || rclass != reload_class || icode != CODE_FOR_nothing

              || t_icode != CODE_FOR_nothing);

  /* See if we can reuse an existing secondary reload.  */

  for (s_reload = 0; s_reload < n_reloads; s_reload++)

    if (rld[s_reload].secondary_p

        && (reg_class_subset_p (rclass, rld[s_reload].rclass)

            || reg_class_subset_p (rld[s_reload].rclass, rclass))

        && ((in_p && rld[s_reload].inmode == mode)

            || (! in_p && rld[s_reload].outmode == mode))

        && ((in_p && rld[s_reload].secondary_in_reload == t_reload)

            || (! in_p && rld[s_reload].secondary_out_reload == t_reload))

        && ((in_p && rld[s_reload].secondary_in_icode == t_icode)

            || (! in_p && rld[s_reload].secondary_out_icode == t_icode))

        && (small_register_class_p (rclass)

            || targetm.small_register_classes_for_mode_p (VOIDmode))

        && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,

                             opnum, rld[s_reload].opnum))

      {

        if (in_p)

          rld[s_reload].inmode = mode;

        if (! in_p)

          rld[s_reload].outmode = mode;

        if (reg_class_subset_p (rclass, rld[s_reload].rclass))

          rld[s_reload].rclass = rclass;

        rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);

        rld[s_reload].optional &= optional;

        rld[s_reload].secondary_p = 1;

        if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,

                            opnum, rld[s_reload].opnum))

          rld[s_reload].when_needed = RELOAD_OTHER;

        break;

      }

  if (s_reload == n_reloads)

    {

#ifdef SECONDARY_MEMORY_NEEDED

      /* If we need a memory location to copy between the two reload regs,

         set it up now.  Note that we do the input case before making

         the reload and the output case after.  This is due to the

         way reloads are output.  */

      if (in_p && icode == CODE_FOR_nothing

          && SECONDARY_MEMORY_NEEDED (rclass, reload_class, mode))

        {

          get_secondary_mem (x, reload_mode, opnum, type);

          /* We may have just added new reloads.  Make sure we add

             the new reload at the end.  */

          s_reload = n_reloads;

        }

#endif

      /* We need to make a new secondary reload for this register class.  */

      rld[s_reload].in = rld[s_reload].out = 0;

      rld[s_reload].rclass = rclass;

      rld[s_reload].inmode = in_p ? mode : VOIDmode;

      rld[s_reload].outmode = ! in_p ? mode : VOIDmode;

      rld[s_reload].reg_rtx = 0;

      rld[s_reload].optional = optional;

      rld[s_reload].inc = 0;

      /* Maybe we could combine these, but it seems too tricky.  */

      rld[s_reload].nocombine = 1;

      rld[s_reload].in_reg = 0;

      rld[s_reload].out_reg = 0;

      rld[s_reload].opnum = opnum;

      rld[s_reload].when_needed = secondary_type;

      rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;

      rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;

      rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;

      rld[s_reload].secondary_out_icode

        = ! in_p ? t_icode : CODE_FOR_nothing;

      rld[s_reload].secondary_p = 1;

      n_reloads++;

#ifdef SECONDARY_MEMORY_NEEDED

      if (! in_p && icode == CODE_FOR_nothing

          && SECONDARY_MEMORY_NEEDED (reload_class, rclass, mode))

        get_secondary_mem (x, mode, opnum, type);

#endif

    }

  *picode = icode;

  return s_reload;

}

/* If a secondary reload is needed, return its class.  If both an intermediate

   register and a scratch register is needed, we return the class of the

   intermediate register.  */

reg_class_t

secondary_reload_class (bool in_p, reg_class_t rclass, enum machine_mode mode,

                        rtx x)

{

  enum insn_code icode;

  secondary_reload_info sri;

  sri.icode = CODE_FOR_nothing;

  sri.prev_sri = NULL;

  rclass

    = (enum reg_class) targetm.secondary_reload (in_p, x, rclass, mode, &sri);

  icode = (enum insn_code) sri.icode;

  /* If there are no secondary reloads at all, we return NO_REGS.

     If an intermediate register is needed, we return its class.  */

  if (icode == CODE_FOR_nothing || rclass != NO_REGS)

    return rclass;

  /* No intermediate register is needed, but we have a special reload

     pattern, which we assume for now needs a scratch register.  */

  return scratch_reload_class (icode);

}

/* ICODE is the insn_code of a reload pattern.  Check that it has exactly

   three operands, verify that operand 2 is an output operand, and return

   its register class.

   ??? We'd like to be able to handle any pattern with at least 2 operands,

   for zero or more scratch registers, but that needs more infrastructure.  */

enum reg_class

scratch_reload_class (enum insn_code icode)

{

  const char *scratch_constraint;

  char scratch_letter;

  enum reg_class rclass;

  gcc_assert (insn_data[(int) icode].n_operands == 3);

  scratch_constraint = insn_data[(int) icode].operand[2].constraint;

  gcc_assert (*scratch_constraint == '=');

  scratch_constraint++;

  if (*scratch_constraint == '&')

    scratch_constraint++;

  scratch_letter = *scratch_constraint;

  if (scratch_letter == 'r')

    return GENERAL_REGS;

  rclass = REG_CLASS_FROM_CONSTRAINT ((unsigned char) scratch_letter,

                                     scratch_constraint);

  gcc_assert (rclass != NO_REGS);

  return rclass;

}

#ifdef SECONDARY_MEMORY_NEEDED

/* Return a memory location that will be used to copy X in mode MODE.

   If we haven't already made a location for this mode in this insn,

   call find_reloads_address on the location being returned.  */

rtx

get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,

                   int opnum, enum reload_type type)

{

  rtx loc;

  int mem_valid;

  /* By default, if MODE is narrower than a word, widen it to a word.

     This is required because most machines that require these memory

     locations do not support short load and stores from all registers

     (e.g., FP registers).  */

#ifdef SECONDARY_MEMORY_NEEDED_MODE

  mode = SECONDARY_MEMORY_NEEDED_MODE (mode);

#else

  if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))

    mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);

#endif

  /* If we already have made a MEM for this operand in MODE, return it.  */

  if (secondary_memlocs_elim[(int) mode][opnum] != 0)

    return secondary_memlocs_elim[(int) mode][opnum];

  /* If this is the first time we've tried to get a MEM for this mode,

     allocate a new one.  `something_changed' in reload will get set

     by noticing that the frame size has changed.  */

  if (secondary_memlocs[(int) mode] == 0)

    {

#ifdef SECONDARY_MEMORY_NEEDED_RTX

      secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);

#else

      secondary_memlocs[(int) mode]

        = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);

#endif

    }

  /* Get a version of the address doing any eliminations needed.  If that

     didn't give us a new MEM, make a new one if it isn't valid.  */

  loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);

  mem_valid = strict_memory_address_addr_space_p (mode, XEXP (loc, 0),

                                                  MEM_ADDR_SPACE (loc));

  if (! mem_valid && loc == secondary_memlocs[(int) mode])

    loc = copy_rtx (loc);

  /* The only time the call below will do anything is if the stack

     offset is too large.  In that case IND_LEVELS doesn't matter, so we

     can just pass a zero.  Adjust the type to be the address of the

     corresponding object.  If the address was valid, save the eliminated

     address.  If it wasn't valid, we need to make a reload each time, so

     don't save it.  */

  if (! mem_valid)

    {

      type =  (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS

               : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS

               : RELOAD_OTHER);

      find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),

                            opnum, type, 0, 0);

    }

  secondary_memlocs_elim[(int) mode][opnum] = loc;

  if (secondary_memlocs_elim_used <= (int)mode)

    secondary_memlocs_elim_used = (int)mode + 1;

  return loc;

}

/* Clear any secondary memory locations we've made.  */

void

clear_secondary_mem (void)

{

  memset (secondary_memlocs, 0, sizeof secondary_memlocs);

}

#endif /* SECONDARY_MEMORY_NEEDED */

/* Find the largest class which has at least one register valid in

   mode INNER, and which for every such register, that register number

   plus N is also valid in OUTER (if in range) and is cheap to move

   into REGNO.  Such a class must exist.  */

static enum reg_class

find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED,

                  enum machine_mode inner ATTRIBUTE_UNUSED, int n,

                  unsigned int dest_regno ATTRIBUTE_UNUSED)

{

  int best_cost = -1;

  int rclass;

  int regno;

  enum reg_class best_class = NO_REGS;

  enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);

  unsigned int best_size = 0;

  int cost;

  for (rclass = 1; rclass < N_REG_CLASSES; rclass++)

    {

      int bad = 0;

      int good = 0;

      for (regno = 0; regno < FIRST_PSEUDO_REGISTER - n && ! bad; regno++)

        if (TEST_HARD_REG_BIT (reg_class_contents[rclass], regno))

          {

            if (HARD_REGNO_MODE_OK (regno, inner))

              {

                good = 1;

                if (! TEST_HARD_REG_BIT (reg_class_contents[rclass], regno + n)

                    || ! HARD_REGNO_MODE_OK (regno + n, outer))

                  bad = 1;

              }

          }

      if (bad || !good)

        continue;

      cost = register_move_cost (outer, (enum reg_class) rclass, dest_class);