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jeremybenn |
/* Communication between reload.c, reload1.c and the rest of compiler.
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Copyright (C) 1987, 1991, 1992, 1993, 1994, 1995, 1997, 1998, 1999,
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2000, 2001, 2003, 2004, 2007, 2008, 2010
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Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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/* If secondary reloads are the same for inputs and outputs, define those
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macros here. */
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#ifdef SECONDARY_RELOAD_CLASS
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#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
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SECONDARY_RELOAD_CLASS (CLASS, MODE, X)
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#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
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SECONDARY_RELOAD_CLASS (CLASS, MODE, X)
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#endif
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extern int register_move_cost (enum machine_mode, reg_class_t, reg_class_t);
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extern int memory_move_cost (enum machine_mode, reg_class_t, bool);
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extern int memory_move_secondary_cost (enum machine_mode, reg_class_t, bool);
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/* Maximum number of reloads we can need. */
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#define MAX_RELOADS (2 * MAX_RECOG_OPERANDS * (MAX_REGS_PER_ADDRESS + 1))
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/* Encode the usage of a reload. The following codes are supported:
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RELOAD_FOR_INPUT reload of an input operand
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RELOAD_FOR_OUTPUT likewise, for output
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RELOAD_FOR_INSN a reload that must not conflict with anything
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used in the insn, but may conflict with
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something used before or after the insn
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RELOAD_FOR_INPUT_ADDRESS reload for parts of the address of an object
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that is an input reload
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RELOAD_FOR_INPADDR_ADDRESS reload needed for RELOAD_FOR_INPUT_ADDRESS
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RELOAD_FOR_OUTPUT_ADDRESS like RELOAD_FOR INPUT_ADDRESS, for output
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RELOAD_FOR_OUTADDR_ADDRESS reload needed for RELOAD_FOR_OUTPUT_ADDRESS
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RELOAD_FOR_OPERAND_ADDRESS reload for the address of a non-reloaded
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operand; these don't conflict with
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any other addresses.
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RELOAD_FOR_OPADDR_ADDR reload needed for RELOAD_FOR_OPERAND_ADDRESS
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reloads; usually secondary reloads
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RELOAD_OTHER none of the above, usually multiple uses
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RELOAD_FOR_OTHER_ADDRESS reload for part of the address of an input
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that is marked RELOAD_OTHER.
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This used to be "enum reload_when_needed" but some debuggers have trouble
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with an enum tag and variable of the same name. */
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enum reload_type
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{
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RELOAD_FOR_INPUT, RELOAD_FOR_OUTPUT, RELOAD_FOR_INSN,
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RELOAD_FOR_INPUT_ADDRESS, RELOAD_FOR_INPADDR_ADDRESS,
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RELOAD_FOR_OUTPUT_ADDRESS, RELOAD_FOR_OUTADDR_ADDRESS,
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RELOAD_FOR_OPERAND_ADDRESS, RELOAD_FOR_OPADDR_ADDR,
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RELOAD_OTHER, RELOAD_FOR_OTHER_ADDRESS
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};
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#ifdef GCC_INSN_CODES_H
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/* Each reload is recorded with a structure like this. */
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struct reload
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{
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/* The value to reload from */
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rtx in;
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/* Where to store reload-reg afterward if nec (often the same as
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reload_in) */
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rtx out;
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/* The class of registers to reload into. */
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enum reg_class rclass;
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/* The mode this operand should have when reloaded, on input. */
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enum machine_mode inmode;
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/* The mode this operand should have when reloaded, on output. */
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enum machine_mode outmode;
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/* The mode of the reload register. */
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enum machine_mode mode;
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/* the largest number of registers this reload will require. */
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unsigned int nregs;
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/* Positive amount to increment or decrement by if
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reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
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Ignored otherwise (don't assume it is zero). */
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int inc;
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/* A reg for which reload_in is the equivalent.
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If reload_in is a symbol_ref which came from
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reg_equiv_constant, then this is the pseudo
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which has that symbol_ref as equivalent. */
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rtx in_reg;
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rtx out_reg;
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/* Used in find_reload_regs to record the allocated register. */
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int regno;
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/* This is the register to reload into. If it is zero when `find_reloads'
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returns, you must find a suitable register in the class specified by
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reload_reg_class, and store here an rtx for that register with mode from
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reload_inmode or reload_outmode. */
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rtx reg_rtx;
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/* The operand number being reloaded. This is used to group related reloads
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and need not always be equal to the actual operand number in the insn,
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though it current will be; for in-out operands, it is one of the two
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operand numbers. */
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int opnum;
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/* Gives the reload number of a secondary input reload, when needed;
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otherwise -1. */
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int secondary_in_reload;
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/* Gives the reload number of a secondary output reload, when needed;
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otherwise -1. */
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int secondary_out_reload;
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/* If a secondary input reload is required, gives the INSN_CODE that uses the
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secondary reload as a scratch register, or CODE_FOR_nothing if the
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secondary reload register is to be an intermediate register. */
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enum insn_code secondary_in_icode;
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/* Likewise, for a secondary output reload. */
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enum insn_code secondary_out_icode;
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/* Classifies reload as needed either for addressing an input reload,
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addressing an output, for addressing a non-reloaded mem ref, or for
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unspecified purposes (i.e., more than one of the above). */
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enum reload_type when_needed;
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/* Nonzero for an optional reload. Optional reloads are ignored unless the
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value is already sitting in a register. */
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unsigned int optional:1;
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/* nonzero if this reload shouldn't be combined with another reload. */
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unsigned int nocombine:1;
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/* Nonzero if this is a secondary register for one or more reloads. */
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unsigned int secondary_p:1;
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/* Nonzero if this reload must use a register not already allocated to a
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group. */
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unsigned int nongroup:1;
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};
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extern struct reload rld[MAX_RELOADS];
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extern int n_reloads;
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#endif
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/* Target-dependent globals. */
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struct target_reload {
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/* Nonzero if indirect addressing is supported when the innermost MEM is
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of the form (MEM (SYMBOL_REF sym)). It is assumed that the level to
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which these are valid is the same as spill_indirect_levels, above. */
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bool x_indirect_symref_ok;
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/* Nonzero if an address (plus (reg frame_pointer) (reg ...)) is valid. */
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bool x_double_reg_address_ok;
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/* Nonzero if indirect addressing is supported on the machine; this means
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that spilling (REG n) does not require reloading it into a register in
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order to do (MEM (REG n)) or (MEM (PLUS (REG n) (CONST_INT c))). The
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value indicates the level of indirect addressing supported, e.g., two
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means that (MEM (MEM (REG n))) is also valid if (REG n) does not get
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a hard register. */
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bool x_spill_indirect_levels;
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/* True if caller-save has been reinitialized. */
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bool x_caller_save_initialized_p;
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/* Modes for each hard register that we can save. The smallest mode is wide
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enough to save the entire contents of the register. When saving the
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register because it is live we first try to save in multi-register modes.
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If that is not possible the save is done one register at a time. */
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enum machine_mode (x_regno_save_mode
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[FIRST_PSEUDO_REGISTER]
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[MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]);
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/* We will only make a register eligible for caller-save if it can be
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saved in its widest mode with a simple SET insn as long as the memory
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address is valid. We record the INSN_CODE is those insns here since
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when we emit them, the addresses might not be valid, so they might not
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be recognized. */
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int x_cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
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int x_cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
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};
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extern struct target_reload default_target_reload;
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#if SWITCHABLE_TARGET
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extern struct target_reload *this_target_reload;
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#else
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#define this_target_reload (&default_target_reload)
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#endif
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#define indirect_symref_ok \
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(this_target_reload->x_indirect_symref_ok)
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#define double_reg_address_ok \
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(this_target_reload->x_double_reg_address_ok)
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#define caller_save_initialized_p \
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(this_target_reload->x_caller_save_initialized_p)
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/* Register equivalences. Indexed by register number. */
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typedef struct reg_equivs
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{
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/* The constant value to which pseudo reg N is equivalent,
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or zero if pseudo reg N is not equivalent to a constant.
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find_reloads looks at this in order to replace pseudo reg N
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with the constant it stands for. */
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rtx constant;
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/* An invariant value to which pseudo reg N is equivalent.
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eliminate_regs_in_insn uses this to replace pseudos in particular
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contexts. */
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rtx invariant;
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/* A memory location to which pseudo reg N is equivalent,
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prior to any register elimination (such as frame pointer to stack
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pointer). Depending on whether or not it is a valid address, this value
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is transferred to either equiv_address or equiv_mem. */
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rtx memory_loc;
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/* The address of stack slot to which pseudo reg N is equivalent.
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This is used when the address is not valid as a memory address
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(because its displacement is too big for the machine.) */
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rtx address;
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/* The memory slot to which pseudo reg N is equivalent,
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or zero if pseudo reg N is not equivalent to a memory slot. */
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rtx mem;
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/* An EXPR_LIST of REG_EQUIVs containing MEMs with
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alternate representations of the location of pseudo reg N. */
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rtx alt_mem_list;
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/* The list of insns that initialized reg N from its equivalent
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constant or memory slot. */
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rtx init;
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} reg_equivs_t;
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#define reg_equiv_constant(ELT) \
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VEC_index (reg_equivs_t, reg_equivs, (ELT))->constant
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#define reg_equiv_invariant(ELT) \
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VEC_index (reg_equivs_t, reg_equivs, (ELT))->invariant
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#define reg_equiv_memory_loc(ELT) \
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VEC_index (reg_equivs_t, reg_equivs, (ELT))->memory_loc
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#define reg_equiv_address(ELT) \
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VEC_index (reg_equivs_t, reg_equivs, (ELT))->address
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#define reg_equiv_mem(ELT) \
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VEC_index (reg_equivs_t, reg_equivs, (ELT))->mem
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#define reg_equiv_alt_mem_list(ELT) \
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VEC_index (reg_equivs_t, reg_equivs, (ELT))->alt_mem_list
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#define reg_equiv_init(ELT) \
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VEC_index (reg_equivs_t, reg_equivs, (ELT))->init
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DEF_VEC_O(reg_equivs_t);
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DEF_VEC_ALLOC_O(reg_equivs_t, gc);
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extern VEC(reg_equivs_t,gc) *reg_equivs;
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/* All the "earlyclobber" operands of the current insn
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are recorded here. */
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extern int n_earlyclobbers;
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extern rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
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/* Save the number of operands. */
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extern int reload_n_operands;
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/* First uid used by insns created by reload in this function.
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Used in find_equiv_reg. */
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extern int reload_first_uid;
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extern int num_not_at_initial_offset;
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#if defined SET_HARD_REG_BIT && defined CLEAR_REG_SET
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/* This structure describes instructions which are relevant for reload.
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Apart from all regular insns, this also includes CODE_LABELs, since they
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must be examined for register elimination. */
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struct insn_chain
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{
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/* Links to the neighbor instructions. */
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struct insn_chain *next, *prev;
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/* Link through a chains set up by calculate_needs_all_insns, containing
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all insns that need reloading. */
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struct insn_chain *next_need_reload;
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/* The rtx of the insn. */
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rtx insn;
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/* The basic block this insn is in. */
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int block;
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/* Nonzero if find_reloads said the insn requires reloading. */
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unsigned int need_reload:1;
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/* Nonzero if find_reloads needs to be run during reload_as_needed to
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| 300 |
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perform modifications on any operands. */
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unsigned int need_operand_change:1;
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/* Nonzero if eliminate_regs_in_insn said it requires eliminations. */
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unsigned int need_elim:1;
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/* Nonzero if this insn was inserted by perform_caller_saves. */
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unsigned int is_caller_save_insn:1;
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| 307 |
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/* Register life information: record all live hard registers, and
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all live pseudos that have a hard register. This set also
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contains pseudos spilled by IRA. */
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bitmap_head live_throughout;
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bitmap_head dead_or_set;
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| 313 |
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/* Copies of the global variables computed by find_reloads. */
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struct reload *rld;
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int n_reloads;
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/* Indicates which registers have already been used for spills. */
|
| 318 |
|
|
HARD_REG_SET used_spill_regs;
|
| 319 |
|
|
};
|
| 320 |
|
|
|
| 321 |
|
|
/* A chain of insn_chain structures to describe all non-note insns in
|
| 322 |
|
|
a function. */
|
| 323 |
|
|
extern struct insn_chain *reload_insn_chain;
|
| 324 |
|
|
|
| 325 |
|
|
/* Allocate a new insn_chain structure. */
|
| 326 |
|
|
extern struct insn_chain *new_insn_chain (void);
|
| 327 |
|
|
#endif
|
| 328 |
|
|
|
| 329 |
|
|
#if defined SET_HARD_REG_BIT
|
| 330 |
|
|
extern void compute_use_by_pseudos (HARD_REG_SET *, bitmap);
|
| 331 |
|
|
#endif
|
| 332 |
|
|
|
| 333 |
|
|
/* Functions from reload.c: */
|
| 334 |
|
|
|
| 335 |
|
|
extern reg_class_t secondary_reload_class (bool, reg_class_t,
|
| 336 |
|
|
enum machine_mode, rtx);
|
| 337 |
|
|
|
| 338 |
|
|
#ifdef GCC_INSN_CODES_H
|
| 339 |
|
|
extern enum reg_class scratch_reload_class (enum insn_code);
|
| 340 |
|
|
#endif
|
| 341 |
|
|
|
| 342 |
|
|
/* Return a memory location that will be used to copy X in mode MODE.
|
| 343 |
|
|
If we haven't already made a location for this mode in this insn,
|
| 344 |
|
|
call find_reloads_address on the location being returned. */
|
| 345 |
|
|
extern rtx get_secondary_mem (rtx, enum machine_mode, int, enum reload_type);
|
| 346 |
|
|
|
| 347 |
|
|
/* Clear any secondary memory locations we've made. */
|
| 348 |
|
|
extern void clear_secondary_mem (void);
|
| 349 |
|
|
|
| 350 |
|
|
/* Transfer all replacements that used to be in reload FROM to be in
|
| 351 |
|
|
reload TO. */
|
| 352 |
|
|
extern void transfer_replacements (int, int);
|
| 353 |
|
|
|
| 354 |
|
|
/* IN_RTX is the value loaded by a reload that we now decided to inherit,
|
| 355 |
|
|
or a subpart of it. If we have any replacements registered for IN_RTX,
|
| 356 |
|
|
cancel the reloads that were supposed to load them.
|
| 357 |
|
|
Return nonzero if we canceled any reloads. */
|
| 358 |
|
|
extern int remove_address_replacements (rtx in_rtx);
|
| 359 |
|
|
|
| 360 |
|
|
/* Like rtx_equal_p except that it allows a REG and a SUBREG to match
|
| 361 |
|
|
if they are the same hard reg, and has special hacks for
|
| 362 |
|
|
autoincrement and autodecrement. */
|
| 363 |
|
|
extern int operands_match_p (rtx, rtx);
|
| 364 |
|
|
|
| 365 |
|
|
/* Return 1 if altering OP will not modify the value of CLOBBER. */
|
| 366 |
|
|
extern int safe_from_earlyclobber (rtx, rtx);
|
| 367 |
|
|
|
| 368 |
|
|
/* Search the body of INSN for values that need reloading and record them
|
| 369 |
|
|
with push_reload. REPLACE nonzero means record also where the values occur
|
| 370 |
|
|
so that subst_reloads can be used. */
|
| 371 |
|
|
extern int find_reloads (rtx, int, int, int, short *);
|
| 372 |
|
|
|
| 373 |
|
|
/* Compute the sum of X and Y, making canonicalizations assumed in an
|
| 374 |
|
|
address, namely: sum constant integers, surround the sum of two
|
| 375 |
|
|
constants with a CONST, put the constant as the second operand, and
|
| 376 |
|
|
group the constant on the outermost sum. */
|
| 377 |
|
|
extern rtx form_sum (enum machine_mode, rtx, rtx);
|
| 378 |
|
|
|
| 379 |
|
|
/* Substitute into the current INSN the registers into which we have reloaded
|
| 380 |
|
|
the things that need reloading. */
|
| 381 |
|
|
extern void subst_reloads (rtx);
|
| 382 |
|
|
|
| 383 |
|
|
/* Make a copy of any replacements being done into X and move those copies
|
| 384 |
|
|
to locations in Y, a copy of X. We only look at the highest level of
|
| 385 |
|
|
the RTL. */
|
| 386 |
|
|
extern void copy_replacements (rtx, rtx);
|
| 387 |
|
|
|
| 388 |
|
|
/* Change any replacements being done to *X to be done to *Y */
|
| 389 |
|
|
extern void move_replacements (rtx *x, rtx *y);
|
| 390 |
|
|
|
| 391 |
|
|
/* If LOC was scheduled to be replaced by something, return the replacement.
|
| 392 |
|
|
Otherwise, return *LOC. */
|
| 393 |
|
|
extern rtx find_replacement (rtx *);
|
| 394 |
|
|
|
| 395 |
|
|
/* Nonzero if modifying X will affect IN. */
|
| 396 |
|
|
extern int reg_overlap_mentioned_for_reload_p (rtx, rtx);
|
| 397 |
|
|
|
| 398 |
|
|
/* Check the insns before INSN to see if there is a suitable register
|
| 399 |
|
|
containing the same value as GOAL. */
|
| 400 |
|
|
extern rtx find_equiv_reg (rtx, rtx, enum reg_class, int, short *,
|
| 401 |
|
|
int, enum machine_mode);
|
| 402 |
|
|
|
| 403 |
|
|
/* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
|
| 404 |
|
|
extern int regno_clobbered_p (unsigned int, rtx, enum machine_mode, int);
|
| 405 |
|
|
|
| 406 |
|
|
/* Return 1 if X is an operand of an insn that is being earlyclobbered. */
|
| 407 |
|
|
extern int earlyclobber_operand_p (rtx);
|
| 408 |
|
|
|
| 409 |
|
|
/* Record one reload that needs to be performed. */
|
| 410 |
|
|
extern int push_reload (rtx, rtx, rtx *, rtx *, enum reg_class,
|
| 411 |
|
|
enum machine_mode, enum machine_mode,
|
| 412 |
|
|
int, int, int, enum reload_type);
|
| 413 |
|
|
|
| 414 |
|
|
/* Functions in postreload.c: */
|
| 415 |
|
|
extern void reload_cse_regs (rtx);
|
| 416 |
|
|
|
| 417 |
|
|
/* Functions in reload1.c: */
|
| 418 |
|
|
|
| 419 |
|
|
/* Initialize the reload pass once per compilation. */
|
| 420 |
|
|
extern void init_reload (void);
|
| 421 |
|
|
|
| 422 |
|
|
/* The reload pass itself. */
|
| 423 |
|
|
extern bool reload (rtx, int);
|
| 424 |
|
|
|
| 425 |
|
|
/* Mark the slots in regs_ever_live for the hard regs
|
| 426 |
|
|
used by pseudo-reg number REGNO. */
|
| 427 |
|
|
extern void mark_home_live (int);
|
| 428 |
|
|
|
| 429 |
|
|
/* Scan X and replace any eliminable registers (such as fp) with a
|
| 430 |
|
|
replacement (such as sp), plus an offset. */
|
| 431 |
|
|
extern rtx eliminate_regs (rtx, enum machine_mode, rtx);
|
| 432 |
|
|
extern bool elimination_target_reg_p (rtx);
|
| 433 |
|
|
|
| 434 |
|
|
/* Called from the register allocator to estimate costs of eliminating
|
| 435 |
|
|
invariant registers. */
|
| 436 |
|
|
extern void calculate_elim_costs_all_insns (void);
|
| 437 |
|
|
|
| 438 |
|
|
/* Deallocate the reload register used by reload number R. */
|
| 439 |
|
|
extern void deallocate_reload_reg (int r);
|
| 440 |
|
|
|
| 441 |
|
|
/* Functions in caller-save.c: */
|
| 442 |
|
|
|
| 443 |
|
|
/* Initialize for caller-save. */
|
| 444 |
|
|
extern void init_caller_save (void);
|
| 445 |
|
|
|
| 446 |
|
|
/* Initialize save areas by showing that we haven't allocated any yet. */
|
| 447 |
|
|
extern void init_save_areas (void);
|
| 448 |
|
|
|
| 449 |
|
|
/* Allocate save areas for any hard registers that might need saving. */
|
| 450 |
|
|
extern void setup_save_areas (void);
|
| 451 |
|
|
|
| 452 |
|
|
/* Find the places where hard regs are live across calls and save them. */
|
| 453 |
|
|
extern void save_call_clobbered_regs (void);
|
| 454 |
|
|
|
| 455 |
|
|
/* Replace (subreg (reg)) with the appropriate (reg) for any operands. */
|
| 456 |
|
|
extern void cleanup_subreg_operands (rtx);
|
| 457 |
|
|
|
| 458 |
|
|
/* Debugging support. */
|
| 459 |
|
|
extern void debug_reload_to_stream (FILE *);
|
| 460 |
|
|
extern void debug_reload (void);
|
| 461 |
|
|
|
| 462 |
|
|
/* Compute the actual register we should reload to, in case we're
|
| 463 |
|
|
reloading to/from a register that is wider than a word. */
|
| 464 |
|
|
extern rtx reload_adjust_reg_for_mode (rtx, enum machine_mode);
|
| 465 |
|
|
|
| 466 |
|
|
/* Ideally this function would be in ira.c or reload, but due to dependencies
|
| 467 |
|
|
on integrate.h, it's part of integrate.c. */
|
| 468 |
|
|
extern void allocate_initial_values (VEC (reg_equivs_t, gc) *);
|
| 469 |
|
|
|
| 470 |
|
|
/* Allocate or grow the reg_equiv tables, initializing new entries to 0. */
|
| 471 |
|
|
extern void grow_reg_equivs (void);
|