OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [g++.dg/] [ext/] [altivec-6.C] - Blame information for rev 717

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 693 jeremybenn
/* Test for correct handling of literal arguments. */
2
/* Author: Ziemowit Laski    */
3
/* { dg-do compile { target powerpc*-*-* } } */
4
/* { dg-require-effective-target powerpc_altivec_ok } */
5
/* { dg-options "-maltivec" } */
6
 
7
#include 
8
 
9
void foo(void) {
10
  const unsigned char *buf;
11
  vector pixel vp = { 3, 4, 5, 6 };
12
  vector bool int vbi = { 1, 0, 1, 0 };
13
  vector bool short vbs = { 1, 0, 1, 0, 1, 0, 1, 0 };
14
  vector bool char vbc = { 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0 };
15
  vector signed char vsc;
16
  int a = 3;
17
 
18
  vec_dst(buf, a, 1);
19
  vec_dstst(buf, a, 2);
20
  vec_dststt(buf, a, 3);
21
  vec_dststt(buf, a, 2);
22
 
23
  vp = vec_sld(vp, vp, 5);
24
  vbc = vec_splat(vbc, 7);
25
  vbs = vec_splat(vbs, 12);
26
  vp = vec_splat(vp, 17);
27
  vbi = vec_splat(vbi, 31);
28
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.