OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [g++.dg/] [ext/] [asm3.C] - Blame information for rev 801

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 693 jeremybenn
// { dg-do compile }
2
 
3
// Copyright (C) 2002 Free Software Foundation, Inc.
4
// Contributed by Nathan Sidwell 16 Sep 2002 
5
 
6
// PR 7015. ICE with asms
7
 
8
int two(int in)
9
{
10
  register int out;
11
  __asm__ ("" : "r" (out) : "r" (in));
12
  return out;
13
}
14
 
15
// { dg-message "error:" "" { target *-*-* } 11 }

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.