URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.c-torture/] [compile/] [pr32606.c] - Blame information for rev 774

Go to most recent revision | Details | Compare with Previous | View Log


int inb(int);
void is870(unsigned int wkport, unsigned char j)
{
 unsigned int tmport;
 unsigned char i;
 for (i = 0; i < 16; i++)
 {
  tmport = wkport + 0x18;
  tmport += 0x07;
  while ((inb(tmport) & 0x80) == 0)
  {
   if ((inb(tmport) & 0x01) != 0)
   {
    tmport -= 0x06;
    tmport += 0x06;
   }
  }
  tmport = wkport + 0x14;
  tmport += 0x04;
  tmport += 0x07;
widep_in1:
  if ((j & 0x01) != 0)
  {
   tmport -= 0x06;
   tmport += 0x06;
   goto widep_in1;
  }
  while ((inb(tmport) & 0x80) == 0) {}
 }
}

Line No.	Rev	Author	Line
1	688	jeremybenn	`int inb(int);`
2			`void is870(unsigned int wkport, unsigned char j)`
3			`{`
4			`unsigned int tmport;`
5			`unsigned char i;`
6			`for (i = 0; i < 16; i++)`
7			`{`
8			`tmport = wkport + 0x18;`
9			`tmport += 0x07;`
10			`while ((inb(tmport) & 0x80) == 0)`
11			`{`
12			`if ((inb(tmport) & 0x01) != 0)`
13			`{`
14			`tmport -= 0x06;`
15			`tmport += 0x06;`
16			`}`
17			`}`
18			`tmport = wkport + 0x14;`
19			`tmport += 0x04;`
20			`tmport += 0x07;`
21			`widep_in1:`
22			`if ((j & 0x01) != 0)`
23			`{`
24			`tmport -= 0x06;`
25			`tmport += 0x06;`
26			`goto widep_in1;`
27			`}`
28			`while ((inb(tmport) & 0x80) == 0) {}`
29			`}`
30			`}`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.c-torture/] [compile/] [pr32606.c] - Blame information for rev 774