OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.c-torture/] [execute/] [20020215-1.c] - Blame information for rev 715

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 688 jeremybenn
/* Test failed on an architecture that:
2
 
3
   - had 16-bit registers,
4
   - passed 64-bit structures in registers,
5
   - only allowed SImode values in even numbered registers.
6
 
7
   Before reload, s.i2 in foo() was represented as:
8
 
9
        (subreg:SI (reg:DI 0) 2)
10
 
11
   find_dummy_reload would return (reg:SI 1) for the subreg reload,
12
   despite that not being a valid register.  */
13
 
14
struct s
15
{
16
  short i1;
17
  long i2;
18
  short i3;
19
};
20
 
21
struct s foo (struct s s)
22
{
23
  s.i2++;
24
  return s;
25
}
26
 
27
int main ()
28
{
29
  struct s s = foo ((struct s) { 1000, 2000L, 3000 });
30
  if (s.i1 != 1000 || s.i2 != 2001L || s.i3 != 3000)
31
    abort ();
32
  exit (0);
33
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.