OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.c-torture/] [execute/] [ieee/] [20000320-1.c] - Blame information for rev 688

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 688 jeremybenn
#if defined(__mips__) && defined(__sgi__)
2
#include <sys/fpu.h>
3
#endif /* defined(__mips__) && defined(__sgi__) */
4
#if __INT_MAX__ != 2147483647 || (__LONG_LONG_MAX__ != 9223372036854775807ll && __LONG_MAX__ != 9223372036854775807ll)
5
int main(void) { exit (0); }
6
#else
7
#if __LONG_MAX__ != 9223372036854775807ll
8
typedef unsigned long long ull;
9
#else
10
typedef unsigned long ull;
11
#endif
12
typedef unsigned ul;
13
 
14
union fl {
15
  float f;
16
  ul l;
17
} uf;
18
union dl {
19
  double d;
20
  ull ll;
21
} ud;
22
 
23
int failed = 0;
24
 
25
void c(ull d, ul f)
26
{
27
  ud.ll = d;
28
  uf.f = (float) ud.d;
29
  if (uf.l != f)
30
    {
31
      failed++;
32
    }
33
}
34
 
35
int main()
36
{
37
#if defined(__mips__) && defined(__sgi__)
38
  /* Many MIPS chips round denormalized floating point numbers to zero
39
     rather than follow the IEEE standard.  Change the rounding mode
40
     to correspond to the IEEE rounding mode that rounds numbers to
41
     the nearest representable mode, the most common IEEE rounding
42
     mode.  */
43
  set_fpc_csr(0);
44
#endif /* defined(__mips__) && defined(__sgi__) */
45
 
46
  if (sizeof (float) != sizeof (ul)
47
      || sizeof (double) != sizeof (ull))
48
    exit (0);
49
 
50
  c(0x3690000000000000ULL, 0x00000000U);
51
#if (defined __arm__ || defined __thumb__) && ! (defined __ARMEB__ || defined __VFP_FP__)
52
  /* The ARM always stores FP numbers in big-wordian format,
53
     even when running in little-byteian mode.  */
54
  c(0x0000000136900000ULL, 0x00000001U);
55
  c(0xffffffff369fffffULL, 0x00000001U);
56
  c(0x0000000036A00000ULL, 0x00000001U);
57
  c(0xffffffff36A7ffffULL, 0x00000001U);
58
  c(0x0000000036A80000ULL, 0x00000002U);
59
  c(0xffffffff36AfffffULL, 0x00000002U);
60
  c(0x0000000036b00000ULL, 0x00000002U);
61
  c(0x0000000136b00000ULL, 0x00000002U);
62
 
63
  c(0xdfffffff380fffffULL, 0x007fffffU);
64
  c(0xe0000000380fffffULL, 0x00800000U);
65
  c(0xe0000001380fffffULL, 0x00800000U);
66
  c(0xffffffff380fffffULL, 0x00800000U);
67
  c(0x0000000038100000ULL, 0x00800000U);
68
  c(0x0000000138100000ULL, 0x00800000U);
69
  c(0x1000000038100000ULL, 0x00800000U);
70
  c(0x1000000138100000ULL, 0x00800001U);
71
  c(0x2fffffff38100000ULL, 0x00800001U);
72
  c(0x3000000038100000ULL, 0x00800002U);
73
  c(0x5000000038100000ULL, 0x00800002U);
74
  c(0x5000000138100000ULL, 0x00800003U);
75
#else
76
  c(0x3690000000000001ULL, 0x00000001U);
77
  c(0x369fffffffffffffULL, 0x00000001U);
78
  c(0x36A0000000000000ULL, 0x00000001U);
79
  c(0x36A7ffffffffffffULL, 0x00000001U);
80
  c(0x36A8000000000000ULL, 0x00000002U);
81
  c(0x36AfffffffffffffULL, 0x00000002U);
82
  c(0x36b0000000000000ULL, 0x00000002U);
83
  c(0x36b0000000000001ULL, 0x00000002U);
84
 
85
  c(0x380fffffdfffffffULL, 0x007fffffU);
86
  c(0x380fffffe0000000ULL, 0x00800000U);
87
  c(0x380fffffe0000001ULL, 0x00800000U);
88
  c(0x380fffffffffffffULL, 0x00800000U);
89
  c(0x3810000000000000ULL, 0x00800000U);
90
  c(0x3810000000000001ULL, 0x00800000U);
91
  c(0x3810000010000000ULL, 0x00800000U);
92
  c(0x3810000010000001ULL, 0x00800001U);
93
  c(0x381000002fffffffULL, 0x00800001U);
94
  c(0x3810000030000000ULL, 0x00800002U);
95
  c(0x3810000050000000ULL, 0x00800002U);
96
  c(0x3810000050000001ULL, 0x00800003U);
97
#endif
98
 
99
  if (failed)
100
    abort ();
101
  else
102
    exit (0);
103
}
104
#endif

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.