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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.c-torture/] [execute/] [simd-5.c] - Blame information for rev 711

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Line No. Rev Author Line
1 688 jeremybenn
/* Test saving and restoring of SIMD registers.  */
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typedef short Q __attribute__((vector_size(8)));
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Q q1 = {1, 2}, q2 = {3, 4}, q3 = {5, 6}, q4 = {7, 8};
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Q w1, w2, w3, w4;
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Q z1, z2, z3, z4;
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volatile int dummy;
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void  __attribute__((__noinline__))
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func0 (void)
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{
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  dummy = 1;
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}
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void __attribute__((__noinline__))
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func1 (void)
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{
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  Q a, b;
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  a = q1 * q2;
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  b = q3 * q4;
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  w1 = a;
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  w2 = b;
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  func0 ();
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  w3 = a;
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  w4 = b;
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}
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void __attribute__((__noinline__))
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func2 (void)
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{
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  Q a, b;
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  a = q1 + q2;
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  b = q3 - q4;
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  z1 = a;
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  z2 = b;
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  func1 ();
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  z3 = a;
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  z4 = b;
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}
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int
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main (void)
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{
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  func2 ();
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  if (memcmp (&w1, &w3, sizeof (Q)) != 0)
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    abort ();
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  if (memcmp (&w2, &w4, sizeof (Q)) != 0)
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    abort ();
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  if (memcmp (&z1, &z3, sizeof (Q)) != 0)
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    abort ();
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  if (memcmp (&z2, &z4, sizeof (Q)) != 0)
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    abort ();
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  return 0;
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}

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